JPH03185762A - Photoelectric conversion device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention [Field of Application in Industry A] The present invention relates to a photoelectric conversion device, and particularly to a photoelectric conversion device that uses a photodiode formed of an amorphous material as a photoelectric conversion element, and has a charge storage device with improved noise characteristics. The present invention relates to a type photoelectric conversion device.

[Prior Art] In recent years, photoelectric conversion elements using amorphous materials have been researched and developed. Known amorphous materials used in photoelectric conversion elements include amorphous silicon (hereinafter referred to as a-5t), amorphous selenium, amorphous germanium, and the like. Among them, a-Si has excellent optical properties such as a large light absorption coefficient and spectral sensitivity close to human visual sensitivity, the ability to create a low-temperature process, and the ability to form a film over a large area. Therefore, it is attracting particular attention as an amorphous material for photoelectric conversion elements.

Furthermore, photodiodes are conventionally known as photoelectric conversion elements. Photodiodes have the advantage of having a simple structure and being suitable for microfabrication. Conventional photodiodes are known as pn-type photodiodes, pin-type photodiodes, avalanche photodiodes, etc., depending on their layer configurations and material combinations. It is possible to configure various configurations, and these are also being actively researched.

A photodiode is a type of photoelectric conversion element that converts an optical signal into an electrical signal by utilizing the fact that when a bias voltage is applied in the reverse direction, the reverse current changes in proportion to the amount of light irradiation.
f! However, it also has the property of a capacitor that stores photoelectric charges inside when it is irradiated with an optical signal. A photodiode that utilizes this capacitive property is generally called a charge storage type photodiode. Charge storage type photodiodes produce high output and high S by accumulating photo-excited charges for a certain period of time and then outputting them.
/N ratio, so it has been widely used as a conventional photoelectric conversion element.

FIG. 6 is an equivalent circuit diagram showing a photoelectric conversion section of a photoelectric conversion device using a charge storage type photodiode as a photoelectric conversion element. In FIG. 0, numeral 1 indicates a charge storage type photodiode. The output circuit is a circuit for converting a photocurrent generated by irradiating the photodiode 1 with an optical signal into an electrical signal and outputting the electrical signal. In addition, the reset circuit is a circuit for erasing the charge remaining after transferring the charge accumulated in the photodiode 1, that is, a circuit for forcibly setting the output terminal of the photodiode to a fixed potential. It is a circuit. This reset circuit is made of, for example, a bipolar transistor or an MIS transistor.

In such a photoelectric conversion device, the photodiode alternately performs an accumulation operation in which one or both of electron-hole pairs generated by being irradiated with light and a reset operation in which the charge is reset and returned to the initial state. go to

The causes of noise in such conventional light beam conversion devices include the wiring capacitance of the signal line and the electrode-to-substrate capacitance when an MIS transistor is used for the reset switch, which makes it difficult to read out the noise charge remaining in the line. There are two types of noise: noise due to the opening and closing of the reset switch, and noise due to electric charges generated by light incident on areas other than the photodiode's light-receiving area getting mixed into the signal line, ie, noise due to the smear phenomenon. On the other hand, as a method of preventing the generation of these noises and further expanding the dynamic range, there has been a new method of providing an additional capacitor electrically in parallel with the photoelectric conversion element.

[Problems to be Solved by the Invention] However, according to the findings of the present inventors, in a photodiode formed of an amorphous material, in addition to the noise caused by the above-mentioned causes, noise also occurs due to the following causes. It turned out that it was. In other words, an amorphous material has a defect level density (capture level density) due to the bonding state of its atoms, and therefore a photodiode made of an amorphous material has a
In addition to the original diode junction capacitance, charges due to photoexcitation are also accumulated in the trap level. However, the charges accumulated in the trap level cannot be completely reset by a short reset operation.

If the charge remaining after being transferred as an output by the photodiode cannot be completely reset, the charge remaining after the reset is added to the next accumulation operation, resulting in a so-called afterimage.

As an example, when light enters from the 9th layer side of a pn type a-Si photodiode as shown in FIG.
Consider a configuration in which the layers are in a floating state. In FIG. 7(a), 710 is a substrate, 711 is an ITO electrode, and 712 is a P-type a-
5t, 713 is an n-type a-3t electrode, and 714 is a Cr electrode. FIG. 7(b) is a band potential diagram showing the electron energy of a-St, and shows that a tail level, defect level density, etc. exist conceptually in the band gap. In the p-layer, not only holes due to photoexcitation are accumulated, but also some of the electrons generated at the same time are accumulated.

A similar phenomenon occurs on the n-layer side, but the relationship between electrons and holes is reversed. Furthermore, since light enters from the p-layer side, the number of electrons and holes excited on the n-layer side is smaller than on the 9-layer side.

If a reset operation is performed after accumulation, the electrode position of one layer is forcibly returned to a thermal equilibrium state with a fixed potential.
), electrons 7 in the conduction band and the tail of the conduction band
01, the holes 702 in the valence band and the tail of the valence band and the electrons in the shallow trap level are erased.

In addition, a certain lifetime is required for an electron captured in a defect level (capture level) to return to the conduction band from this level and be erased, and this lifetime is longer than the time for normal carrier movement. is extremely slow, so photodiodes made of amorphous silicon have a new slow time constant component that is not present in photodiodes made of crystalline silicon. In other words, if the reset time is short, a
Since the electron 703 in the capture level in -3i enters the next accumulation operation without being fully reset, the electrons captured in this capture level will contribute as signal charges during the next accumulation operation. , causing an afterimage.

The present invention eliminates such afterimages caused by amorphous materials.
The aim is to reduce this without adding any special circuits.

[Means for Solving the Problems] The photoelectric conversion element of the present invention includes a photodiode using an amorphous material and an MIS transistor using a material having a lower trap level density than the amorphous material as an insulating gate film. and the gate electrode of the MIS transistor and the photodiode are electrically connected.

[Function] According to the present invention, an MIS transistor in which a gate isolation Mi@ is formed of a material having a lower trap level density than an amorphous material forming a photodiode is used as an amplification element in an output circuit, and the gate Since the insulating film is used as a capacitor to reduce the amount of charge accumulated in the trap level density of the photodiode, it is possible to reduce the above-mentioned afterimage without adding a special circuit.

The reason is detailed below @1. Nie explain.

In order to reduce the afterimage, it is sufficient to reduce the amount of charge accumulated in the trap level. To this end, the present invention connects a photodiode made of an amorphous material and a capacitor made of a material having a lower trap level density than the amorphous material.

With this method, it is possible to store the charge Q generated by photoexcitation by dividing it into the photodiode capacitor C2, which has a relatively higher trapping level density than a capacitor, and the capacitor C8&, which uses a material with a lower trapping level density. becomes. In this case, the charge Q accumulated in C2 is expressed as follows, which means that by adding C1, the amount of afterimage decreases by 1/(ca +C,>). FIG. 5 is a diagram showing the relationship between the amount of afterimage and C,/C. According to FIG. ,C.

It is shown that if C9 has twice the capacity, the afterimage will be 1/3 of that without C1. As mentioned above, photodiodes using amorphous silicon have significantly more afterimages than photodiodes using crystalline silicon, so reducing the amount of afterimages to less than half is an effective way to improve photosensor performance. The afterimage reduction effect of the present invention is as follows:
It is sufficiently effective when C1 is sufficiently larger than C, that is, when C,>C.

According to the present invention, the gate insulating film of the MIS transistor (as an amplifying element) is used as a capacitor to reduce the amount of charge accumulated in the trap level density of the photodiode, so a special circuit is added. There is no need to
Therefore, it is possible to reduce the above-mentioned afterimage without complicating the structure and manufacturing process of the photoelectric conversion device.

Also, photodiode and M! By forming the S transistors on the same substrate and arranging them vertically on the substrate, it is possible to reduce the above-mentioned afterimage without increasing the device area.

[Example] (Example 1) As a first example of the present invention, a case will be described in which a pin type A-3I photodiode and a thin film transistor with an MIS structure are formed on a glass substrate. FIG. 1 is a circuit diagram showing an equivalent circuit of the photoelectric conversion device according to this embodiment. In FIG. It is a capacitor.

Next, the manufacturing process of the photoelectric conversion section of the photoelectric conversion device shown in FIG. 1 will be explained using FIGS. 2(a) to 2(e).

(2) An amorphous silicon film was formed on the high melting point glass substrate 201 by low pressure CVD and recrystallized by laser annealing.

■This amorphous silicon film is doped with P using selective ion implantation and thermal diffusion, forming n0 type single crystal regions vL202(a) and 202(b) and i type silicon single crystal region 202 (C ) was formed (Fig. 2(a)
).

■As a material with lower trap level density than a-3t, S
In, the layer 203 was formed to a thickness of 500 mm using the CVD method.

■N3 type single crystal regions 202 (a) and 202 (b)
A contact hole was opened in the Si02 layer 203 at an arbitrary position above. Subsequently, a low-resistance polycrystalline silicon layer was formed in this contact hole by the CVD method, and this was patterned to form a power line 204 (a) and an output line 204 (b) (Fig. 2 (b)). ).

■Sin layer 205 to cover output line 204 (b)
was formed into a film by CVD method and patterned.

Furthermore, an AJZ wiring 20B was formed by sputtering and patterned to serve as the gate electrode of the MOS transistor and the lower electrode of the photodiode.

Through the above steps, an MO3 type transistor section was completed. (Fig. 2 (C)) ■N-type amorphous silicon layer 207 (a) is deposited on the Aj2 wiring 206 region on the i-type silicon single crystal region 202 (a) by CVD method while exchanging the doping material. 10
A pin photodiode was prepared by depositing an i-type amorphous silicon layer 207 (b) of 8,000% and a p-type amorphous silicon layer 207 (c) of 200 people. (Fig. 2(d)) ■Photodiode 207 (a), (b).

An SiO2 layer 208 was formed as an insulating layer on the side surface of (C), and ITO 209° was further formed as a transparent lower electrode of the photodiode on the p-type amorphous silicon layer 207 (C) by sputtering. (FIG. 2(e)) Through the above steps, the photoelectric conversion section of the photoelectric conversion device of this example could be manufactured.

In such a photoelectric conversion device, for example, if the area of the photodiode is 21 μm x 21 μm, and the W and L of the MOS transistor are 21 μm and 110 μm, respectively, the capacity of the photodiode section is 8000 = o, oss [pF] Capacity of the MOS transistor Snow is 0.442 [pF], and the afterimage is 0.058/(0,058+0.442
)-1/8. [l less.

Here, the film thickness of each layer in the above description of the manufacturing process is an example, and can be arbitrarily changed depending on the material and purpose of the sensor. At this time, as described above, if the capacitance ratio of CII and C, a is set to 1:1, the afterimage will be reduced to 1/2, and if the ratio of C11 is increased, the afterimage will be further reduced.

Therefore, if the capacitance relationship is C,>Cp, the effects of the present invention can be fully exhibited.

Also, an electrode 20 for applying a fixed voltage to the capacitor
In this embodiment, electrode 6 is used in common as an electrode for applying a fixed voltage to the photodiode, but forming both separately does not affect the effects of the present invention.

Note that the reason why the photodiode and the MOS transistor are arranged vertically on the substrate is to reduce the element area, but it is also possible to arrange them laterally.

(Example 2) As a second example of the present invention, a case will be described in which a silicon wafer is used as the substrate. FIG. 3 is a circuit diagram showing the circuit configuration of the photoelectric conversion device according to this embodiment. In the figure, l is a pin type a-Si photodiode, and 3 is a capacitance due to the gate insulating film of the MIs transistor.

Next, the manufacturing process of the photoelectric conversion section of the photoelectric conversion device shown in FIG. 3 will be explained using FIGS. 4(a) to 4(e).

■P is doped onto the wafer substrate 401 using selective ion implantation and thermal diffusion to form n0 type single crystal regions 402 (a) and 402 (b) (fourth
Figure (a)).

■As a material with lower trap level density than a-3i, S
An iO layer 403 was formed to a thickness of 400 wafers by CVD.

(2) Contact holes were opened in the 5/02 layer 403 at arbitrary positions on the n1 type single crystal regions 402(a) and 402(b). Subsequently, a low-resistance polycrystalline silicon layer was formed in this contact hole by the CVD method, and this was patterned to form a power line 404 (a) and an output line 404 (b) (see FIG. 4(b)). )).

■5/02 layer 405 to cover output line 404 (b)
was formed into a film by CVD method and buttered.

Further, an Al wiring 406 was formed by sputtering and patterned as a gate electrode of a MOS transistor and as a lower electrode of a photodiode.

Through the above steps, a MOS type transistor section was completed. (Figure 344 (C)) ■N-type amorphous silicon 7 layer 407 (a) is applied to the l wiring 406 region on the i-type silicon single crystal region 402 (a) while exchanging the doping material by the CVD method. 10
A pin photodiode was fabricated by depositing 8,000 i-type amorphous silicon layers 407 (b) and 200 p-type amorphous silicon layers 407 (c).

(Figure 4(d)) ■Photodiode 407 (a), (b).

A SiO layer 408 was formed as an insulating layer on the side surface of (C), and ITO 409 was further formed as a transparent lower electrode of the photodiode on the p-type amorphous silicon layer 407(e) by sputtering. (FIG. 4(e)) Through the above steps, the photoelectric conversion section of the photoelectric conversion device of this example could be manufactured.

In such a photoelectric conversion device, the area of the photodiode is, for example, 21 μm x 21 μm, as in Example 1 above.
μm, and W%L of the MOS transistor is 21
μm and 10um, the capacitance of the photodiode section is 8000 = 0.058 [pF] The capacitance of the MOS transistor is 0.442 [pF], and the afterimage is 0.0587 (0,058 + 0.442
>・178,. 8 a little.

Here, the film thickness of each layer in the above description of the manufacturing process is an example, and can be arbitrarily changed depending on the material and purpose of the sensor. At this time, as described above, if the capacitance ratio of C1 and CP is set to 1:1, the afterimage will be reduced to 1/2, and if the ratio of C11 is increased, the afterimage will be further reduced. Therefore, the effect of the present invention can be fully exhibited by setting the capacitance relationship as c a > c p.

Further, the electrode 406 to which a fixed voltage was applied to the capacitor is
In this embodiment, the electrode is used in common with the electrode to which a fixed voltage is applied to the photodiode, but forming both separately does not affect the effects of the present invention.

Note that the reason why the photodiode and the MOS transistor are arranged vertically on the substrate is to reduce the element area, but it is also possible to arrange them laterally.

In addition, examples of amorphous materials include a-3i and a-3iG.
e, a-3iC, a-SiCGe.

a-Se etc. can be used.

In addition, if the insulating film has a low density of trap levels, S
Not limited to iO□, but SiN.

It may be 5iON or the like, as long as it is an absolute AlII having a relatively high dielectric constant.

[Effects of the Invention] As explained above, according to the present invention, the afterimage phenomenon that conventionally occurs in a photoelectric conversion device using a photodiode formed of an amorphous material as a photoelectric conversion element can be solved by using a special circuit. This can be effectively reduced without using any additional elements or elements (therefore, without complicating the structure or manufacturing process).

Furthermore, by vertically arranging the MIS transistor and the photodiode on the same substrate, it is possible to reduce the element area.

Furthermore, since the capacity that can store charges has increased, assuming that the reverse bias voltage applied to the photodiode is fixed, it can be expected that the dynamo range will be expanded to the high illuminance side by the increase in MIS capacity.

[Brief explanation of drawings]

FIG. 1 is an equivalent circuit diagram of a photoelectric conversion device according to a first embodiment of the present invention, FIG. 2 is a process sectional view of a photoelectric conversion section of a photosensor as a first embodiment of the present invention, and FIG. A circuit diagram of a photoelectric conversion section according to a second embodiment of the present invention, FIG. 4 is a process cross-sectional view of a photoelectric conversion section of a photosensor according to a second embodiment of the present invention, Figure 5 is a diagram showing the relationship between the amount of afterimage and C, /CP; Figure 6 is an equivalent circuit diagram of a conventional photoelectric conversion device; Figure 7 (a), (b) is a schematic side view of a conventional pn-type amorphous silicon photodiode and a carrier energy distribution diagram after reset, respectively. ! ...Photodiode made from amorphous material, 3...
- Channel capacitance of MIS transistor, 701... Electrons erased by reset, 702... Holes erased by reset, 703... Electrons in the trap level density that remained after being reset. Figure 2 Ca/Cp Figure 2 (a) Figure (b) Carrier energy density

Claims (6)

[Claims] (1) It has at least a photodiode using an amorphous material and an MIS transistor using a material with a lower trap level density than the amorphous material as an insulating gate film,
A photoelectric conversion device characterized in that the gate electrode of the MIS transistor and the photodiode are electrically connected. (2) The photoelectric conversion according to claim 1, wherein the electric capacitance of the MIS transistor due to the insulated gate film is the same as or larger than the storage capacity of the photodiode. Device (3) The photoelectric conversion device according to claim 1 or 2, wherein the MIS transistor and the photodiode are formed on the same substrate. (4) The photoelectric conversion device according to claim 3, wherein the MIS transistor and the photodiode are arranged in a direction perpendicular to the surface of the base. (5) The photoelectric conversion device according to any one of claims 1 to 4, wherein the amorphous material is amorphous silicon. (6) The photoelectric conversion device according to any one of claims 1 to 5, wherein the photodiode has a pin structure.