JPH03186820A - Manufacturing method of matrix type liquid crystal display substrate - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a +7x type liquid crystal display substrate, particularly a method for manufacturing a matrix type liquid crystal display substrate for performing matrix display using thin film transistors as address elements. Regarding.

(Prior Art) A plan view of a conventional IJ type liquid crystal display substrate is shown in FIG. This matrix type liquid crystal display substrate includes thin film transistors and pixel electrodes 11 arranged in a matrix on an insulating substrate via a protective insulating film, etc., a gate bus bar (scanning fi) 23, and a source bus bar (signal line) 29. It is equipped with Gate bus bar 23 and source bus bar 29
By intersecting each other, they form a lattice pattern. The pixel electrode 1 is formed on the substrate protective film in the area surrounded by the gate bus bar 23 and the source bus bar 29.
1 is formed. The picture element electrode 11 is connected to a drain electrode 10 of a thin film transistor functioning as an address element. In addition, the gate electrode 3 of the thin film transistor
is connected to the gate bus bar 23, and -2=source electrode 9 is connected to the source bus bar 29, respectively. Above the gate electrode 3, a gap 20 having a width of about 3 μm is provided between the source electrode 9 and the drain electrode 10, separating the source electrode 9 and the drain electrode 10.

The gate busbar 23 has a scanning signal power, and the source busbar 2
Image signals are respectively input to 9, and when the thin film transistor is turned on by a scanning signal, an image signal current is input from the source hash bar 29 to the picture element electrode 11.

FIG. 7 is a sectional view taken along the line BB in FIG. 6 for explaining the structure of the thin film transistor formed on the matrix type liquid crystal display substrate.

A substrate protection film 2 is formed on an insulating substrate 1, and a gate electrode 3, a first gate insulating film 4, a second gate insulating film 5, and a channel part I-type amorphous silicon film 6 are formed on the substrate protection film 2. , channel portion protective insulating film 7, contact layer 8as
8bs A source electrode 9, a drain electrode 10, and a protective insulating film 12 are formed in this order from the insulating substrate 1 side. Further, a 3-pixel electrode 11 is formed on the substrate protective film 5 and connected to the drain electrode 10.

In the conventional manufacturing method of matrix type liquid crystal display substrate,
A first gate insulating film 4, a second gate insulating film 5, and a channel i-type amorphous silicon film 6 are formed on the gate electrode 3.
After forming a protective insulating film to become the channel protective insulating film 7, the following steps were performed to form a pattern for the channel protective insulating film 7.

(1) First, a step of forming a resist on the protective insulating film.

(2) Next, the resist is irradiated with light that has passed through a photomask having a pattern of the channel protection insulating film 7 from the surface side of the insulating substrate l (the surface on which thin film transistors etc. are formed). By exposing the resist,
A step of forming a resist mask having a pattern of a predetermined shape at a predetermined position on the protective insulating film.

(3) Thereafter, a step of forming a channel portion protective insulating film 7 of a predetermined shape on the channel 4-portion I type amorphous silicon film 6 by etching the protective insulating film using the resist mask.

(Problems to be Solved by the Invention) However, the above-mentioned conventional technology has the following problems.

In the conventional manufacturing method, a photomask having a pattern of the channel portion protective insulating film 7 is applied from the surface side of the insulating substrate 1 to a resist formed on the protective insulating film that will become the channel portion protective insulating film 7. When exposing the resist by irradiating the transmitted light, highly accurate positioning is required between the pattern of the light transmitted through the photomask and the pattern on the surface of the insulating substrate l. This is because the position and shape of the channel protection insulating film 7 determine the channel size, which is an important factor for the on-off characteristics of the thin film transistor. If the position of the channel protection insulating film 7 shifts in the gate electrode width direction (channel length direction) of the thin film transistor, the contact area between the source electrode 9 and the contact layer 8a or the contact area between the drain electrode 10 and the contact layer 8b -5 = becomes smaller, so the contact resistance on the side where the contact area is smaller increases significantly. As described above, if the channel portion protective insulating film 7 is even slightly shifted in the channel length direction, the on-off characteristics of the thin film transistor will deteriorate.

In order to prevent the characteristics of thin film transistors from deteriorating even when such misalignment occurs, it is necessary to increase the alignment margin between patterns by increasing the dimensions of each layer that makes up the thin film transistor. becomes. This makes it difficult to miniaturize thin film transistors, and further causes deterioration in image quality due to a decrease in the aperture ratio and an increase in stray capacitance of the liquid crystal display device.

As a method for solving the problems of the prior art described above, the present inventors exposed a positive resist formed on a protective insulating film to light from the back side of the substrate, thereby patterning the resist in a self-aligned manner with respect to the shape of the gate electrode. We have developed a method for forming a channel protective insulating film (Japanese Patent Application No. 1-243868). According to this method, a miniaturized thin film transistor can be obtained in which the transistor characteristics are not deteriorated due to misalignment of the channel protection insulating film 7.

However, in the method using the backside exposure described above, the gate electrode 3
It is not possible to form a pattern of a gap zO that separates the source portion and drain portion in the resist formed on the thin film in which the source portion and the drain portion are not separated.

Therefore, in order to form the gap 20 in the thin film,
The conventional method of exposing from the front side of the substrate must be used. For this reason, if the size of the base pattern is small, the pattern of the gap 20 cannot be aligned with the base pattern with high accuracy, and the pattern of the gap 20 is likely to be misaligned.

Further, if this pattern shift occurs, when performing etching to form the gap 20, the underlying channel portion type 1 amorphous silicon film 6 will be seriously damaged by etching. As a result, the formed thin film transistor no longer operates normally. In order to prevent this, it is necessary to increase the dimensions of each underlying layer, which makes it difficult to reduce the dimensions of the thin film transistor.

The present invention has been made to solve the above problems, and its purpose is to align the pattern of the gap that separates the source and drain parts of a thin film transistor with the underlying pattern with high precision, and to form a thin film transistor. An object of the present invention is to provide a method for manufacturing a matrix type liquid crystal display substrate that can be downsized.

(Means for Solving the Problems) A method for manufacturing a matrix type liquid crystal display substrate of the present invention is a method for manufacturing a matrix type liquid crystal display substrate having thin film transistors on a substrate having light transmittance. forming a thin film on the thin film; forming a negative resist on the thin film; irradiating the negative resist with light from the back side of the substrate using the gate electrode of the thin film transistor as a light shielding mask; 8- Forming a resist mask on the thin film having a pattern shifted inward from the edge of the gate electrode by over-exposing the resist; etching the thin film using the resist mask; forming a gap, thereby achieving the above object.

(Function) In FIG. 4(a), using the gate electrode 3 formed on the insulating substrate 1 as a kind of photomask, light is irradiated from the bottom and back side of the insulating substrate 1, and the gate electrode 3 is exposed above the gate electrode 3. A cross-sectional view for explaining resist shift when the positive resist 13 on the formed thin film 30 is exposed to light is shown. Here, a patterned gate electrode 3 is formed on an insulating substrate 1 with a substrate protective film 2 interposed therebetween. A thin film 30 is formed on the gate electrode 3 with a first gate insulating film 4 and a second gate insulating film 5 interposed therebetween. A resist 13 is formed on the thin film 30. The exposed portion 13t) of the resist 13 is indicated by a dashed line. On the other hand, an unexposed portion 13a of the resist 13 is shown by a solid line.

Usually, an insulating substrate, a substrate protection film, a gate insulating film, a 9-channel semiconductor film, a channel protection insulating film, a contact layer, and the like are formed of a material that transmits light. Here too, the insulating substrate 1, the substrate protection film 2, the first gate insulating film 4, the second gate insulating film 5, and the thin film 30 are formed of a material having light transmittance. Therefore, when the resist 13 formed on the thin film 30 is irradiated with light from the back side of the transparent insulating substrate 1 using a material that does not transmit light as the gate electrode 3, the irradiated light is not blocked by the gate electrode 3. The resist 13 formed in the area is exposed. When the exposure amount is increased, overexposure of the resist 13 starts from a portion of the region shielded from light by the gate electrode 3 that is close to the region not shielded from light. Therefore, the exposed portion of the resist 13 above the gate electrode 3 uniformly extends inward from the portion above the edge of the gate electrode 13 as the exposure amount increases. thus,
Using the pattern of the gate electrode 13 as a kind of photomask, resist 13 is applied from below and from the back side of the insulating substrate l.
By irradiating with a predetermined amount of light, it is possible to form a pattern shifted by a predetermined length from above the groove of the gate electrode. When a positive resist is used as the resist, an unexposed portion 13a remains on the thin film 30 after development, as shown in FIG. 4(a).

On the other hand, when a negative resist 26 is used as the resist, after development, as shown in FIG. It remains on the thin film 30. In this way, a resist pattern having a gap above the gate electrode 3 can be formed in self-alignment with the pattern of the gate electrode 3.

FIG. 5 shows the relationship between the shift amount and the exposure amount of the positive resist. The resist shift amount is calculated by shifting the width of the exposed portion 13a of the resist 13 above the gate electrode 3 along the width direction of the gate electrode 3 to the edge of the gate electrode 3.
This is the value measured from (see Figure 4). As can be seen from FIG. 5, there is a proportional relationship between the exposure amount and the resist shift amount.

11- Regarding the relationship between the shift amount and the exposure amount of the negative resist, a relationship similar to that shown in FIG. 5 can be obtained. By adjusting the exposure amount based on these relationships, the resist shift amount can be controlled to a desired magnitude with high precision.

Note that this resist shift amount can be adjusted not only by the exposure amount but also by the side surface inclination angle (taper angle) of the gate electrode 3.

In this way, by changing the amount of exposure from the back side of the negative resist formed on the substrate, the width and position of the thin film formed on the gate electrode can be controlled with high precision in the width direction of the gate electrode. A gap can be formed in a self-aligned manner.

(Example) The present invention will be described below with reference to Examples.

FIG. 2 shows a partial plan view of a matrix type liquid crystal display substrate formed by the method of this example. This matrix type liquid crystal display substrate consists of thin film transistors of an inverted staggered structure, pixel electrodes 11, and gate bus bars arranged in a matrix shape through a protective insulating film formed on a light-transmissive insulating substrate. (scanning line) 23 and a source bus bar (signal line) 29. The gate bus bar 23 and the source bus bar 29 form a grid pattern by crossing each other. On the protective insulating film in the area surrounded by the gate bus bar 23 and the source bus bar 29, a picture element electrode 11 made of a transparent electrode is provided.
is formed. The picture element electrode 11 is formed integrally with a drain electrode 10 of a thin film transistor functioning as an address element. Gate electrode 3 of thin film transistor
is connected to the gate bus bar 23. Further, the source electrode 9 is electrically connected to a source bus bar 29. Above the gate electrode 3, between the source electrode 9 and the drain electrode 10, the source electrode 9 and the drain electrode lO
A gap 20 with a width of 3 μm is provided to separate the two.

Next, the cross-sectional structure of the thin film transistor shown in FIG. 2 will be described with reference to FIG. 3, which is a cross-sectional view taken along the line A--A in FIG. 2.

13- On the gate electrode 3, the - and second gate insulating films 4.5
A channel portion protective insulating film 7 is formed with the channel portion i-type amorphous silicon film 6 interposed therebetween. The channel protection insulating film 7 extends from the edge of the gate electrode 3 to the inside thereof.
The pattern t is shifted by 2 μm. A gap 20 is formed on the channel part J-type amorphous silicon film 6.
Contact layers 8a and 8b are formed separated by. A source electrode 9 is provided on the source side contact layer 8a.
However, there is a drain electrode I on the drain side contact layer 8b.
O is provided respectively. Both the source electrode 9 and the drain electrode 10 are made of transparent electrodes. Source electrode 9
A part of the source bus bar 29 is in contact with the top, and an auxiliary drain electrode 14 is provided on the drain electrode 10 .

In the above thin film transistor, the channel protective insulating film 7 is formed on the gate electrode 3 by a self-aligned patterning method in which overexposure is performed from the back side of the substrate, as will be described later. A gap 20 is formed above. Therefore, there is no need for a dimensional margin in the design that takes into account the positional deviation between these patterns.

Therefore, characteristic defects of the thin film transistor due to positional deviation do not occur, and moreover, the thin film transistor is miniaturized, and the aperture ratio of the matrix type liquid crystal display substrate is improved.

Next, a method for manufacturing the above matrix type liquid crystal display substrate will be explained with reference to FIG.

First, a substrate protective film made of tantalum pentoxide (thickness: 50 mm
00 large) 2 was deposited. Tantalum (4000 Å thick) was deposited on the substrate protective film 2 by sputtering.

Tantalum is a material that does not transmit light. After the deposition, a gate electrode 3 was formed by photoetching. In this embodiment, at this time, the gate bus bar 23 (second
(see figure) was also formed using tantalum.

Next, the surface of the gate electrode 3 is oxidized by anodic oxidation,
A first gate insulating film 4 of tantalum pentoxide (thickness: 3000 A) was formed. On top of this, a nitride film (SiNx film, 4000 mm thick) was formed using the Blaz 15-ma CVD method.
A) was formed to serve as the second gate insulating film 5.

An amorphous silicon film (with a thickness of 3
After forming the nitride film (SiNx film, 2000 mm thick) as the protective insulating film 17 which will become the channel protective insulating film 7 (FIG. 1(a)).

The substrate protective film 2, second gate insulating film 5, amorphous silicon film 16, and protective insulating film 17 formed in this manner are all made of a material having light transmittance.

Next, a positive resist 13 is applied on the protective insulation RMlV, and the exposure amount is 750 mJ/cm2 from the back side of the insulating substrate 1.
An overexposure was performed (FIG. 1(b)).

In this way, the resist 13 was patterned in a self-aligned manner with respect to the pattern of the gate electrode 3.

However, since the resist pattern formed by this backside exposure corresponds to the pattern of the gate electrode 3, in order to obtain the island-like pattern shown in FIG. The portion to be exposed in the light-shielded area must be exposed from the normal substrate surface side. By this exposure from the front side, the position and pattern width of the channel protection insulating film 7 are determined in the direction perpendicular to the gate electrode width direction (channel width direction). Therefore, among the portions that were not exposed in the previous backside exposure, the portions to be removed were exposed from the front side of the substrate, so that the pattern of the resist 13a was formed into a desired island-like pattern.

By etching the protective insulating film 17 using the resist 13a patterned in the shape of the channel protective insulating film 7 as a mask, the etching pattern was shifted inward by 2 μm from the edge of the gate electrode 3, as shown in FIG. 1(C). A channel protection insulating film 7 having an island pattern was formed. In this way, in the channel length direction, patterning is performed in a self-aligned manner with respect to the gate electrode 3 by backside exposure, and in the channel width direction, patterning is performed by normal exposure from the front side.
7 A channel portion protective insulating film 7 patterned by light was obtained.

After removing the resist 13a, an n4 type microcrystalline silicon film (film thickness 400A), which will become the contact layers 8a and 8b, is deposited by plasma CVD, and an n+m microcrystalline silicon film and an i type amorphous silicon film 16 are successively deposited. By photo-etching using the method described above, first, a channel/l[f-type amorphous silicon film 6 of a thin film transistor and a contact layer 18 in which the gate portion and the drain portion are not separated were formed ((Fig. 1(d)). )
).

Thereafter, a transparent conductive film (thickness: 1000 Å) containing indium oxide as the main component was deposited by sputtering, and this was photoetched by a conventional method to form the picture element electrodes 11,
Then, an electrode 21 was formed in which the source portion and the drain portion were not separated ((FIG. 1(e)).

Next, a negative photoresist 26 is applied, and the exposure amount is 1500 to 2°00 mJ/cm from the back side of the insulating substrate l.
Two overexposures were performed. As a result, after 18- development, a resist pattern was formed above the gate electrode 3 having an unexposed portion 26a as a gap pattern with a resist shift amount of 3 μm from the edge of the gate electrode and a width of 3 μm ((FIG. 1(f) )).

Next, using the exposed portion 26b of the resist as a mask, the electrode 21 and the contact layer 18, in which the source portion and the drain portion are not separated, are successively etched to form a gap 20, and the electrode 21 and the contact layer 18 are etched. The source and drain portions of contact layer 18 were separated. In this way, source electrode 9, source side contact layer 8a, drain electrode 10, and drain side contact layer 8b were formed.

After that, Ti and Mo are removed by sputtering.

A source pass line 29 and an auxiliary drain electrode 14 were formed by depositing a metal film such as W and photoetching the metal film using a conventional method.

A nitride film (SiNx film, film thickness 300 mm) is used as the protective insulating film 12.
0 Å) was deposited on the entire surface to produce a 19-layer liquid crystal display substrate of this example.

As described above, in this example, the channel protective insulating film 7 and the gap 20 were formed in a self-aligned pattern with respect to the pattern of the gate electrode 3. Therefore, deterioration of transistor characteristics due to misalignment of the channel protection insulating film 7 and the gap 20 did not occur.

In the above example, the electrode 21 was formed on the light-transmitting electrode 21. Backside exposure was performed on the negative resist 26. For this reason, using the resist 26b as a mask, the electrode 21 has a source portion and a drain portion that are not separated.
And the contact layer 18 could be etched successively. However, the method of the present invention is not limited to the above embodiments. For example, source electrode 9 and drain electrode l
Even if a negative resist is formed on the contact layer 18 in which the source part and the drain part are not separated before forming the electrode thin film that becomes O, and the backside exposure of the present invention is performed on this resist. good.

In this case, after separating the source part and drain 20-in part of the direct layer 18 and removing the resist, an electrode thin film that becomes the source electrode 9 and the drain electrode 1o is formed, and the source electrode 9 and the drain electrode 1o are formed on the film. A resist pattern will be formed to separate the electrode IO. Therefore,
Although the number of steps is increased compared to the above embodiment, it becomes possible to use a material that does not have light transmittance as the electrode thin film material. However, when using a non-transparent electrode thin film material, the gap pattern separating the source electrode and drain electrode is formed by conventional exposure from the front side.

Further, in this embodiment, an n+ type microcrystalline silicon film is used as the contact layer 8assb in order to reduce the contact resistance, but other materials such as an n+ type amorphous silicon film may be used.

(Effects of the Invention) As described above, according to the method of the present invention, by adjusting the exposure amount from the back side of the substrate, a gap patterned in a self-aligned manner with respect to the shape of the genit electrode is formed above the gate electrode. Therefore, the position and width of the gap can be controlled with high precision, and it is possible to obtain a thin film transistor in which the transistor characteristics do not deteriorate due to misalignment of the gap. Since the dimensional margin of the base pattern for alignment of the gap pattern is no longer required, the thin film transistor can be made smaller, and the matrix type liquid crystal display substrate can be made to have higher density and higher image quality.

4. Figures 1 (a) to (f) are cross-sectional views showing embodiments of the present invention;
FIG. 2 is a partial plan view of a matrix type liquid crystal display substrate manufactured by the method of the embodiment shown in FIG. 1, FIG. 3 is a sectional view taken along line A-A in FIG. b) is a cross-sectional view for explaining the amount of resist shift, FIG. 5 is a graph showing the relationship between the exposure amount and the amount of resist shift, and FIG. 6 is a partial plan view of a matrix type liquid crystal display substrate manufactured by a conventional method. , FIG. 7 is a sectional view taken along the line B--B in FIG. 6.

l... Insulating substrate, 2... Substrate protective film, 3... Gate electrode, 4... First gate insulating film, 5... Second gate insulating film, 6... -Channel part I-type amorphous silicon film, 7...Channel part protective insulating film, 8a, 8b...
- Contact layer, 9... Source electrode, i o-... Drain electrode, 11... Picture element electrode, 12... Protective insulating film, 13... Positive type resist, 13a... Positive type resist unexposed portion of 13b... exposed portion of positive resist, 20... gear knob, 26.
... Negative resist, 26a... Unexposed portion of negative resist, 26b... Exposed portion of negative resist, 23... Gate bus bar (scanning line),
29... Source bus bar (signal line), 30... Thin film.

that's all

Claims (1)

[Claims] 1. A method for manufacturing a matrix type liquid crystal display substrate having thin film transistors on a light-transmitting substrate, comprising: forming a thin film above a gate electrode of the thin film transistor; and forming a thin film on the thin film. A step of forming a negative resist, and using the gate electrode as a light-shielding mask, irradiates the negative resist with light from the back side of the substrate and overexposes the negative resist, thereby removing light from the edge of the gate electrode. A matrix type liquid crystal display substrate comprising: forming a resist mask having an inwardly shifted pattern on the thin film; and etching the thin film using the resist mask to form a gap in the thin film. Production method.