JPH03201534A - Formation of wiring pattern composed of buried metal - Google Patents

Formation of wiring pattern composed of buried metal

Info

Publication number
JPH03201534A
JPH03201534A JP34361189A JP34361189A JPH03201534A JP H03201534 A JPH03201534 A JP H03201534A JP 34361189 A JP34361189 A JP 34361189A JP 34361189 A JP34361189 A JP 34361189A JP H03201534 A JPH03201534 A JP H03201534A
Authority
JP
Japan
Prior art keywords
metal layer
metal
substrate
wiring pattern
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34361189A
Other languages
Japanese (ja)
Inventor
Makoto Sasaki
誠 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP34361189A priority Critical patent/JPH03201534A/en
Publication of JPH03201534A publication Critical patent/JPH03201534A/en
Pending legal-status Critical Current

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  • ing And Chemical Polishing (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は埋め込み金属からなる配線パターンの形成方法
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of forming a wiring pattern made of embedded metal.

〔従来の技術〕[Conventional technology]

従来、LSIや薄膜デバイス等の半導体製造プロセスに
おいて、ガラス等の絶縁基板上に埋め込み金属からなる
配線パターンを形成する場合、たとえば基板の表面に配
線用の溝または穴を形成し、この溝または穴に金属をリ
フトオフ法あるいは等速エッチバック法により埋め込ん
で配線パターンを形成する方法がとれらている。
Conventionally, in the manufacturing process of semiconductors such as LSI and thin film devices, when forming a wiring pattern made of embedded metal on an insulating substrate such as glass, for example, a groove or hole for wiring is formed on the surface of the substrate, and the groove or hole is A method of forming a wiring pattern by embedding metal in the substrate using a lift-off method or a constant-speed etch-back method is used.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、リフトオフ法は第2図(a)(b)に示
すように溝(または穴)1が形成された基板2上の配線
用金属4をレジスト3と共に取り除く方法であるため、
配線パターンのエツジ部にバリ5が発生しやすいという
問題がある。また、等速エッチバック法は第3図(a)
〜(C)に示すように配線用金属4の表面に平坦化用の
塗布剤6を塗布してエッチバックする方法であるため、
配線用金属4と平坦化用塗布剤6の等速エツチング条件
を見つけ出すのに困難を要するという問題があった。
However, since the lift-off method is a method of removing the wiring metal 4 on the substrate 2 in which the groove (or hole) 1 is formed together with the resist 3 as shown in FIGS. 2(a) and 2(b),
There is a problem in that burrs 5 are likely to occur at the edge portions of the wiring pattern. Furthermore, the constant velocity etchback method is shown in Figure 3(a).
As shown in ~(C), this is a method of applying a flattening coating agent 6 to the surface of the wiring metal 4 and etching back.
There is a problem in that it is difficult to find uniform etching conditions for the wiring metal 4 and the planarizing coating 6.

本発明は上記のような事情に鑑みてなされたもので、そ
の目的は基板上に埋め込み金属からなる配線パターンを
形成することのできる埋め込み金属からなる配線パター
ンの形成方法を提供することにある。
The present invention has been made in view of the above-mentioned circumstances, and its object is to provide a method for forming a wiring pattern made of embedded metal, which can form a wiring pattern made of embedded metal on a substrate.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題を解決するために本発明は、溝または穴が形成
された基板上に配線用金属層を形成し、この金属層にレ
ーザ光を照射して前記金属層の表面を平坦化させた後、
前記金属層を厚さ方向にエツチングするものである。
In order to solve the above problems, the present invention forms a metal layer for wiring on a substrate in which grooves or holes are formed, and after flattening the surface of the metal layer by irradiating this metal layer with laser light. ,
The metal layer is etched in the thickness direction.

〔作 用〕[For production]

すなわち本発明では、配線用金属層の表面をレーザ光に
より平坦化(リフロー)した後、金属層を厚さ方向にエ
ツチングするので、基板に形成された溝または穴に配線
用金属を容易に埋め込むことができ、基板上に埋め込み
金属からなる配線パターンを形成することができる。
That is, in the present invention, the surface of the wiring metal layer is flattened (reflowed) using a laser beam, and then the metal layer is etched in the thickness direction, so that the wiring metal can be easily filled into the grooves or holes formed in the substrate. It is possible to form a wiring pattern made of embedded metal on the substrate.

〔実施例〕〔Example〕

以下、第1図(a)〜(d)を参照して本発明の一実施
例を説明する。
An embodiment of the present invention will be described below with reference to FIGS. 1(a) to 1(d).

第1図(a)〜(d)において、11はガラス等からな
る絶縁基板であり、この基板11上に埋め込み金属から
なる配線パターンを形成するには、まず第1図(a)に
示すように基板11の表面に所定パターンの溝(または
穴)12を形成する。
In FIGS. 1(a) to 1(d), reference numeral 11 is an insulating substrate made of glass or the like, and in order to form a wiring pattern made of embedded metal on this substrate 11, first, as shown in FIG. 1(a), A predetermined pattern of grooves (or holes) 12 is formed on the surface of the substrate 11.

次に第1図(b)に示すように基板11上にアルミ等か
らなる配線用金属層13を蒸着等の方法により形成した
後、この金属層13の表面にレーザ光を照射する。この
ように金属層13の表面にレーザ光を照射すると、金属
層13の表面部分が溶融し、第1図(C)に示すように
金属層13の表面が平坦化される。
Next, as shown in FIG. 1(b), a wiring metal layer 13 made of aluminum or the like is formed on the substrate 11 by a method such as vapor deposition, and then the surface of this metal layer 13 is irradiated with laser light. When the surface of the metal layer 13 is irradiated with laser light in this manner, the surface portion of the metal layer 13 is melted, and the surface of the metal layer 13 is flattened as shown in FIG. 1(C).

次に金属層13の表面部分の金属が固化した後、金属層
13を厚さ方向にエツチングする。このように金属層1
3の表面を平坦化した後に金属層13を厚さ方向にエツ
チングすると、第1図(d)に示すように基板11上の
金属層13が除去され、基板11上に埋め込み金属14
からなる配線パターンが形成される。
Next, after the metal on the surface portion of the metal layer 13 is solidified, the metal layer 13 is etched in the thickness direction. In this way, metal layer 1
When the metal layer 13 is etched in the thickness direction after the surface of the substrate 3 is planarized, the metal layer 13 on the substrate 11 is removed as shown in FIG.
A wiring pattern consisting of the following is formed.

このように上記実施例では金属層13の表面をレーザ光
により平坦化した後に金属層13を厚さ方向にエツチン
グするので、基板11に形成された溝12に金属を容易
に埋め込むことができ、基板11上に埋め込み金属14
からなる配線パターンを形成することができる。
As described above, in the above embodiment, since the surface of the metal layer 13 is flattened by a laser beam and then the metal layer 13 is etched in the thickness direction, the groove 12 formed in the substrate 11 can be easily filled with metal. Embedded metal 14 on the substrate 11
A wiring pattern consisting of the following can be formed.

なお、本発明は上記実施例に限定されるものではなく、
本発明の要旨を逸脱しない範囲で種々の変形実施が可能
である。
Note that the present invention is not limited to the above embodiments,
Various modifications can be made without departing from the spirit of the invention.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、溝または穴が形成された
基板上に配線用金属層を形成し、この金属層にレーザ光
を照射して前記金属層の表面を平坦化させた後、前記金
属層を厚さ方向にエツチングするものである。したがっ
て、基板に形成された溝または穴に配線用金属を容易に
埋め込むことができ、基板上に埋め込み金属からなる配
線パターンを形成することができる。
As explained above, in the present invention, a metal layer for wiring is formed on a substrate in which grooves or holes are formed, and after flattening the surface of the metal layer by irradiating this metal layer with laser light, The metal layer is etched in the thickness direction. Therefore, the wiring metal can be easily embedded in the groove or hole formed in the substrate, and a wiring pattern made of the embedded metal can be formed on the substrate.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(d)は本発明の一実施例を示す配線パ
ターンの形成工程図、第2図(a)(b)はリフトオフ
法の説明図、第3図(a)〜(C)は等速エッチバック
法の説明図である。 11・・・基板、12・・・溝、13・・・配線用金属
層、14・・・埋め込み金属。 第1 叉 ム ロ 第3
FIGS. 1(a) to (d) are process diagrams for forming a wiring pattern showing one embodiment of the present invention, FIGS. 2(a) and (b) are explanatory diagrams of the lift-off method, and FIGS. 3(a) to ( C) is an explanatory diagram of the constant velocity etch-back method. DESCRIPTION OF SYMBOLS 11... Substrate, 12... Groove, 13... Metal layer for wiring, 14... Embedded metal. Part 1: Part 3

Claims (1)

【特許請求の範囲】[Claims]  溝または穴が形成された基板上に配線用金属層を形成
し、この金属層にレーザ光を照射して前記金属層の表面
を平坦化させた後、前記金属層を厚さ方向にエッチング
することを特徴とする埋め込み金属からなる配線パター
ンの形成方法。
A metal layer for wiring is formed on a substrate in which grooves or holes are formed, and the metal layer is irradiated with a laser beam to flatten the surface of the metal layer, and then the metal layer is etched in the thickness direction. A method for forming a wiring pattern made of embedded metal, characterized by:
JP34361189A 1989-12-28 1989-12-28 Formation of wiring pattern composed of buried metal Pending JPH03201534A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34361189A JPH03201534A (en) 1989-12-28 1989-12-28 Formation of wiring pattern composed of buried metal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34361189A JPH03201534A (en) 1989-12-28 1989-12-28 Formation of wiring pattern composed of buried metal

Publications (1)

Publication Number Publication Date
JPH03201534A true JPH03201534A (en) 1991-09-03

Family

ID=18362876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34361189A Pending JPH03201534A (en) 1989-12-28 1989-12-28 Formation of wiring pattern composed of buried metal

Country Status (1)

Country Link
JP (1) JPH03201534A (en)

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