JPH0320162U - - Google Patents
Info
- Publication number
- JPH0320162U JPH0320162U JP7932889U JP7932889U JPH0320162U JP H0320162 U JPH0320162 U JP H0320162U JP 7932889 U JP7932889 U JP 7932889U JP 7932889 U JP7932889 U JP 7932889U JP H0320162 U JPH0320162 U JP H0320162U
- Authority
- JP
- Japan
- Prior art keywords
- data
- flag
- bytes
- storage means
- itself
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Record Information Processing For Printing (AREA)
Description
第１図は本考案によるプリセツトメモリ装置を
実施したラベルプリンタの１実施例のＰＬＵフオ
マツトモードのフローチヤート、第２図は同実施
例の空きエリアサーチのフローチヤート、第３図
は同実施例のＰＬＵ読み出しのフローチヤート、
第４図は同実施例のＰＬＵ分配のフローチヤート
、第５図は同実施例のブロツク図、第６図は同実
施例のＰＬＵメモリの記憶状態を示す図、第７図
は同実施例で用いる選択フラグ部の詳細を示す図
、第８図は同実施例の表示部での表示の一例を示
す図、第９図は従来のプリセツトメモリ装置の記
憶状態を示す図である。
２……ＣＰＵ（読み出し手段、走査手段、分配
手段）、１４……ＰＬＵメモリ（記憶手段）、１
６１乃至１６８……フラグ手段、１６９……合計
バイト数記憶手段。
Fig. 1 is a flowchart of the PLU format mode of an embodiment of a label printer implementing a preset memory device according to the present invention, Fig. 2 is a flowchart of an empty area search of the same embodiment, and Fig. 3 is a flowchart of the same implementation. Example PLU read flowchart,
FIG. 4 is a flowchart of PLU distribution in the same embodiment, FIG. 5 is a block diagram of the same embodiment, FIG. 6 is a diagram showing the storage state of the PLU memory in the same embodiment, and FIG. 7 is a diagram in the same embodiment. FIG. 8 is a diagram showing details of the selection flag section used, FIG. 8 is a diagram showing an example of the display on the display section of the same embodiment, and FIG. 9 is a diagram showing the storage state of a conventional preset memory device. 2... CPU (reading means, scanning means, distribution means), 14... PLU memory (storage means), 1
6 1 to 16 8 ... Flag means, 16 9 ... Total number of bytes storage means.
Claims (1)
に対応しかつ予め定めた順序に配列され上記各デ
ータのうち選択されたデータに対応するものには
フラグが立つているフラグ手段と、上記選択され
たデータの合計バイト数を記憶している合計バイ
ト数記憶手段と、上記選択されたデータを上記予
め定めた順序のうち選択されなかつたデータの部
分をつめた配列とした１組のデータをそれぞれ基
準データを先頭として複数組連続して記憶してい
る記憶手段と、上記基準データに基いて選択した
１組のデータの先頭アドレスから上記合計バイト
数分だけ上記記憶手段から読み出す読み出し手段
と、上記フラグ手段をその配列に従つて走査し立
つている上記フラグを見つける走査手段と、この
走査手段が上記立つているフラグを見つけるごと
にそのとき自己が指定しているアドレスから上記
フラグが立つているデータのバイト数分だけデー
タを上記分配用記憶手段から読み出すと共に自己
が指定しているアドレスを上記フラグが立つてい
るデータのバイト数分だけ進める分配手段とを、
具備するプリセツトメモリ装置。 a flag means corresponding to a predetermined plurality of different types of data, arranged in a predetermined order, and setting a flag on a piece of data corresponding to the selected data; a total byte number storage means for storing the total number of bytes of , and a set of data in which the selected data is arranged in an array including the part of the data not selected in the predetermined order, respectively, as reference data. a storage means for sequentially storing a plurality of sets of data starting from the above; a reading means for reading from the storage means the total number of bytes from the start address of one set of data selected based on the reference data; and the flag means. a scanning means to scan according to the array to find the flag set above, and each time this scanning means finds the flag set above, it scans the data for which the flag is set from the address specified by itself at that time. a distribution means that reads data by the number of bytes from the distribution storage means and advances the address specified by itself by the number of bytes of data for which the flag is set;
A preset memory device is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7932889U JPH0755073Y2 (en) | 1989-07-04 | 1989-07-04 | Preset memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7932889U JPH0755073Y2 (en) | 1989-07-04 | 1989-07-04 | Preset memory device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0320162U true JPH0320162U (en) | 1991-02-27 |
| JPH0755073Y2 JPH0755073Y2 (en) | 1995-12-20 |
Family
ID=31623387
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7932889U Expired - Fee Related JPH0755073Y2 (en) | 1989-07-04 | 1989-07-04 | Preset memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0755073Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5882050A (en) | 1997-04-15 | 1999-03-16 | Williams; Peter C. | Ferrule with relief to reduce galling |
-
1989
- 1989-07-04 JP JP7932889U patent/JPH0755073Y2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0755073Y2 (en) | 1995-12-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |