JPH0321036A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent deformation of a wiring electrode and occurrence of accidents such as discontinuity, etc., by forming an insulating film as a protective wall, in contact with the sidewall of wiring right below a bonding region. CONSTITUTION:Insulating films thick enough 3, 12, and 13 are formed as protective walls so that they may be higher than wirings 7-9, being in contact with the sidewalls of an electrode and wirings 7-9 on an active element region right below a wire bonding region. That is, since the insulating films 3, 12 and 13, higher than the sidewalls of the Al wirings 7-9, exist in contact with them, bonding stress is transmitted first to these insulating films 3, 12 and 13, and bonding stress to the Al wiring parts 7-9 to be applied later is relaxed. Hereby, the deformation of wiring electrode material and wire discontinuity can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device in which a bonding pad is formed on an active area on a surface of a semiconductor substrate.

[Prior Art] In a semiconductor integrated circuit device (IC, LSI), referring to FIG. 2, a region (active region) in which active elements such as transistors and diodes are formed on the surface of a semiconductor substrate and electrodes and A wiring 8 is formed, and Afl wiring of a second or higher layer is formed thereon via an interlayer insulating film 4.
A structure in which a part of the upper layer AQ wiring is extended or connected as a wire body link panode 5 is conventionally known.

As semiconductor devices become more highly integrated, bonded ink pads are placed directly above the active area, so-called BPA.
Structure (Bonding Pad on Actjve)
Area) tends to increase.

[ILL PROBLEM TO BE SOLVED BY THE INVENTION] In the conventional BPA structure technology, the crimping step during wire bonding is
- Consideration has been given to improving the strength of the interlayer insulating film to prevent the thread from directly hitting the active area and to some extent to prevent deformation of the underlying electrode. was. For example, Tokugan Sho (Tokugan 5 5 -
1 1. 9817) describes a structure for preventing cracks in interlayer films using PSG. However, in this case, consideration is not given to how stress is transmitted, so
If a soft wiring/electrode material such as Afl is placed at a protruding height below the bonding pad, first
There were problems such as bonding stress being applied to Q, easily deforming the electrode, and further causing wire breakage.

The present invention is intended to solve these problems, and its purpose is to avoid applying bonding stress to the AQ wiring first in a BPA structure, and to prevent deformation and disconnection of the wiring electrode material. It is in.

[Means for Solving the Problems] In order to achieve the above object, the present invention provides an active element region and metal electrodes/wirings formed on the surface of a semiconductor substrate, and an insulating film formed thereon for wire bonding. A semiconductor device is provided with a pad made of a metal film, in which a sufficiently thick insulating film is protected so as to be in contact with a side wall of an electrode/wiring on an active element area immediately below the wire bonding area and to be higher than the wiring. It was formed as a wall.

The insulating film formed as a protective wall in contact with the side tank of the wiring directly under the bonding area described above has a high degree of hardness.
Moreover, it is preferable to use a material that does not easily cause flaking and is used in semiconductor processes; for example, Sj02,
Si3N4, A Q 20. Possible inorganic compounds such as It goes without saying that the difference in height between the protective wall and the AQ wiring should be larger, and the interval between the protective walls should be narrower.

[Function] A (Due to the existence of an insulating film higher than this provided in contact with the side wall of the A1 wiring, bonding stress is first transmitted to this insulating film, and then the bonding stress applied to the AI1 wiring portion is -Resistance has been alleviated, and the wiring no longer deforms.

[Example] Embodiments of the present invention will be described below with reference to the drawings.

3? FIG. 1 is a vertical cross-sectional view showing an example of a case where a BPA structure is applied to a semiconductor chip having a normal bibolar transistor.

1 is a semiconductor substrate (chip), 10.11 is an impurity diffusion layer formed on the surface of the substrate, and these constitute active regions such as transistors. 2 is SiO covering the surface
It is a pansivation film such as ■. 7, 8, and 9 are AQ wiring, and a part (8.9) is formed as an electrode that makes ohmic contact with the diffusion layer, and the other part is on the passivation film and connects between the electrodes and other wiring. They are provided so as to be connected to each other.

The thickness (height) of these Afl wiring is usually 1.0 to 3.0
It is about μm. Protective walls 3, 12 and 13 are provided to surround the side surfaces of the Afl electrode and AQ wiring. The height of the protective wall should be thick enough to exceed the height of the AQ film, 2 to 4 μm.
Set to about m. As the material of the protective film, a hard insulating material such as an inorganic compound such as Sin2 or plasma silicon nitrite (P-SN) is used. These protective walls 3 and 1 are formed in the process of forming the passivation film 2.
2. Form 13 all at once-4? You can leave it there. After forming the protective layer, an interlayer film 4 is formed to cover the entire surface of the chip. This interlayer film 4 is preferably made of a material with high mechanical strength, such as P-Si.
N is deposited to a thickness of about 1 μm.

After that, the AQ electrode 5 for wire bonding is attached to the interlayer film 4.
The bonding wire (Au) 6 leads to the assembly process. The bonding electrode 5 is made of an Afl film.
It is usually formed to a thickness of ~4 μm.

FIG. 3 is a longitudinal sectional view showing an example of a case where a BPA structure is applied to a semiconductor chip having a MOSFET, and corresponds to FIG. 2 showing a conventional example.

1 is a semiconductor substrate, 14 is a poly-Si gate electrode, and 2 is a passivation SiO2 film. Reference numeral 8 denotes an AQ wiring, which is covered with an interlayer film 4, on which a bonding pad 5 made of an Afl film is formed, and gate electrodes 14,
Wire bonding is performed using the Au wire 6 directly above the AQ wiring 8.

In this embodiment, P
The SG protective film 3 is formed thicker (higher) than the AQ wiring 8.

[Effects of the Invention] According to the present invention described above, the following effects are achieved.

Stress during wire bonding is first applied to the bonding electrode 5, and then applied to the thick protective layer 5 through the interlayer insulating film 4.
(3, 12, 13) and is not directly transmitted to the electrodes 7 and 8 located between the protective walls.As a result, accidents such as deformation and disconnection of the electrodes 7 and 8 can be prevented, and the semiconductor product Improved reliability.

[Brief explanation of the drawing]

FIG. 1 is a partial vertical sectional view of a semiconductor device (chip) showing an embodiment of a BPA structure to which the present invention is applied. FIG. 2 is a partial sectional view of a semiconductor chip showing an example of a conventional BPA structure. FIG. 3 shows another example of a BPA structure to which the present invention is applied, and is a partial sectional view corresponding to the conventional example shown in FIG. 2. 1...Semiconductor substrate (chip) 2...Sj○2 passivation film 3, 12.13...PSG protection wall 4...P-Sj. N interlayer film 5...AQ bonding electrode 6...Au wire 7,8.9...AQ wiring/electrode 1 0.1 1...Diffusion layer l4...Paris S cogate electrode 7-8

Claims (1)

[Scope of Claims] 1. A semiconductor in which an active element region and a metal electrode wiring are formed on one main surface of a semiconductor substrate, and a pad made of a metal film for wire bonding is provided thereon via an insulating film. A semiconductor device characterized in that a sufficiently thick insulating film is formed as a protective wall so as to be in contact with a side wall of an electrode/wiring on an active element region immediately below the wire bonding region so as to be higher than the wiring. . 2. The semiconductor device according to claim 1, wherein the insulating film formed in contact with the sidewall of the wiring directly under the bonding region is made of an inorganic compound.