JPH03210828A - Object identification system - Google Patents

Abstract

PURPOSE:To prevent wear of a battery and to improve the reliability of a data when a data carrier is driven by the battery by resetting the data carrier when the initial data communication is finished when the data carrier is stopped for a communication enable area. CONSTITUTION:A data carrier 12 mounted directly to a pallet 11 by which parts being object of identification are carried and a read write head RW 13 writing/reading a data to/from the data carrier 12 and an ID controller 14 connecting to the RW head 13 to control the operation are provided to the system. The RW head 13 and the ID controller 14 constitute a write/read control unit. In the write/read control unit, a modulation circuit 24 and an oscillation circuit 25 give intermittently the oscillation output to the data carrier 12 and when the communication is finished, its level is lowered. The data carrier 12 uses a voltage detection circuit 34 to detect the decrease on the oscillation level and stops the operation as the reset state when the output level is decreased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an identification system for tools used in machine tools, parts in factories, products used in product management, distribution systems, and the like.

[Conventional technology] In order to mechanize the management of tools in conventional machine tools and the identification of parts and products on assembly lines in factories, tools 1
A system is needed to identify and manage various items such as parts and products. Therefore, as in JP-A-63-221950 and JP-A-1-151831, a data carrier having a memory is provided in the object to be identified, and necessary information is written in the memory of the data carrier by data transmission from the outside. An article identification system has been proposed in which the information is read out as needed.

[Problem to be solved by the invention]

In such conventional identification systems, the write/read control unit was not able to detect that the data carrier entered the communication area. Then, in order to wait for the arrival of the data carrier, a method is used in which commands are constantly sent from the read/write head and judgment is made based on the presence or absence of a response from the data carrier. However, in such a method, communication is always performed between the data carrier and the read/write head while the data carrier exists in the communication area of the read/write head. Therefore, battery-powered data carriers have the disadvantage that the battery is consumed even when communication is not necessary. Furthermore, data carriers that are not battery-powered also perform constant communication if they are within a communicable area, which has the disadvantage of reducing data reliability.

The inventions of Claims 1 and 2 of the present application have been made in view of the problems of the conventional article identification system, and are designed to prevent data carriers from continuously communicating even if they are in a communication area. The technical challenge is to prevent battery consumption and data reliability from deteriorating.

[Means to solve the problem]

The present invention relates to a memory that holds data, a memory control unit that controls writing and reading of data to the memory, and data that demodulates commands and data given from the outside and sends the demodulated commands and data to the memory control unit to transmit the read data. An article identification system comprising a data carrier that has a transmission means and is attached to an article to be identified, and a write/read control unit that transmits data to the data carrier and receives the transmitted data, The write/read control unit includes a modulation circuit that outputs oscillation control signals with different predetermined cycles during transmission and reception, and an oscillation control signal that intermittents oscillation based on the oscillation control signal provided by the modulation circuit and amplitude control that is provided externally. An oscillation circuit that changes the amplitude of oscillation based on a signal, a reception circuit that receives a signal obtained from a data carrier, and a demodulation circuit that demodulates the output of the reception circuit.
It has a data carrier detection circuit that detects the presence or absence of a data carrier based on the demodulated output of a receiving circuit, and a control means that applies an amplitude control signal to an oscillation circuit after data transmission is completed, and the data carrier is connected to a resonant circuit. and a voltage detection circuit that discriminates the output level obtained by the resonant circuit and outputs a reset signal to stop the operation when the voltage decreases.
It is characterized by having the following.

[Effect]

According to the present invention having such characteristics, in the write/read control unit, the modulation circuit and the oscillation circuit intermittently give the oscillation output to the data carrier side at predetermined intervals, and when the communication ends, the amplitude I'm trying to lower the level. The data carrier detects a decrease in the amplitude level of this oscillation by a voltage detection circuit, and when the output level decreases, the data carrier is set to a reset state and stops operating.

[Explanation of Examples]

FIG. 2 is a block diagram showing the structure of an article identification system according to an embodiment of the present invention.
A data carrier 12 that is directly attached to the data carrier 12, a read/write head (hereinafter referred to as RW head) 13 that writes and reads data to and from the data carrier 12, and an RW head 13.
ID controller 14 that is connected to and controls its operation.
is provided. RW head 13 and ID controller 1
4 constitutes a write/read control unit. Further, the ID controller 14 is connected to a host computer 15.

Now, as shown in the block diagram in FIG. 1, the RW head 13 and the ID controller 14 are connected to a microprocessor (CPU) 21, which is a control means for controlling the writing and reading of data to the data carrier 12, and its system program and data. A memory 22 for holding is provided, and an input/output interface 23 for inputting and outputting data to and from the host computer 15 is provided. Now, the RW head 13 is the CPU
It has a modulation circuit 24 that modulates the output from 21 and an oscillation circuit 25 that is driven by the output. The modulation circuit 25 outputs modulation signals with different duty ratios based on the data to be sent to the data carrier, and upon reception, gives the oscillation circuit 25 an oscillation control signal with a predetermined duty ratio different from these, for example, a duty ratio of 50%. It is something. Further, an amplitude control signal from the CPU 21 is applied to an oscillation circuit 25, and is also applied to a reception circuit 26 as a reception gate signal. The oscillation circuit 25 intermittents oscillation according to the oscillation control signal of the modulation circuit 24 and changes its oscillation level according to the amplitude control signal, and outputs an ASK-modulated signal to the data carrier 12 via the coil Ll. It is.

Also, the received signal obtained from the data carrier 12 is sent to the coil L.
2 and the receiving circuit 26 to the demodulating circuit 27. The demodulation circuit 27 demodulates this signal and provides it to the CPU 21. Further, the output of the receiving circuit 26 and the amplitude control signal are given to a DC (data carrier) detection circuit 28.

The DC detection circuit 2 detects the signal obtained from the receiving circuit 26 when the amplitude control signal is at L level, and detects the presence or absence of the data carrier 12 based on the presence or absence of the output.The output is sent to the CPU 21. Given.

Next, the configuration of the data carrier 12 will be explained with reference to FIG. The data carrier 12 has a resonant circuit 30 consisting of a coil L3 and a capacitor, and a demodulation circuit 31 and a diode bridge 32 are connected to this resonant circuit. The diode bridge 32 rectifies the applied signal and provides it to the constant voltage circuit 33 and voltage detection circuit 34. The constant voltage circuit 33 supplies constant voltage power to each part of the data carrier, and the voltage detection circuit 34 detects a decrease in the amplitude level by discriminating the voltage decrease of the rectified output at a predetermined threshold level. The output is given to the memory control unit 35 as a reset signal. Furthermore, the demodulation circuit 31 demodulates the signal given from the RW head based on the duty ratio of the signal obtained by the resonance circuit 30 and supplies it to the memory control section 35 . The memory control unit 35 identifies commands and data from this signal, writes data to or reads data from the memory 36 based on the command, and the read data is given to the reverberation control pulse generator 37. The reverberation control pulse generator 37 controls reverberation by short-circuiting a pair of FETs at both ends of the resonant circuit 30 when transmitting a signal from the data carrier 12 to the RW head 13 side. . Here, the demodulation circuit 31 and the reverberation control pulse generator 37 are RW
It constitutes a data transmission means for transmitting data with the head 13.

Next, the operation of this embodiment will be explained with reference to time charts. FIG. 4 is a time chart showing the operation of each part of this embodiment. In this figure, FIG. 4(a) shows an amplitude control signal given to the RW head 13 from the ID controller 14. In this embodiment, ASK is sent from the ID controller to the data carrier as in the conventional example described above.
The signal is transmitted based on the duty ratio of the modulated signal, and when the signal is transmitted from the data carrier 12 to the RW head 13 side, the RW head 13 sends out a signal with a constant duty ratio, and its reverberation is controlled. I'm trying to transmit it. 4 shows data transmission from the data carrier 12 to the RW head 13 until time t + "" tz in FIG. 4, and at this time the amplitude control signal is set at H level. FIG. 4 and others) show an oscillation 111m signal output from the modulation circuit 24, which is a signal with a duty ratio of 50% for transmitting data from the data carrier 12 to the RW head 13.

Therefore, the oscillation circuit 25 outputs a waveform as shown in FIG. 4(C), which is received by the resonance circuit 3o of the data carrier 12. In order to control the reverberation based on the transmitted data, a signal as shown in FIG. 4(d) is obtained in the receiving circuit 26.

Now, when the communication between the data carrier 12 and the RW head 13 ends at time t2, the amplitude control signal becomes L level as shown in FIG. 4(a). Therefore, from now on, oscillation circuit 2
The appearance level of 5 will decrease as shown in FIG. 4(C). This will result in Figure 4(e).

As shown in Figure), the voltage detection port ll of the data carrier 12
134 detects the voltage drop, a reset signal is given to the memory control unit 35 of the data carrier 12, and the operation is stopped. On the other hand, since the RW head 13 is gated by the modulation input, the waveform of the output obtained from the receiving circuit 26 is as shown in FIG. 4(2) at time t2.
After that, the waveform becomes lower. As shown in FIGS. 4(c) and 4(i), the DC detection circuit 28 of the RW head I3 detects the presence of a data carrier by receiving and detecting this signal when the amplitude control signal is at L level and determining the presence or absence of the signal. is detected and given to the CPU 21.

In this way, if data transmission is finished when the data carrier 12 arrives in the communication area of the RW head 13, the R
Since data is not transmitted to and from the W head, unnecessary power consumption does not occur even when the device is stopped in a communication area, and the battery life can be extended and data can be stabilized. In addition, as shown in FIG. 5(a), the data carrier 12
Since the DC detection circuit 28 can detect whether or not the carrier is within the communication area, if it enters the communication area, it will automatically send an autocommand to perform the process of writing or reading data with the data carrier. Timing can be controlled. That is, if the data carriers attached to the pallet 11 continuously arrive in the communication area, D
The presence detection signal shown in FIG. 5(a) is obtained from the C detection circuit 28. Therefore, as shown in Figure 5 (b), when the data carrier no longer exists, the auto R/W command is sent, and as soon as the data carrier enters the communication area, the read/write process is performed, and from then on, the auto R/W command is sent. can be stopped. It is also possible to check the synchronization between the operations of transport lines, machine tools, etc., and the pallet on which the work is mounted.

Next, a second embodiment of the present invention will be described. In the embodiment described above, the data carrier stops in the communicable area and the RW
If a data carrier approaches while the oscillation amplitude level of the head is lowered, the amplitude level may increase and the head may switch to the normal operating mode. Furthermore, if the data carrier moves further away within the communication area, the data carrier may become absent mode. Therefore, in this embodiment, the oscillation amplitude level or reception gain can be controlled based on the reception amplitude level. FIG. 6 is a block diagram showing the configuration of such an RW head 4o. In this figure, the same parts as in the first embodiment described above are given the same reference numerals and detailed explanations will be omitted. In this embodiment, the output of the receiving circuit 26 is transmitted to the demodulating circuit 27. In addition to the DC detection circuit 28, the signal is guided to an amplitude adjustment circuit 41. Further, the amplitude control signal is similarly guided to the amplitude adjustment circuit 41. The amplitude adjustment circuit 41 detects the received signal level by detecting and rectifying the received signal when the amplitude control signal is at L level, and when the level decreases or increases, it adjusts the receiving gain of the amplifier of the receiving circuit 26. It is used to raise or lower the reception level and adjust it so that it remains constant. Also, instead of adjusting the amplification factor of the receiving circuit, the oscillation amplitude of the oscillation circuit 25 is adjusted to output a gain adjustment signal that keeps the reception level constant. In this way, by suppressing changes in the amplitude obtained from the receiving circuit 26 when detecting the presence of a data carrier and keeping its level approximately constant, malfunctions due to changes in the position of the data carrier can be prevented.

〔Effect of the invention〕

As explained in detail above, according to the inventions of Claims 1 and 2 of the present application, even if the data carrier stops in a communicable area, the data carrier enters the reset state when the first data communication ends. If the device is battery-driven, battery consumption can be prevented and the lifespan can be extended. Furthermore, since unnecessary data transmission is not performed, it is possible to improve the reliability of data on the data carrier. In addition to this effect, the invention of claim 2 of the present application provides a reliable reset function even when the position of the data carrier changes after the data carrier finishes data transmission in the communicable area and enters the reset state. The effect is that the condition can be maintained.

[Brief explanation of drawings]

FIG. 1 is an illustration of an article identification system according to an embodiment of the present invention.
A block diagram showing the configuration of the D controller and the RW head, FIG. 2 is a block diagram showing the overall configuration of the article identification system, and FIG. 3 is a block diagram showing the configuration of the data carrier.
Fig. 4 is a time chart showing the operation of this embodiment, Fig. 5 is a time chart when performing auto command processing using this embodiment, and Fig. 6 is a time chart showing the operation of the present embodiment.
FIG. 2 is a block diagram showing the configuration of a W head.

Claims (2)

[Claims] (1) a memory that holds data; and a memory control unit that controls writing data to and reading data from the memory;
It has a data transmission means that demodulates commands and data given from the outside and transmits the read data to the memory control unit, and transmits data to a data carrier attached to the article to be identified and the data carrier. a write/read control unit that receives the transmitted data;
An article identification system comprising: a modulation circuit that outputs oscillation control signals with different predetermined cycles during transmission and reception; and an oscillation control signal provided by the modulation circuit. an oscillation circuit that intermittents oscillation and changes the amplitude of oscillation based on an externally applied amplitude control signal; a receiver circuit that receives a signal obtained from a data carrier; and a demodulator circuit that demodulates the output of the receiver circuit. , a data carrier detection circuit that detects the presence or absence of a data carrier based on the demodulated output of the receiving circuit, and a control means that applies an amplitude control signal to the oscillation circuit after data transmission is completed, and the data carrier An article identification system comprising: a resonant circuit; and a voltage detection circuit that discriminates the output level obtained by the resonant circuit and outputs a reset signal to stop operation when the voltage decreases. (2) The write/read control unit includes an amplitude adjustment circuit that detects a reception output level and keeps the reception level constant when the data carrier detection circuit detects the absence of a data carrier. Article identification system as described.