JPH0321083Y2 - - Google Patents

Description

[Detailed Description of the Invention] Technical Field The present invention relates to a synchronization determination circuit for a phase modulated wave receiver.

Conventional technology Conventionally, in this type of device, synchronization was determined based on the output voltage of the AM detector, but if the sideband of the phase modulated wave exists within the tracking range of the phase-locked loop, the sideband The drawback is that pseudo-synchronization is determined based on the level of the signal, and the operator needs to re-acquire the received spectrum or video demodulated waveform while monitoring the received spectrum or video demodulated waveform each time. This means that when tracking a mobile satellite, the amount of missing data increases, and human intervention is required at all times, making it unsuitable for labor-saving operations.

Purpose of the invention Therefore, the purpose of the present invention is to automatically determine whether or not a phase-locked loop is synchronized with a carrier wave, and to control the phase-locked loop to synchronize with a predetermined carrier wave in the case of pseudo-synchronization. An object of the present invention is to provide a synchronization determination circuit for a phase-locked loop.

Structure of the invention The phase-locked loop synchronization determination circuit of the invention includes a voltage-controlled oscillator, a mixer for mixing the output of the voltage-controlled oscillator and an input signal from the phase-locked loop, and a band-limiting circuit for the output of the mixer. A bandpass filter, a level detector that detects the output level of the bandpass filter, a sweep signal generator that generates a sweep signal that sweeps the voltage controlled oscillator, and stores and inputs the sweep signal and the output level in association with each other. means for detecting the center of the spectrum of the signal; means for calculating the difference between the center of the spectrum of the input signal and the frequency of the input signal and determining whether the value is within a predetermined threshold; and the value means for converting said value into a signal for controlling a voltage controlled oscillator within the phase-locked loop when the value is outside a predetermined threshold.

Embodiments Hereinafter, the present invention will be described with reference to drawings of embodiments. FIG. 1 shows a signal input terminal 1, an AGC amplifier 2, a mixer 3, a band filter 4, an amplitude limiter 5, a synchronous phase detector 6, a reference signal input terminal 7,
A phase-locked loop of a phase-modulated wave device consisting of a loop filter 8, a voltage-controlled oscillator 9, and a controller 10 that controls the voltage-controlled oscillator 9 includes a mixer 11, a voltage-controlled oscillator 12, a band filter 13, a level detector 14, and a sample. And hold circuit 15, A/
A phase-locked loop synchronization determination circuit according to an embodiment of the present invention is provided, which comprises D converters 16 and 19, a clock generator 17, a sweep signal generator 18, a microcomputer 20, and an analog switch 21.

Next, the operation of the above circuit will be explained. First, the received signal inputted to the signal input terminal 1 becomes synchronized with the reference signal inputted to the reference signal input terminal 7 by a normal phase-locked loop signal capture operation, and the output of the mixer 3 becomes the reference signal. It has the same frequency as . Thereafter, the sweep signal from the sweep signal generator 18 is applied to the voltage controlled oscillator 12 via the analog switch 21 to control its output frequency. The output signal of the voltage controlled oscillator 12 and the output signal of the mixer 3 in the phase-locked loop are frequency converted, and after the S/N is improved in the band filter 13, the signal level within the band is determined in the level detector 14. Detected. The detection level signal is held by a sample-and-hold circuit 15 using a clock signal from a clock generator 17 as a timing signal, and is inputted to a microcomputer 20 as digital information via an A/D converter 16. On the other hand, the control voltage of the voltage controlled oscillator 12 is input to the microcomputer 20 as digital information via the A/D converter 19, and is stored in correspondence with the detection level signal. The microcomputer 20 detects the center of the signal energy distribution (spectrum) from the correspondence between the detection level signal and the control voltage, calculates the frequency difference between the detected point and the synchronized point, and sets the value as a predetermined threshold. If it is within the range, it is judged as "carrier synchronization", and if it is outside this range, this frequency difference is input as analog information to the controller 10 of the voltage controlled oscillator 9 of the phase-locked loop, and the phase-locked loop is is controlled to synchronize with a predetermined carrier wave. The synchronized point is analog switch 2.
1 and the control voltage of the voltage controlled oscillator 12 is set to 0 (V), the determination is made based on the correspondence between the detection level and the control voltage.

FIG. 2 is a flowchart showing the above operation. In step 22, the synchronization of the phase locked loop is confirmed. If it is asynchronous, next step 2
3, a normal phase-locked loop signal acquisition operation is performed. In step 24, the synchronization of the position synchronization loop is confirmed again. If it is asynchronous, the process returns to step 23, and if it is synchronous, the analog switch 21 is turned to the sweep signal generator 18 side in step 25, and the voltage controlled oscillator 12 is switched on. The voltage controlled oscillator 12 controls the output frequency and outputs the output from the A/D converter 19.
The digital frequency corresponding to the output frequency of the A/D converter 16 and the digital detection level from the A/D converter 16 at that time are stored in association with each other. In step 26, turn the analog switch 21 to the 0 (V) side and proceed to step 25.
Same processing as . In step 27, the determination circuit is selected depending on the expected degree of modulation of the input signal, that is, depending on which of the carrier wave and the modulated wave is larger. In step 28, the maximum level of the digital level information obtained in step 25 and its digital frequency value are calculated. In step 29,
The average frequency value above a predetermined level is calculated by the sum of the digital frequency values when the digital detection level obtained in step 25 is above a given level. In step 30, the frequency average value obtained in step 29 and the frequency value obtained in step 26 are compared,
If both are within an arbitrary frequency difference, step 32
If it is greater than that, the process advances to step 33. In step 31, the maximum level obtained in step 28 and the level value obtained in step 26 are compared, and if the level difference is within an arbitrary level difference, the process proceeds to step 32; if it is greater than that, the process proceeds to step 33. In step 32, the phase locked loop outputs (displays) that it is synchronized with the carrier wave. In step 33, a predetermined carrier wave frequency value is calculated from the frequency average value obtained in step 29 or the digital frequency value obtained in step 28 and the frequency obtained in step 26. In step 34, the carrier frequency value obtained in step 33 is applied to the controller 10 of the voltage controlled oscillator 9 so that the phase-locked loop is synchronized with a predetermined carrier.

In the above operation, the bandwidth of the bandpass filter 13 is determined by the operating level limit and spectral resolution of the present invention, and the sweep speed of the voltage controlled oscillator 12 is determined by the bandwidth of the bandpass filter 13. Further, the number of bits of the A/D converters 16 and 19 is determined in accordance with the detection accuracy of the spectrum resolution level.

Effects of the invention As explained above, in the phase-locked loop synchronization determination circuit of the present invention, pseudo-synchronization is automatically determined, and the influence of noise at low levels can be reduced by smoothing operations by repeating sweeps. .

Moreover, the capture operation after the pseudo-synchronization determination can be performed smoothly without requiring operator intervention.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a phase modulated wave device and a synchronization determination circuit for a phase-locked loop according to an embodiment of the present invention, and FIG. 2 is a flowchart of the circuit operation of FIG. 1. 11; mixer, 12: voltage controlled oscillator, 13;
Bandpass filter, 14; Level detector, 15; Sample and hold circuit, 16, 19; A/D converter, 17; Clock generator, 18; Sweep signal generator, 20; Microcomputer, 21; Analog switch.

Claims (1)

[Scope of utility model registration request] A voltage controlled oscillator, a mixer that mixes the output of the voltage controlled oscillator and the input signal from the phase-locked loop, a band filter that limits the band of the output of this mixer, and a level detector that detects the output level of this band filter. a sweep signal generator that generates a sweep signal to sweep the voltage controlled oscillator after synchronization is achieved in the phase-locked loop; means for detecting the center; means for calculating the difference between the frequency corresponding to the center of the spectrum of the input signal and the frequency of the input signal, and determining whether the value is within a predetermined threshold; A synchronization determination circuit for a phase-locked loop, comprising means for converting the value into a signal for controlling a voltage-controlled oscillator in the phase-locked loop when the value is outside a predetermined threshold range.