JPH0321161A - Image reader - Google Patents

Abstract

PURPOSE:To allow an operator to easily recognize the generation of an abnormal picture element in a reading means by detecting the abnormal picture element output of the reading means based upon the output of the reading means and displaying the reading abnormality based upon the detected output. CONSTITUTION:An original is irradiated with the light of a fluorescent lamp 15 and its reflected light is projected to the surface of a CCD 7 to form the original image on the CCD 7. The CCD 7 converts the original image into an electric signal and data for one line of main scanning are outputted as an analog electric signal synchronously with a synchronizing signal for main scanning. The output signal is amplified by an amplifier circuit 10 and converted into a digital signal by an A/D converter 11 and the digital signal is corrected at its shading by a shading correcting circuit 12 and outputted as a digital image signal. At that time, a control circuit 21 compares an average value obtained by previously reading out a reference face with the signal levels of respective picture elements, and at the time of detecting an abnormal picture element, displays the detected result on the display part of an operation part 24.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image reading apparatus, and more particularly to an image reading apparatus for obtaining a faithful image signal form.

In recent years, manuscripts have been read using solid-state imaging devices such as CCDs, and the read electrical signals are further converted into analog/digital signals and subjected to various digital processing, which can then be printed into images with printers or sent to remote locations. A device that does this has been put into practical use. In order to stabilize the operation of this type of device, an image signal correction circuit is used that uses digital signals to correct image signals such as uneven light emission of fluorescent lights, uneven light intensity distribution of the optical system, and uneven sensitivity of the CCD. There are many things. Conventionally, this type of circuit, especially equipment that handles high-speed image signals, has had to use expensive circuit elements in order to perform high-speed processing, and therefore, when complex correction processing and high accuracy are required. had the disadvantage that it was very expensive due to the large circuit scale.

For example, in a correction method that stores the image signal of a standard white board as a dental capture signal in a memory, etc., and corrects the image signal of the read document based on this data, high-speed processing is performed to store the image signal in the memory. A large amount of noise will be mixed into the stored correction signal. Therefore, in order to remove this noise, it was necessary to take the average value of neighboring pixels.

For this reason, additional circuits such as adder circuits, multiplier circuits, circuits for controlling the timing of arithmetic operations, etc., are required, and since they must be capable of high-speed operation, they are extremely expensive.

Furthermore, in this type of apparatus, even if there is a defect in the read image, there is no way to discover the cause of the failure other than by making a heart copy using a printer or the like and checking the image quality. Therefore, it takes time to find a fault, resulting in, for example, decreased productivity in a factory and decreased serviceability in the market.

Furthermore, in this type of device, it has been proposed that if there is an abnormal pixel, it should be corrected by linear interpolation or correlation between adjacent pixels.

However, such correction requires a complicated algorithm, and it is extremely difficult to perform high-speed real-time processing. In addition, if an abnormal pixel detection circuit is built-in, it will be possible to issue a warning and request the user to repair when an abnormal pixel occurs, so there is no need for such sophisticated corrections, and temporary correction will be made until repairs are made. It is sufficient if the

The present invention has been made in view of the above points, and has the object of making it easier for an operator to recognize the occurrence of abnormal pixels when reading an image of a document. a reading means for photoelectrically reading a document image pixel by pixel; a detecting means for detecting an abnormal pixel output of the reading means based on the output of the reading means; and a displaying abnormality in reading based on the output of the detecting means. The present invention provides an image reading device having a display means.

Another object of the present invention is to provide an image reading device that detects abnormal pixels by calculating the average value of signals obtained by reading a reference plane and multiplying the average value by the signal level of each pixel by one.

The present invention also provides an image reading device that detects abnormal pixels based on a plurality of signals obtained by reading a reference plane under different conditions.

The present invention also provides an image reading device that, when an abnormal pixel is detected during image reading, replaces the pixel signal with the signal of the previous normal pixel.

The present invention also provides an image reading device that corrects abnormal pixels that occur during image reading and displays the occurrence of abnormal pixels.

Hereinafter, the present invention will be explained in detail based on examples.

FIG. 1 is a simplified structural diagram of a document reading device to which the present invention is applicable.

A document placed face down on document table 9 is illuminated with fluorescent light 2, and an image of the document is formed on COD 7 for line reading through reflection mirrors 3, 5 and optical lens 6, and the document is scanned in the main scanning direction. Perform reading. The fluorescent lamp 2 and the reflecting mirrors 3 and 5 are moved along a guide rail 8 by an optical system motor (not shown) to scan the document table 9 and perform reading in the sub-scanning direction.

COD 7 converts the original image into an electrical signal. In this embodiment, so-called shading, such as uneven light emission of the fluorescent lamp 2, uneven density due to dirt on the reflecting mirrors 3 and 5, and islands in the luminous intensity distribution of the optical lens 7, is removed.

In this embodiment, a standard white plate 1 serving as a reference is read prior to the above-mentioned scanning, and then scanning is performed and image signal correction is performed based on the read signal of the standard white plate.

The standard white board 1 is a board for measuring the image signal, and the entire surface is uniformly painted, for example, white.

FIG. 2 is a diagram showing an example of the circuit configuration of a document reading device for performing image signal correction according to the present invention.

The document is illuminated by a fluorescent light 15, and the reflected light forms an image of the document on the CCD 7 via the optical lens 6. C.O.
At D7, the original image is converted into an electrical signal, and the main scanning line data is output as an analog electrical signal in accordance with the main scanning synchronization signal.

The amplifier circuit 10 amplifies this signal and converts it to the A/D converter 1.
．． The signal is converted into a digital signal at step 1, and after shading is corrected at shading correction circuit 12, it is connected to an external circuit as a digital image signal output.

The external circuit is, for example, a binary signal conversion circuit such as a binarization circuit or a dither processing circuit. The binary signal is, for example, LBP
, image electronic files, electronic transmission devices, and other devices.

In FIG. 2, a control circuit 2l is a control circuit for controlling the shading correction circuit 12 and the temperature and dimming of the fluorescent lamp 15, and operates upon receiving instructions from the main body control circuit 24.

An operation section 25 is connected to the main body control circuit 24, and issues instructions to start reading the document and displays the status of the apparatus.

The dimming circuit 18 is a control circuit for controlling the light amount of the fluorescent lamp 15, and performs dimming by controlling the lighting time by pulse width modulation according to instructions from the control circuit 2l.

The thermistor 13 is a temperature sensor for measuring the temperature of the tube wall of the fluorescent lamp 15. The measured output of the thermistor 13 is A/D converted by the A/D converter 22 and input to the control circuit 21, and the input data is used to control the temperature control circuit 19, 1, Reiha circuit 20, heat retention heater 14, and cooling fan. - By controlling the motor 16, the temperature of the tube wall of the fluorescent light 15 is set to 4
Control is performed so that the fluorescent light at around 0°C emits light most efficiently and stably.

Specifically, the thermistor 13 measures the tube wall temperature of the fluorescent light 13, and when the measured temperature is below 40'C, the heater 14 is turned on and the fan motor 16 is turned off, and the temperature is set at 40°C.
When the temperature is C or higher, turn off the heater 14 and turn off the fan motor 1G.
Turn on to control the temperature. In reality, since the fluorescent lamp itself generates heat due to its own light emission, it is necessary to take measures such as providing hysteresis characteristics to the set temperatures for turning on and off.

FIG. 3 shows the Schiede ink correction circuit 12 and the control circuit 21.
It is a more detailed drawing of.

The image output from the A/D converter 1 is 1) timed by the type flip-flop 50 and stored in the ROM 5 which stores the calculation result of the shading correction.
4 and is corrected. The output signal of the D-type flip-flop 50 is passed through a gate circuit 51 as necessary so that image signals for main scanning lines, that is, CCDI lines, can be stored in the RAM 52.

The RAM 52 stores an image read from the standard white board 1, and reads it out in synchronization with the actual original read image.
By applying it to the address signal line of ROM54, the ROM
By reading out the calculation results of the shading correction stored in the shading correction section 54, it is possible to correct the shading correction caused by uneven light emission of the fluorescent lamp 2, uneven density due to dirt on the reflecting mirrors 3 and 5, uneven luminous intensity distribution of the optical lens 7, etc. Perform calculation for removal.

The D type flip-flop 53 is a circuit for adjusting the timing of the image signal read out from the RAM 52.

The selector 57 selects the atres signal output from the CPU 60 and the C L O C when reading the pixel signal from the CCD 7.
This is a switching circuit for switching the count signal (horizontal address signal) of the counter 58 that counts the K signal. That is, when writing the image signal data of the standard white board 1 to the RAM 52 and when reading it out and performing shading correction, it is switched to the horizontal address signal of the counter 58, and when the content of the RAM 52 is directly read by the CPU 60, it is output from the CPU 60. Switch to A1/Res signal and use.

The counter 58 is initialized by the synchronizing signal HSYNC signal without indicating the start of reading one line of main scanning, and repeats the counting operation for each line.

The counter 59 is a counter that counts this I-{SYNC signal by 1, and is used, for example, when changing the pattern in the sub-scanning direction when performing dither processing.

The timing control circuit 66 is a circuit that controls the selector 57, the gate 1 circuit 51, and the bidirectional cross drive 56 in response to commands from the CIU60.

The timing control circuit 66 controls the following three types of operation modes.

(1) Schiedink Data Sampling Mo1
- The image signal read from the standard white board 1 is RAM 5 2
This is the operating mode stored in the . The gate circuit 51 is I{
The image signal is written into the RAM 52 by operating the section for one main scanning line indicated by the S Y N C signal and switching the selector 57 to the address signal of the counter 58 .

(2) Shade ink correction mode 1 Based on the image signal written in the RAM 52, there is an operation mode 1 in which the image signal input to the I) type flip-flop 50 is corrected. At this time, the selector 57 is operated by the address signal of the counter 58, and sequentially reads out the written data from the RAM 52 using the D type.
Take the timing with flip-flop 53, and ROM5
In step 4, shading is corrected. The gate circuit 51 does not operate at this time.

(3) CPU mode This is an operation mode in which the CPU 60 can directly read and write the contents of the RAM 52. At this time, the bidirectional hash driver 56 is activated, is directly connected to the data path of the CPU 60, and is used to read the contents of the RAM 52 and perform arithmetic processing, or conversely change the contents. At this time, the selector 57 is switched to the address signal line of the CPU 60,
Further, the gate circuit 51 does not operate.

Now, in the circuit described above, the CPU 60 controls the working RAM 62, the control program stored in the ROM 61,
Control is performed using an I/O port 63, a serial circuit 64, and a display circuit 65.

The timer 67 is a circuit that provides pulses to the CPU 60 at regular time intervals. The CPU 60 manages time by using this pulse signal as an interrupt signal.

Next, the principle of dimming will be explained using FIG. 4.

In FIG. 4, the horizontal axis indicates the section of one frame, and the vertical axis indicates the gray level of the image signal. In this embodiment, the standard white board 1 is read, and the above shading data
This corresponds to data stored in RAM 52 in sampling mode.

In this embodiment, the data stored in the RAM 52 is 6 bits, and the value 63 is the blackest level, and the value 0 is the whitest level.

Now, in FIG. 4, curve a shows a state where the amount of light from the fluorescent lamp 15 is insufficient, curve b shows a state where the amount of light is appropriate, and curve C shows a state where the amount of light is too large. The shading correction method in this embodiment is based on the standard white plate l.
Since the correction is performed based on the data read, when the reading is saturated as shown by curve C, the correction cannot be made.

Furthermore, if the amount of light is insufficient as shown by curve a, the amount of correction by calculation increases, resulting in a disadvantage that the S/N ratio of the read image signal deteriorates. Therefore, the amount of light from the fluorescent lamp 15 needs to be controlled so that the whitest point X of the read data just reaches the value O, as shown by curve b.

FIG. 5 shows an example of data stored in the RAM 52 when the fluorescent light 15 deteriorates after the fluorescent light 15 is dimmed using the standard white plate 1.

Curve d shows a state in which the fluorescent lamp 15 has deteriorated so much that even when it is fully lit, the black level remains by a value L and the dimming is insufficient.

Curve e shows a state where both ends of the fluorescent lamp 15 have progressed to blackening and the amount of light at the end of the tube has decreased.

Let the curve r be normal data, and let the density levels at both ends of the valid section in one frame be the value n1 and the value k, respectively. Similarly, let the density levels at both ends of the effective section of the curve e be the value m1 value j.

As explained in Section 2, in the shading correction in this embodiment, when the read value of the standard white plate 1 is dark as shown by curve a in FIG. 4, the S/N deteriorates.

Therefore, in order to prevent this, the darkness limit is set to a predetermined value α
It is possible to determine the deterioration of the fluorescent lamp 15 by comparing this with the concentration level of the effective section.

The example shown in FIG. 5 shows a state where m>α>n and j>α>k. Of course, in the above-mentioned determination of deterioration, it goes without saying that it may be determined that the fluorescent lamp 15 has deteriorated even if only one end exceeds the value α, for example, m>α, j×α.

Figure 6 shows that there are defects in the CCD 7, RAM 52, etc.
FIG. 3 is an explanatory diagram for detecting a failure such as a defect occurring in a read image.

Generally speaking, when the above-described defect occurs, the density level of the corresponding pixel becomes a constant value, or the dynamic range deteriorates extremely. In FIG. 6, the curve t represents the RAM 52 when the fluorescent light 15 is dimmed.
Similarly, the curve U shows the read data when the fluorescent light 15 is bright after dimming. The peak value p1 and the peak value r indicate the case where the density of the defective pixel is constant, and the peak value q and the peak value S indicate the case where the dynamic range of the defective pixel has decreased.

In order to find a defective pixel using such theta, there is a method of calculating the difference between adjacent pixels and determining the pixel as a defective pixel when the difference becomes -12 or more than a predetermined value. However, with this method,
When there are consecutive abnormal pixels, there is a drawback that false detection occurs because the difference between the pixels becomes small.

Therefore, in this embodiment, after determining the average density level of curve t and curve U, each pixel is compared with this, and if there is a difference of more than a predetermined value, the pixel is determined to be abnormal, thereby eliminating the above drawback. ing.

Furthermore, if the density level of the abnormal pixel happens to be close to the average density level, it is possible that detection failure of the abnormal pixel may occur. Therefore, it is desirable to detect the abnormal pixel using an average density level of at least 2 or more -12. In this embodiment, the abnormal pixels are detected with the fluorescent light 15 turned off and after dimming.

Next, the control procedure will be explained using the flowcharts shown in FIGS. 7 to 14.

FIG. 7 is a flowchart 1 showing the main control procedure of the main body control circuit 23.

First, when the power is turned on, the operating section 24 and each drive circuit are initialized in step SPI, and a polling operation is started to start reading.

In step SP2, it is determined whether or not the reading star 1 switch of the operation section 24 has been pressed, and a branch is made.

In the case of starting reading, it is confirmed in step SI)3 that the reading position of the optical system is at the standard white board 1 position W (home position), and then the process proceeds to step SP4. In step SP4, it is determined whether the temperature control for maintaining the tube wall temperature of the fluorescent lamp 15 at a predetermined temperature has been completed, and if not, stable image reading cannot be guaranteed, so the start of document reading is prevented. do. If the temperature control has been completed, the process advances to step SP5.

In step SP5, abnormal pixels are detected with the fluorescent light 15 turned off, and in step SP6, the fluorescent light 15 is turned off.
is turned on, and the dimming control of the fluorescent light 15 is performed in step SP7.

In step SP8, it is determined whether there is an error in the dimming control, and if there is an error, an error is displayed and reading of the document is prevented.

If there is no error in the dimming control, the process proceeds to step SP9, where an abnormal pixel is detected with the fluorescent lamp 15 turned on, and the process proceeds to step SPIO. Note that if the number of abnormal pixels is too large, an error is displayed and the reading operation is prohibited.

In step SPIO, the value read from the standard white plate 1 is stored in the RAM 52.

In step SPII, the abnormal pixels detected in steps SP5 and 9 are corrected, and then in step SPII, the abnormal pixels detected in steps SP5 and 9 are corrected.
12, reading and scanning of the original is started.

In step SP13, it is determined whether or not the required number of document reading scans have been completed, and if not, the process returns to step SP7 and the operations described above are repeated.

On the other hand, when the required number of original reading scans have been completed, the fluorescent light 15 is turned off, the original reading is completed, and the scanner waits for a new reading start switch to be activated. 8 and 9 are flowcharts 1 showing the control procedure of the CPU 60 of the control circuit 21.
・There is.

In FIG. 8, after turning on the power, at step SP50, a flag, an I/O port 63, a real circuit 64, a display circuit 6
After performing the initialization such as 5, the process proceeds to step SP51.

In step SI)5], it is determined whether or not there is an operation command input from the main body control circuit 23, and if not, the display circuit 65 displays the status of light control, temperature control, etc. If there is a command input, step SI” 5 2
, and branches to each step depending on the contents of the command to perform processing. The details of each process are as follows.

・Step SP53 Turn on the fluorescent light 15, set FLON to 1, and similarly,
Set the flag ERRCNT to O. Flowchart ・The flags, counters, and data used in the explanation are stored in the RAM 62 in the CP
It refers to data that the U62 reads and writes for processing.

-Step SP54 Turn off the fluorescent light 15 and set the flag FLON to the value O.

・Step SP55 Performs dimming control.

●Step SP56 The detected error information is transferred to the main body control circuit 23.

・Step SP57 Abnormal pixels in one frame are detected.

-Step 58 The abnormal pixel detected in step SP57 is corrected.

-Step SP59 The image signal read from the standard white board 1 is stored in the RAM 52 after noise removal.

- Step SP60 The data stored in the RAM 52 is transferred to the external circuit via the serial circuit 64.

After completing the above processing steps, the process returns to step SPI and repeats the control procedure described above.

FIG. 9 shows a timer process executed at regular time intervals using a pulse signal given by the timer 67. This process is performed after initialization in step SP50 is performed.
Execution begins.

In step SP61, a process is performed to control the temperature of the tube wall of the fluorescent lamp 15 to around 400 C, which allows stable lighting.

Next, flowcharts and FIGS. 10 to 14, which describe in more detail the processing contents explained in FIGS. 8 and 9, will be explained.

FIG. 10 is a flowchart describing in detail the control contents of step SP61. Step SPIOO is
A disconnection of the thermistor 13 is detected, and if the thermistor is disconnected, the error details are stored in the RAM 62 and displayed in step SP51. Various errors described below are handled in the same way, and the error details are transferred to the main body control circuit 23 in step SP56 as necessary.

Now, if a disconnection is detected, temperature regulation control is impossible, so the process proceeds to step SPIIO, where both the heater 14 and the fan motor 16 are turned off, and the control is ended. If the thermistor disconnection is not detected, the temperature measurement output of the thermistor 13 is converted from analog to digital using the A/D converter 22 in step SPIOI, and this measurement output is converted to T'
Let it be C.

The above-mentioned thermistor disconnection detection in step SPIOO may be performed by determining that the thermistor is disconnected when the measured temperature T reaches a discrete value that cannot be taken originally (a value that can be taken when the disconnection occurs).

In step SP102, it is determined whether or not the measured temperature T is less than 30. If not, the process proceeds to step 104, and it is determined whether or not the measured temperature T is less than 40. Step SP10
2. By executing step SP104, T<3
0, step SP103, 30≦T<40, step SP105, T≦40, step SP10.
6 will be executed.

In step SP103, the flag HTUP, which takes the value 1 when the temperature control of the fluorescent lamp 15 is completed, is set to the value O, indicating that the temperature control is insufficient. In step SP106, on the contrary, the plug HTUP is set to the value 1.

In step SP105, the flag FLON is checked to determine whether or not the fluorescent light 15 is on. Flag FLON
When is 1, that is, when the fluorescent lamp 15 is on, the tube wall temperature rises by 2' due to self-heating, so proceed to step SP109, turn off the heater 14, turn off the fan motor 16, and set the measured temperature. Control is performed so that T slowly approaches the value 40. If the flag FLON is the value O, the process advances to step SP107.

In step SP107, the flag HTERR, which becomes the value 1 when it is determined that the heater 14 is disconnected, is checked, and if the value is 1, the process proceeds to step SPIIO, and the heater 14 is turned off.
Turn on the fan motor l6 to perform cooling for safety.

In step SP108, the heater l4 is turned on and the fan is turned on.
Control is performed so that the motor 16 is turned off and the tube wall temperature of the fluorescent lamp 15 is increased.

In step SP11, the flag H T O N which becomes the value 1 when the heater l4 is turned on is checked, and if the value is O, the process proceeds to step SP112, where the flag H T O N is set to the value 1 and the energization time of the heater l4 is measured. Counter HTC
Initialize by setting NT to the value O.

In step SPI13, the counter HTCN
i' is incremented by 1, and when the energization time set by the counter HTCNT exceeds the allowable time M in step SPI 15, the heater I4 is determined to be disconnected and step SP
Proceed to 114.

Step SPI]. 4, frac I { T E R
Set R to the value 1 and perform error processing for heater disconnection.

Frac II FO N is set to the value 0 in step S P 1 1 6 after the heater 14 is turned off.

According to the temperature control described in paragraphs 2 and 2, the control temperature is set to 3.
Since it is divided into two points, 0'C and 40C, and has hysteresis characteristics, stable control is possible.

Next, the procedure for controlling the dimming of the fluorescent lamp 15 will be explained using FIG. 11.

In step SI-'150, flags, data, and counters are initialized prior to control. The data FLDATA is the dimming data corresponding to the dimming circuit 18, and a value of 255 indicates full lighting, and a value of O indicates off.

The data OFFSET is a value that is added to or subtracted from the data FLDATA. The counter FLCNT is a counter for counting the number of times for repeat control. Counter F L
ERR is a counter for measuring the lighting start-up state of the fluorescent light 15, and counts the number of times when the data read for dimming control is very dark.

Note that the image signals handled in this embodiment are 6 hits 1 (values 0 to 63), and the RAM 52 uses 8 hits 1, so the top two hits 1 are used for purposes other than image signal storage. used for the purpose.

In step S P151, the process waits for the previously output dimming data to appear as a change in the amount of light from the fluorescent lamp 15, and then proceeds to the next step.

Step S P1. At step 52, the image signal read from the standard white board 1 is stored in the RAM 52 through the two-step ink data sampling mode.

Step S P1. 53, four consecutive pixels of the image signal data stored in the RAM 152 are added as one block, and the block with the smallest numerical value (the brightest) is detected (=L block, added value S).

In step SP154, the data OFFSET is set to half the value, and in step SP155, Lll, data OF
FSI! : 'When F becomes less than the value 1, set/shift the value to 1. By doing this, the value of data OFFSET can be changed to 64 by repeating the control.
, 32, 16, 8, 4, 2, 1, 1, . . .

At step SP156, branching is performed depending on the value of the addition value S.

In step S i] 1 5 7, since the addition value S is 0, that is, the amount of light is considered to be too large and saturated, the data OFFSET is subtracted from the data FLDATA to control the amount of light to be reduced.

Step S P1. 5 In 8, the data FLDAT
It is determined whether or not A has become a negative value, and if it is negative, the data FLDA'TA is set to the value O in step SP159, and processing is performed as a dimming error 1.

The dimming error 1 is treated as an error because it is a logically impossible state in which a white level signal is read even though the data given to the dimming circuit 18 is data indicating that the light is off. In this case, it is possible to consider that a defect has occurred in the dimming circuit 18, the amplifier circuit 10, etc.

On the other hand, if the addition {JS is not 4140, the process proceeds to step Sr'l60, and it is determined whether the addition value S is dark data with a value of 240 or more. Counter F assumes that light 15 is not lit.
Increment L E R R by 1.

In step SP161, it is thought that there is a shortage of light members, so the data Or
? Control is performed to increase the amount of light by adding F S ET.

In step SP162, data FLDATA is 255.
If the value exceeds 255, set the data FLDATA to the value 255. Here, the reason why an error is not made as an insufficient amount of light is that when a fluorescent light is turned on, the amount of light gradually increases from the start of lighting.

At step SP163, the data FLDATA calculated in step 2 is output to the dimming circuit 18, and the counter FLCNT is incremented by 1.

Step SP] 64, the counter F L C N i
- When the value reaches 50, the dimming control is finished and step S I
) ] 6 7 and the counter F L E R R has a value of 25.
It is determined whether the value is exceeded, and if the value is exceeded, it is assumed that the fluorescent light 15 is not turned on easily or not at all, and is treated as a dimming error.

In step SP165, it is determined whether the counter FLCNT has reached 25, and if not, step SP16
At step 6, it is determined whether or not the counter FLERR exceeds the value 15. If it exceeds the value 15, it is assumed that the fluorescent light 15 does not turn on easily, and the steps SP151 to SP1 continue until the counter FLCNT reaches the value 50.
62 is repeated. After performing the control 25 times or 50 times, the process advances to step SP168.

In step SP168, the average value of the effective pixels at both ends described in FIG. 5 is calculated in order to remove noise. (
Average value A) In step SP169, the difference between the one pixel average value obtained by dividing the sum S by the value 4 and the above average value A is calculated, and if the difference exceeds the value 15, it is determined that the end portion of the fluorescent lamp 15 has deteriorated. The dimming error 3 is processed as recognized.

The processes of step SP169 and step SP169 are performed individually at both ends of the effective pixel.

In step SP170, it is determined whether the added value S is controlled to be around the value O by checking whether the added value S is less than the value 8.

If the added value S is equal to or greater than 8, processing for dimming error 4 is performed, assuming that the deterioration of the fluorescent lamp 5 has progressed throughout the tube and the amount of light is insufficient.

According to the dimming control described above, it is possible to easily detect abnormalities during dimming, and the data OFFSE
By making the value of T variable, convergence of control is prevented, and when the rise characteristics during lighting are not good, stable dimming control can be performed by lengthening the control time.

Next, the control procedure for the shading process will be explained using FIG. 12.

In step SP200, the counter CNT is set to the value O,
All the shading portions of the RAM 62 are set to 0.

In step SP201, the image signal obtained by reading the standard white board l in the above-mentioned shedding data sampling mode is stored in the RAM 52, added to the contents of the previous shedding buffer for each corresponding pixel, and stored in the shedding buffer. .

In step SP203, the counter CNT is incremented by 1, and steps SP201 to SP203 are repeated until the value reaches 4.

In step SP204, the contents of the shading buffer are divided by the value 4 to obtain an average value, which is stored in the RAM 52 (RAM for shading correction), and the shading process is completed.

According to the shading process described above, the RAM 52,
By simply processing the data in the RAM 62 with the CPU 60, the image signals read from the standard white board 1 are averaged and noise is removed, and this can be achieved at a very low cost without using any special adders or dividers. There is. Moreover, a more advanced noise removal method using a devised algorithm can be easily applied by simply changing the control program stored in the ROM 61.

Next, a control means for abnormal pixel detection will be explained using FIG. 13.

Steps SP250 to SP253 are steps SP200 to SP203 of the shading process.
This is a processing step corresponding to
The added value of the image data stored in is also stored.

The difference from the shading process is that the data stored in the RAM 52 is processed not only after dimming but also when the fluorescent light 15 is turned off.

In step SP254, the contents of the shedding buffer are divided to obtain an average value.

In step SP254, the average value AV of all pixels in the effective image section is determined, and then the process proceeds to step SP25&.

In step SP255, the counter CNT is set to the value O,
The following steps SP257 to 261 are repeatedly executed until it is determined in step SP261 that the count value has reached the number of effective pixels E.

In step SP257, the value of the shading index specified by the contents of the counter CNT (for example, when the stored contents of the counter CNT is the value 100, the shading ink
The difference Z between the 1000th data from the beginning of the buffer) and the average value AV is calculated.

In step SP258, the absolute value of the difference Z is compared with a predetermined value C, and if it exceeds the value C, the error is large, so it is determined that the pixel is abnormal, and the process proceeds to step SP259.

In step SP259, the value of the counter CNT is stored at the address of the abnormal pixel memory storage (part of the RAM 62) indicated by the contents of the counter ERRCNT, which is set to O in step SP53, and is accumulated as the address of the abnormal pixel. .

At step SP260, the contents of the counter ERRCNT are incremented by one.

According to the abnormal pixel detection described above, detection is performed when the fluorescent light 15 is off and when the fluorescent light 15 is turned on and dimmed, so if the difference between the abnormal pixel and the normal pixel happens to be small, the detection Figure 14 shows an abnormality in which an abnormal pixel detected during abnormal pixel detection is replaced with the previous normal pixel, which prevents leakage and also allows the cumulative result of two detections to be obtained. FIG. 3 is a diagram showing a control procedure for pixel correction.

Step S I) 3 0 0 is the counter E R R
This is a processing step in which the process ends when the content of C N i' becomes 0. If the value is not O, the processes of steps SP301 to SP303 are executed once.

In step SP301, the contents (=ADR) of the address indicated by the contents of the counter ERRCN'r are read from the head of the buffer for storing abnormal pixels.

In step SP302, RA for ink supplementary
M of data corresponding to ADR address from the beginning of M52
Set SB to the value l.

In this embodiment, when the MSB of RAM52 is set to the value , an operation is performed in which an abnormal pixel is replaced with the immediately preceding normal pixel. Also, in step SP3p2, the MSB of the ADR address is set to value 1, but since the timing may be different depending on the circuit structure, the ADR address
The MSB of the data before and after the address may be manipulated.

Next, FIG. 15 will be explained.

FIG. 15 is a diagram describing the periphery of the RAM 52 and ROM 54 in more detail.

■) The type flip-flop 50 is, for example, T
It is a 6-bit D-type flip-flop like 'FL74LSI74, and has a clock input terminal CK and a clear input terminal CLR in addition to the data input terminal and data output terminal. . The clear input terminal holds the signal connected to the data input terminal when the data output terminal becomes the value O when the value is set to O, and the rising clock is input to the clock input terminal CK.

Therefore, if the data input terminal of the D-type flip-flop 50 is pulled up and the signal input to the data input terminal is disconnected, the signal from the clear input terminal will return all hits 1, the value 0, or the value It becomes possible to generate one pseudo image signal pattern. In addition, if the signal input to the clock input terminal is made so that a rising signal does not occur at an abnormal pixel, the data output terminal will continue to output the normal pixel held by the previous clock and can be used for abnormal pixel correction. be.

Ant gate 71 and inverter 72 are Tatsumi biprime correction,
AND game 1-70 and inharter 77 are logic circuits for pattern generation.

The input terminal 74 and the input terminal 76 of the AND game 1.70 are pulled up by a resistor 73 and a resistor 75, respectively, and when a pattern generation is required, the horizontal address signal of the counter 58 or the vertical address signal of the counter 59 is pulled up. By connecting to the address signal, it becomes possible to obtain a pattern as shown in FIG.

FIG. 16 shows that the data input terminals of the D-type flip-flop 50 are open, and the input terminals 74 and 7
6 is an example of an image output when horizontal and vertical address signals are input so that the pattern has the same pitch in both the main scanning direction and the sub-scanning direction.

The hatched area indicates where all the data output terminals of the D-type flip-flop 50 have a value of 1.

The pitch and pattern of the pattern in the main scanning direction and the sub-scanning direction can be varied by selecting each input address line signal. For example, a striped pattern can be obtained by connecting only one of the address signals.

In addition, in this embodiment, the 6th hit (LSB) of the RAM 152 is assigned as the 0th hit, the 1st to 5th bits are assigned to image signal storage, and the 7th bit, MSB, is assigned to detect abnormal pixels. It is possible to obtain the same effect by writing an arbitrary 1 or 0 Bakun into the CPU 60 using the following. In this case, if you write the value 1 to the 6th hit of the RAM 52, the D type flip-flop 50
The data output terminals of all become the value O.

Similarly, when writing the value 1 to the MSB of RAM52,
The AND gate 7l gates the C L O C K signal, and the abnormal pixel correction described above is performed without holding the data of the corresponding pixel.

In FIG. 15, D type flip-flop 5
Although abnormal pixel correction and pattern generation are performed in the D-type flip-flop 55, the D-type flip-flop 50 may also perform abnormal pixel correction and pattern generation in the D-type flip-flop 50. It goes without saying that they may be separated like pattern generation.

The gate circuit 51 is, for example, TTL74LS244, I
・Ly ST-1: Using a buffer or the like, the gate control signal is controlled by the timing control circuit 66, and when the value is set to O, the image signal is written into the RAM 52. At this time, by connecting the MSB and 6th hit of the input signal to GND, the value O is written in both bits 1 and 1 of the RAM 52.

The D type flip-flop 53 is, for example, T T
L 7 4 L S 2 7 3 use cheat. Clear input terminal CI-. R is used as a correction enable signal, and when the value is 1, shading correction is performed according to the stored contents of the RAM 52, and when the value is 0, all outputs are the value 0, so no shading correction is performed.

The correctable signal may be normally set to a value of 1 using, for example, a dip switch, and may be set to a value of O when confirming whether the shading operation is being performed normally.

As explained above, according to the present invention, an abnormal pixel output of the reading means is detected based on the output of the reading means that photoelectrically reads a document image exposed by a light source pixel by pixel, and reading is performed based on the output. Since an abnormality is displayed, it becomes possible for an operator to easily recognize the occurrence of an abnormal pixel in the reading means.

[Brief explanation of drawings]

FIG. 1 is a simplified configuration diagram of a document reading device to which the present invention can be applied; FIG. 2 is a configuration diagram showing a specific electric circuit configuration for performing shading correction according to the present invention;
Fig. 3 is a configuration diagram that describes Fig. 2 in more detail, Fig. 4 is an explanatory diagram for explaining the principle of dimming control, and Fig. 5 is an explanatory diagram for explaining the principle of deterioration detection of the fluorescent lamp 15. FIG. 6 is an explanatory diagram for explaining the principle of abnormal pixel detection, FIG. 7 is a control flow chart of the main body control circuit 23, and FIG.
9 is a control flow chart of the control circuit 21, FIGS. 10 to 14 are detailed control flow charts of the control circuit 2l, and FIG. 15 is a diagram showing an example of a circuit for abnormal pixel correction and pattern generation. , FIG. 16 is a diagram showing an example of the pattern, where 1 is a standard white board, 2 and 15 are fluorescent lights, and 7 is a COD
, 13 is a thermistor, l4 is a heater, 18 is a dimming circuit,
19 is a tone circuit, 2l is a control circuit, 5l is a gate circuit,
54 is a ROM, 52 and 56 are RAMs, and 58 and 59 are counters.

Claims (1)

[Scope of Claims] A light source for exposing a document; a reading device for photoelectrically reading a document image exposed by the light source pixel by pixel; and detecting an abnormal pixel output of the reading device based on an output of the reading device. An image reading apparatus comprising: a detection means for detecting a reading error; and a display means for displaying a reading abnormality based on an output of the detection means.