JPH03211663A - Digital controller - Google Patents

Digital controller

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Publication number
JPH03211663A
JPH03211663A JP780490A JP780490A JPH03211663A JP H03211663 A JPH03211663 A JP H03211663A JP 780490 A JP780490 A JP 780490A JP 780490 A JP780490 A JP 780490A JP H03211663 A JPH03211663 A JP H03211663A
Authority
JP
Japan
Prior art keywords
value
ratio
alpha
numerical
digital controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP780490A
Other languages
Japanese (ja)
Inventor
Hisashi Ina
伊奈　久
Koji Yano
浩司 矢野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP780490A priority Critical patent/JPH03211663A/en
Publication of JPH03211663A publication Critical patent/JPH03211663A/en
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/552—Powers or roots, e.g. Pythagorean sums
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/552—Indexing scheme relating to groups G06F7/552 - G06F7/5525
    • G06F2207/5525—Pythagorean sum, i.e. the square root of a sum of squares

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To obtain the value of the root of a sum obtained by means of precise ly squaring and adding two numerical values in a short time by calculating a parameter from two inputted numerics and referring to a table corresponding to the parameter. CONSTITUTION:The ratio alpha (=a/b) of two numerics (a) and (b), and the nemerical value corresponding to the function (alpha<2>+1)<1/2> of the ratio alpha are previously held as the table 4, and the ratio alpha (=a/b) is calculated from the numerics (a) and (b), both of which are inputted in a subtraction means 2. A read means 3 refers to the table 4 and reads (alpha<2>+1)<1/2> corresponding to the ratio alpha, and a multiplication means 5 multiplies having read (alpha<2>+1)<1/2> by the numerical value (b) whose absolute value is large. Thus, the value of the root to be obtained (a<2>+b<1/2>)<1/2> is obtained. Thus, only one subtraction and one multiplication, total two numerical operations are required, and a processing time is shortened, total two numerical operations are required, and a processing time is shortened, whereby the responsiveness of a digital controller 1 can be improved.

Description

【発明の詳細な説明】 （産業上の利用分野） 本発明は、２つの数［ａ、ｂをそれぞれ平方して加算し
、その和の平方根１丁］］７を求めることのできるディ
ジタルコントローラに関する。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a digital controller that can calculate two numbers [a and b are each squared and added, and the square root of the sum is 7]. .

（従来の技術） 従来のディジタルコントローラにおいては、２つの数値
ａ、ｂをそれぞれ平方して加算し、その和の平方根ｃ　
（−１ｒｉ１王１１）を求める場合に、ニュートン法を
用いて近位的に求めている。(Prior art) In a conventional digital controller, two numbers a and b are squared and added, and the square root of the sum is calculated as c.
(-1ri1King11) is determined proximally using Newton's method.

すなわち求める値Ｃは次式のように表される。That is, the value C to be found is expressed as in the following equation.

ｃ　−ｆ丁ワ１Ｆ　　　・・・・・・・・・・・・・・
・・・・（１）ここでｚ＝ａ”＋ｂ”とすると、ニュー
トン法により平方根を求める近似式は次式のように表さ
れる。c-f 1F ・・・・・・・・・・・・・・・
...(1) Here, if z=a"+b", then the approximate equation for finding the square root using Newton's method is expressed as the following equation.

２　　　　　　　　　ｘｎ この（２）式において、Ｘ、の初期（１ｘｏを１として
、順にＸ、を算出する。2 xn In this equation (2), the initial value of X (1xo is set as 1), and X is calculated in order.

得られたｘ３とＸ＠＊１とを順次比較して両者の関係が
次式 Ｘ、、、Ｉ−Ｘ、１１＜ε　　・・・・・・・・・・・
・・・・（３）を満足したところで近位的にＸＭ＊ｌζ
Ｉ’Ｔとみなし、求める平方根ｃ（＝ＦＴ）が得られる
。By sequentially comparing the obtained x3 and X@*1, the relationship between them is expressed by the following formula
....XM*lζ proximally when (3) is satisfied
By regarding it as I'T, the desired square root c (=FT) can be obtained.

（発明が解決しようとする課題） しかしながらこれらの従来の算出手法を用いた場合、よ
り精度の高い近領値を得ようとすると、（３）式のεの
値を小さくしなければならず、そのため演算回数が増し
て算出までの処理時間が長引く問題がある。(Problem to be Solved by the Invention) However, when using these conventional calculation methods, in order to obtain a more accurate near-field value, the value of ε in equation (3) must be reduced, Therefore, there is a problem that the number of calculations increases and the processing time until calculation becomes longer.

そこで本発明は上記問題点を解決するためになされたも
ので、その目的とするところは高精度でしかも短時間に
２つの数値ａ、ｂをそれぞれ平方して加算した和の平方
根１丁］］７の値を求めることのできるディジタルコン
トローラを提供することにある。Therefore, the present invention was made to solve the above problems, and its purpose is to provide one square root of the sum of two numbers a and b squared and added in a short time with high precision. The object of the present invention is to provide a digital controller capable of determining the value of 7.

（課題を解決するための手段） 上記目的を達成するために、本発明は、入力された２つ
の数値ａ、ｂをそれぞれ平方して加算した和の平方根ｆ
丁ワ１７を求めるディジタルコントローラにおいて、絶
対値の小なる数値ａと絶対値の大なる数値すとの比α（
＝ａ／ｂ）を算出する除算手段と、前記比α（０≦α≦
１）と、この比αについての関数ＦＴワゴとの対応関係
を予め数値として記憶しておいたテーブルと、このテー
ブルを参照し、算出した比αに対応する関数１７ｉＴ下
］−の値を読み出す手段と、読み取った関数、ｒ７１丁
丁の値に前記数値すを乗算し、その積ｂ　√α２＋Ｔ王
■を、求メル平方ｍ　　−ｒｉ；＝下１１として出力す
る乗算手段とを有することを特徴とする。(Means for Solving the Problem) In order to achieve the above object, the present invention provides the square root f of the sum obtained by squaring and adding two input numerical values a and b, respectively.
In a digital controller that calculates 17, the ratio α(
=a/b), and the ratio α (0≦α≦
1) and a table in which the correspondence relationship between this ratio α and the function FT WAGO is stored in advance as numerical values, and by referring to this table, read out the value of the function 17iT bottom]- corresponding to the calculated ratio α. and a multiplication means that multiplies the value of the read function r71 ding by the numerical value s and outputs the product b √α2 + T king ■ as the desired mel square m −ri;=lower 11. do.

（作　用） 本発明においては、２つの数値ａ、ｂの比α（＝ａ／ｂ
）と、この比αの関数、７７王ゴに対応する数値を、予
めテーブルとして保持しておき、入力された数値ａ、ｂ
から比α（＝ａ／ｂ）を算出し、テーブルを参照して比
αに対応する５７５丁を読み取り、読み取った。ｒｉ１
下］−に絶対値の大きい数値すを乗算することにより、
求める平方根Ｆ丁ヨ薯２の値が得られる。(Function) In the present invention, the ratio α (=a/b
), the function of this ratio α, and the numerical values corresponding to 77 kings are stored in advance as a table, and the input numerical values a, b
The ratio α (=a/b) was calculated from the table, and 575 pieces corresponding to the ratio α were read by referring to the table. ri1
By multiplying − by a numerical value with a large absolute value,
The desired value of the square root F and 2 is obtained.

（実施例） 以下、図に沿って本発明の詳細な説明する。(Example) The present invention will be described in detail below with reference to the drawings.

第１図は本発明に係るディジタルコントローラｌの内部
構成の一部を示す機能ブロック図である。FIG. 1 is a functional block diagram showing part of the internal configuration of a digital controller l according to the present invention.

図において、除算手段２は入力された数値ａｂＯ比α（
＝ａ／ｂ）を算出して、読出し手段３へ送る。なお、除
算手段２に入力される数値ａの絶対値は数値すの絶対値
より小さいものとする。In the figure, the dividing means 2 input the numerical value abO ratio α(
=a/b) and sends it to the reading means 3. It is assumed that the absolute value of the numerical value a input to the dividing means 2 is smaller than the absolute value of the numerical value s.

読出し手段３は、入力された比αについて、テーブル４
を参照して比αに対応する（１１王ゴの値を続出して、
乗算手段５へ送る。The reading means 3 reads the table 4 for the input ratio α.
Corresponds to the ratio α by referring to
It is sent to the multiplication means 5.

テーブル４はＲＡＭ等により形成され、数値ａｂＯ比α
（Ｏ≦α≦１）と、この比αについての関数ＦＴワゴと
の対応関係を予め数値として記憶している。ここでテー
ブル４に記憶されている関数、ｒ習１下］−は、入力さ
れた２つの数値ａ、　　ｂをそれぞれ平方して加算した
和の平方根ｆ７石１１を変形して得られたものである。Table 4 is formed by RAM etc., and is a numerical value abO ratio α
The correspondence relationship between (O≦α≦1) and the function FT for this ratio α is stored in advance as a numerical value. Here, the function stored in Table 4, rX1 lower]-, is obtained by transforming the square root of the sum of the two input numbers a and b, squared and added, f7 stone11. be.

すなわち（１）式を次のように変形することにより、比
αに対応して記憶する数値が得られる。That is, by transforming equation (1) as follows, a numerical value to be stored corresponding to the ratio α can be obtained.

ｃ　−ｒ丁ｑ薯璽 に置換えると、 ここでａ　／　ｂを比α（＝ａ／ｂ） ｃ−ｂｌ雇１Ｔゴ　　　・・・・・・（４）さらにここ
で、 ｄ＝√α２＋ワ１−　　　・・・・・・・・・（５）と
すると、式（４）は次のように書き換えられる。If we replace a/b with c-r, then we have the ratio α (= a/b) c-bl 1T go... (4) Furthermore, here, d=√α2+wa 1- (5), then equation (4) can be rewritten as follows.

ｃ−ｂ−ｄ　　　　　・・・・・・・・・・・・（４）
′つまりテーブル４には、第２図に示すように比αに対
応した開数ｄの具体的な数値が記憶されており、読出し
手段３から比α、が入力されると、対応するｄ＋が続出
される。なお、２数の関係ａ≦ｂにより、関数ｄの最大
値はＦ丁に、最小値は１になる。またここで比αとして
テーブルに設定される値は０から１までを微小幅で区分
した値となり、比αの設定間隔を狭め、同時に比αに対
応して記憶される関数ｄの値の有効桁数を大きくしてお
けば、後述する演算結果の精度が向上する。c-b-d ・・・・・・・・・・・・(4)
'In other words, as shown in FIG. 2, the table 4 stores the specific numerical value of the numerical number d corresponding to the ratio α, and when the ratio α is input from the reading means 3, the corresponding d+ is It continues to be published. Note that due to the relationship a≦b between the two numbers, the maximum value of the function d is F, and the minimum value is 1. In addition, the values set in the table as the ratio α here are values divided by minute widths from 0 to 1, narrowing the setting interval of the ratio α, and at the same time validating the value of the function d stored corresponding to the ratio α. If the number of digits is increased, the accuracy of the calculation results described later will be improved.

乗算手段５は、入力された数値すと開数ｄの値を乗算す
ることで、（４）′式に示すようにＣ５すなわち求める
平方根Ｆ丁戸］己を出力する。The multiplication means 5 multiplies the input numerical value by the value of the open number d, thereby outputting C5, that is, the square root F to be sought, as shown in equation (4)'.

これらの一連の処理を実行することにより、入力された
数値ａ、ｂについて、それぞれを平方して加算した和の
平方根Ｆ丁ｑ］己が、除算処理、テーブル４の読取り処
理および乗算処理による簡単な処理行程で短時間に求め
ることができる。By executing these series of processes, the square root of the sum of the input numbers a and b, which are squared and added, can be easily calculated by dividing, reading Table 4, and multiplying. It can be obtained in a short time with simple processing steps.

ここで比較のため（１）式において、ａ−１，ｂ＝２と
し、（３）式において、ε＜０．０００００１を満足す
る精度でＣを求めようとすると、従来の処理方法では乗
算５回、除算５回、加算５回の計１５回の演算回数を必
要とする。これに対し、本発明では算出値の精度がテー
ブルにより決定されるため、演算回数についてはいかな
る場合も乗算１回、除Ｘ１回の計２回となる。この例の
場合、テーブルの読み取り時間を含めても従来法に比べ
約５分の１の処理時間となり、余裕時間をその他の処理
に向けることができる。For comparison, let a-1, b=2 in equation (1), and try to find C with an accuracy that satisfies ε<0.000001 in equation (3). In the conventional processing method, multiplication 5 This requires a total of 15 operations: 1, 5 divisions, and 5 additions. On the other hand, in the present invention, since the accuracy of the calculated value is determined by the table, the number of calculations is always two, one multiplication and one division. In this example, even if the table reading time is included, the processing time is about one-fifth of that of the conventional method, and the extra time can be used for other processing.

第３図および第４図は、本発明に係るディジタルコント
ローラを、誘導電動機における電流成分の算出に用いた
例を示す。3 and 4 show examples in which the digital controller according to the present invention is used to calculate current components in an induction motor.

誘導電動機では、第３図に示すように、励磁電流成分Ｉ
工およびトルク電流成分エアが判明している場合、その
ベクトル合成電流■１は、直交する電流成分ＩＮ、■７
を合成することで求められ、１１　＝ｆＴ７１Ｔ１７１
として表せる。In an induction motor, as shown in Fig. 3, the exciting current component I
When the mechanical and torque current components AIR are known, the vector composite current ■1 is calculated by the orthogonal current components IN and ■7.
It is obtained by combining 11 = fT71T171
It can be expressed as

第４図は、各電流成分１．、■１からベクトル合成電流
■、を求める手順を示すフローチャートである。FIG. 4 shows each current component 1. , ■1 is a flowchart showing a procedure for obtaining vector composite current (2) from (1).

図において、先ず入力された電流成分■９、■７の絶対
値の大小を比較しくステップ４１）、ＩＮが大の場合（
ステップ４１ＹＥＳ）、パラメータＲとしてＩｔとＩ、
ｌの比を求める（ステップ４２）。In the figure, first compare the absolute values of the input current components ■9 and ■7 (step 41). If IN is large (
Step 41 YES), It and I as parameters R,
The ratio of l is determined (step 42).

次いで、求めたパラメータＲに対応する関数Ａ（Ｒ）−
、／７’ＴＴの値をテーブルから読出し、電流成分Ｉ工
に乗じてベクトル合成電流■１を得る（ステップ４３）
。Next, the function A(R)- corresponding to the determined parameter R is
, /7'TT are read from the table and multiplied by the current component I to obtain the vector composite current ■1 (step 43).
.

ステップ４１において、■、が大でない場合、すなわち
１．が大の場合（ステップ４１ＮＯ）、パラメータＲと
して１．とＩ？の比を求める（ステップ４４）。In step 41, if ■ is not large, that is, 1. is large (step 41 NO), the parameter R is set to 1. and I? Find the ratio of (step 44).

次いで、求めたパラメータＲに対応する関数Ａ（Ｒ）−
＃王ゴの値をテーブルから読出し、電流成分Ｉ７に乗じ
てベクトル合成電流Ｉ、を得る（ステップ４５）。Next, the function A(R)- corresponding to the determined parameter R is
The value of #Ogo is read from the table and multiplied by the current component I7 to obtain the vector composite current I (step 45).

以上のようにこのディジタルコントローラは、入力され
た２個の数値からパラメータを算出し、さらにこのパラ
メータに対応するテーブルを参照することにより、直交
するベクトルを合成して得られるベクトルについてのス
カラー量の算出が極めで簡単におこなわれる。その結果
、本発明のディジタルコントローラを誘導電動機の制御
に用いた場合、応答性にすぐれた制御装置を実現するこ
とができる。As described above, this digital controller calculates a parameter from two input numerical values, and then refers to a table corresponding to this parameter to calculate a scalar quantity for a vector obtained by combining orthogonal vectors. Calculations are extremely easy to perform. As a result, when the digital controller of the present invention is used to control an induction motor, a control device with excellent responsiveness can be realized.

（発明の効果） 以上述べたように本発明によれば、入力された２つの数
値ａ、ｂをそれぞれ平方して加算した和の平方根√α２
＋ｌＴｌｌを求めるのに、２つの数値ａ。(Effects of the Invention) As described above, according to the present invention, the square root √α2 of the sum obtained by squaring and adding the two input numerical values a and b, respectively.
To find +lTll, two numbers a.

ｂの比αを算出する除算が１回、テーブルから読み出し
たｆ７ｑ］と数値すとの乗算回数が１回４゜ と、計２回の数値演算ですみ、処理時間を従来法に比べ
格段に短縮してディジタルコントローラの応答性を向上
することができる。Only two numerical operations are required, one division to calculate the ratio α of b, and one multiplication of f7q] read from the table and the numerical value 4 degrees, and the processing time is significantly reduced compared to the conventional method. By shortening the time, the responsiveness of the digital controller can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明に係るディジタルコントローラの内部構
成の一部を示す機能ブロック図、第２図はテーブルの記
憶内寥を模式的に示した説明図、第３図は本発明を誘導
電動機の制御用に適用した場合の各電流成分の説明図、
第４図は実施例の動作を示すフローチャートである。 工・・・ディジタルコントローラ　２・・・除算手段３
・・・読出し手段　　　　　　　４・・・テーブル５・
・・乗算手段　　　　　　　　ａ・・・入力数値ｂ・・
・入力数値　　　　　　　　Ｃ・・・出力数値α・・・
入力数値の比FIG. 1 is a functional block diagram showing a part of the internal configuration of a digital controller according to the present invention, FIG. 2 is an explanatory diagram schematically showing the internal structure of a table, and FIG. An explanatory diagram of each current component when applied for control,
FIG. 4 is a flowchart showing the operation of the embodiment. Engineering: Digital controller 2: Division means 3
...Reading means 4...Table 5.
...Multiplication means a...Input numerical value b...
・Input numerical value C...Output numerical value α...
Ratio of input numbers

Claims (1)

【特許請求の範囲】 入力された２つの数値ａ、ｂをそれぞれ平方して加算し
た和の平方根√ａ＾２＋ｂ＾２を求めるディジタルコン
トローラにおいて、 絶対値の小なる数値ａと絶対値の大なる数値ｂとの比α
（＝ａ／ｂ）を算出する除算手段と、前記比α（０≦α
≦１）と、この比αについての関数√α＾２＋１との対
応関係を予め数値として記憶しておいたテーブルと、 このテーブルを参照し、前記比αに対応する関数√α＾
２＋１の値を読み出す手段と、 読み取った関数√α＾２＋１の値に前記数値ｂを乗算し
、その積ｂ√α＾２＋１を、求める平方根√ａ＾２＋ｂ
＾２として出力する乗算手段と、を有することを特徴と
するディジタルコントローラ。[Claims] In a digital controller that calculates the square root √a^2+b^2 of the sum of two input numerical values a and b squared and added, a numerical value a having a small absolute value and a numerical value having a large absolute value. Ratio α to numerical value b
(=a/b), and the ratio α (0≦α
≦1) and the function √α^2+1 for this ratio α is stored in advance as a numerical value, and this table is referenced to calculate the function √α^ corresponding to the ratio α.
means for reading out the value of 2+1, and multiplying the read value of the function √α^2+1 by the numerical value b, and calculating the square root √a^2+b to obtain the product b√α^2+1.
A digital controller characterized in that it has a multiplication means for outputting as ^2.
JP780490A 1990-01-17 1990-01-17 Digital controller Pending JPH03211663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP780490A JPH03211663A (en) 1990-01-17 1990-01-17 Digital controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP780490A JPH03211663A (en) 1990-01-17 1990-01-17 Digital controller

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JPH03211663A true JPH03211663A (en) 1991-09-17

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JP780490A Pending JPH03211663A (en) 1990-01-17 1990-01-17 Digital controller

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5894056A (en) * 1981-11-30 1983-06-04 Fuji Electric Co Ltd Digital arithmetic circuit
JPS5894956A (en) * 1981-11-28 1983-06-06 Daiwa Juko Kk Automatic pallet loading/unloading device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5894956A (en) * 1981-11-28 1983-06-06 Daiwa Juko Kk Automatic pallet loading/unloading device
JPS5894056A (en) * 1981-11-30 1983-06-04 Fuji Electric Co Ltd Digital arithmetic circuit

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