JPH03211772A - Manufacture of mos transistor - Google Patents

Abstract

PURPOSE:To decrease the fluctuation in shape, film thickness and film quality of a spacer and thus control the occurrence of crystal defects in edge portions by forming an oxide film by LOCOS using a silicon nitride as a mask that serves again later for formation of a spacer. CONSTITUTION:A silicon nitride film 4 of a predetermined pattern is formed on a silicon oxide film 2 by CVD. A field oxide film 3 and a transistor spacer oxide 3' are formed by an improved LOCOS technique. With the field oxide film masked by a photoresist film, the oxide film 3' is masked by the silicon nitride film 4 for both isotropic and anisotropic etching. The remaining part after the etching forms a spacer 6. The width of the spacer is constant because it is determined by the silicon nitride pattern 4. The spacer has a uniform quality owing to the LOCOS technique. The transistor is protected from the damage due to the injection into the source and drain because of the small contact angle between the substrate 1 and the spacer 6.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to a method of manufacturing a semiconductor MOS transistor. In particular, LDDII formation relates to improvements in the second oxide spacer forming the DDD structure.

(b) Conventional technology Conventional semiconductor - method of forming a TOS transistor: As shown in FIG. 2(a), an L
OCOS (1 local oxidation of
After sequentially forming the element isolation layer 21, the gate insulating film 22, and the polysilicon gate electrode 23 by the 5ilicon) method, ion implantation for forming the DDD (see 27 in FIG. 2(d)) is performed. Then, as shown in Figure 1(b)
As shown in FIG.
As shown in c), the insulating film 24 is etched back by dry etching or a combination of dry etching and wet etching to form a spacer 25, and then the source 26 is etched by ion implantation as shown in FIG. 1(d). , a drain 26' is formed, an interlayer insulating film 28 is deposited, a contact hole is formed by performing reflow and heat treatment to activate the source and drain, and a metal wiring 29 is formed in this contact hole. There is.

(c) Problems to be Solved by the Invention In the above-mentioned prior art, J
) There is a problem that transistor characteristics vary due to variations in the thickness and quality of the CVD insulating film, and variations in the shape of the spacer due to variations during etchback. Although the contact angle between the spacer and the silicon base is approximately 90 degrees, there is a problem in that crystal defects are likely to occur under the spacer in the source and drain portions, increasing junction leakage current.

This invention was made to solve the above problems, and its purpose is to reduce variations in spacer shape, film thickness, and film quality, and to suppress the occurrence of crystal defects at the edges. An object of the present invention is to provide a method for forming a 4-tos transistor.

(d) Means for Solving the Problems According to the present invention, an oxide film is formed on a silicon substrate by the LOCOS method using a silicon nitride film in a predetermined pattern as a mask, and then by the LOCOS method using the silicon nitride film as a mask again. By etching the oxide film, a trench is formed on both sides with the remaining oxide film by the LOCOS method, and after forming a gate insulating film at the bottom of this trench, a conductive material is buried in this trench to form a trench on both sides. A method for forming a semiconductor MOS transistor is provided, which comprises forming a gate electrode layer having an oxide film spacer.

In this invention, an oxide film is formed on the surface layer of a silicon substrate by the LOCO8 method using a silicon nitride film in a predetermined pattern as a mask.

This LOCOS oxide film is placed on both sides of the gate electrode layer to form oxide film spacers, and is formed by the LOCOS method on the surface layer of the silicon substrate using a silicon nitride film in a predetermined pattern as a mask. Be able to do it.

The external shape of the oxide film produced by this LOCOS method is usually 0.4~
It has a central part with a film thickness of 0.8 μm and a width of 0.4 to 0.0 μm, and edge parts on both sides of this central part where the film thickness gradually decreases with a width of usually 0.1 to 0.8 gm. It consists of a cross-sectional shape.

This silicon nitride film masks the region on the silicon substrate where no oxide film is formed by the LOGO8 method from the oxidation treatment by the LOCO8 method, and masks both ends of the obtained oxide film by the Locos method from etching. It can be used by forming a predetermined pattern on a silicon substrate by, for example, the CVD method.

In the present invention, the silicon nitride film is again used as a mask to etch the upper Aa LOCOS oxide film, thereby forming a trench having remaining portions of the LOCOS oxide film on both sides.

This groove is for burying a conductive material, and usually has an outer shape of 0.4 to several μI in width and 0.4 to 0.8 μI in depth, and is etched using the silicon nitride film as a mask. It can be formed by Furthermore, this etching leaves both sides of the LOCOS oxide film, and the remaining portions of the LOCOS oxide film form oxide film spacers.

This oxide film spacer serves as a mask for the ion implantation for source/drain formation, and is used to form an LCD or DD in the silicon substrate below the oxide film spacer. It is suitable that there is no variation in thickness and shape, the contact angle with the silicon substrate is small, and there is no increase in crystal defects or junction leakage current under the spacer. The outer shape of this spacer is usually 0.1 to 0.2μ in width.
The film thickness is usually 0.4 to 0.6 with respect to this width.
It is suitable that the contact angle gradually decreases from g- to 0 μ-, and it is more effective if the contact angle with the silicon substrate is smaller than 90”.

In this invention, a gate insulating film is formed at the bottom of this trench, and then a conductive material is buried in this trench to form a gate electrode layer having oxide film spacers on both sides. This gate insulating film can be formed by, for example, a thermal oxidation method.

This conductive material is used to form the gate electrode layer, and can be, for example, polysilicon heavily doped with impurities, tungsten, tungsten silicide, or the like.

In the present invention, after step 2, ion implantation of the source and drain can be performed to form the semiconductor MO51-lannostar.

(1;) 9 or L is formed using the working Noricon nitride film pattern as a mask.
The oxide film produced by the OCOS method lowers the contact angle change of the oxide film spacer with the semiconductor dam plate and eliminates variations in film quality, and the above-mentioned Noricon nitride film again acts as a mask for the formation of the oxide film spacer, resulting in an oxide film spacer. Avoid reducing variations in shape.

(f) Example Embodiments of the present invention will be described below with reference to the drawings.

First, as shown in FIG. 1(a), a silicon nitride film 4 of a predetermined pattern is formed on the surface of a Noricon substrate l by CVD via a silicon oxide film 2 by thermal oxidation, and then a silicon nitride film 4 of a predetermined pattern is formed using an improved LOCOS method. , an oxide film 3 for element isolation and an oxide film 3° for a transistor spacer are formed, each having a thickness of 6000 mm.

Next, as shown in FIG. 1(b), the element isolation oxide film is masked using a photoresist film, and the silicon nitride film t1 is
Acid f for the spacer is etched by isotropic etching using as a mask.
The oxide film 3'' for the spacer was etched by 2000 etchings, and then the spacer oxide film 3'' was etched by 4000 mm by anisotropic etching.
t-etch, and the width of the shallow part of this etching is 0.2μ.
A false oxide film spacer 6 is formed. The width of this oxide film spacer is determined by the silicon nitride film pattern 4, so it is uniform, and the film quality is uniform because of the LOCOS method, so it is not susceptible to variations. Further, the contact angle between the silicon substrate 1 and the spacer 6 is as small as 50 to 70 degrees, and damage caused by source and drain implantation can be reduced.

Next, as shown in FIG. 1(C), the photoresist 5 and silicon nitride@4 are removed, a gate insulating oxide film 8 is formed by thermal oxidation, and a polysilicon film 7 is deposited by 3000 layers. to dope.

Next, as shown in FIG. 1(d), the polysilicon film 7 is etched back, phosphorus is added to 100 KeV, 3 x 10/c+e, and arsenic is added to 60 Kel/5 x, 10'.
'/as'' is implanted to form the gate electrode!3. After this, the interlayer insulating film 9 is deposited, reflowed, contact holes are formed,
The metal wiring layer 12 is formed by a normal process to sequentially form 11 N-channel transistors.

(G) Effects of the Invention The method for manufacturing a semiconductor MOS transistor of the present invention can reduce variations in film quality and variations in spacer width due to etching.

Furthermore, since the contact angle of the spacer edge portion with the silicon surface can be reduced, crystal defects occurring in the PN junction after ion implantation can be suppressed, and generation of large junction leakage current can be prevented.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the manufacturing process of a semiconductor MoS transistor manufactured in an example of the present invention, and FIG. 2 is an explanatory diagram of the manufacturing process of a conventional semiconductor MOS transistor. ! ... Silicon substrate, 2 ... Silicon oxide film, 3 ... Oxide film for element isolation, 3'' ... Oxide film for spacer, 4 ... Silicon Nitride film, 5... Photoresist, 6... Oxide film spacer, 7 Polynolycon film, 8... Gate disconnected oxide film, 9...
...Interlayer insulating film, In 11 ...Source/drain 12 ...Metal wiring layer,! 3...Gate electrode. 1st Figure 1゜1 3 1゜1 Figure 1

Claims (1)

[Claims] 1. An oxide film is formed on a silicon substrate by the LOCOS method using a silicon nitride film in a predetermined pattern as a mask, and the oxide film is etched by the LOCOS method using the silicon nitride film as a mask again to form LO on both sides.
A trench with a remaining oxide film is formed by the COS method, a gate insulating film is formed at the bottom of the trench, and then a conductive material is buried in the trench to form a gate electrode layer with oxide film spacers on both sides. 1. A method for forming a semiconductor MOS transistor, the method comprising: forming a semiconductor MOS transistor.