JPH03212082A - High definition television display device - Google Patents

Abstract

PURPOSE:To display a noninterlace signal of a standard television signal and a high definition television signal by a same deflection circuit by providing a movement detection circuit, a frame signal output control circuit, a synchronization phase difference detection circuit, a frame synchronization circuit, a frame memory, a scanning conversion circuit and a changeover circuit. CONSTITUTION:The device consists of a movement detection circuit 1, a frame signal output control circuit 2, a synchronization phase difference detection circuit 3, a frame synchronization circuit 4, a frame memory 5, a scanning conversion circuit 7, changeover circuits 6, 9, a scanning conversion circuit 7, a D/A converter 8 and a high definition television output device 10. Then the noninterlace signal of the standard television signal is displayed on the high definition television output device 10 without revision or changeover of a deflection system while using a vertical scanning frequency of 60Hz as it is. Thus, the high definition television display device is realized, in which the noninterlace signal of a standard television signal and the high definition television signal are displayed by a same deflection circuit.

Description

[Detailed description of the invention] Industrial application field wood BAn mark? The present invention relates to a high-definition television display device that is capable of displaying a non-increment television signal and a high-definition television (11252:1) signal using the same deflection circuit.

2. Description of the Related Art With the development of the MUSK system in recent years, the appearance of high-definition television as the next generation of television is taking shape. Among these, devices have been devised to display conventional standard television signals on high-definition television displays.

As a conventional technique, for example, as shown in Japanese Unexamined Patent Publication No. 62-263783, a high-definition television signal, a standard television signal, and an external signal are used as input signals,
When a standard television signal is output to a high-definition television display device, an external signal may be output to a portion of the signal that is missing due to the aspect ratio.

Problems to be Solved by the Invention However, with the above-mentioned configuration, the vertical scanning frequency of the high-definition television signal currently proposed by Japan is 6.
Due to the difference between 0 Hz and the vertical scanning frequency of the standard television signal (59.94) IZ, the standard television signal cannot be output to a high-definition television display device, and due to the distortion of the display signal, one of the deflection systems It was necessary to change and switch departments.

SUMMARY OF THE INVENTION In view of the above-mentioned problems, it is an object of the present invention to provide a high-quality television display device that can display high-quality television signals and non-interlaced signals of standard television signals using the same deflection circuit.

Means for Solving the Problems In order to achieve this object, the high-definition television display device of the present invention detects the phase difference between the synchronization signal of the high-definition television signal and the standard television interlaced signal and performs synchronization. A synchronization phase difference detection circuit that outputs a control signal for synchronization, a frame synchronization circuit that synchronizes a high-definition television signal and a standard television interlaced signal from a control signal of a synchronization matching circuit, and a frame synchronization circuit that synchronizes a high-definition television signal and a standard television interlaced signal. A motion detection circuit that determines whether the image is a moving image or a still image.
A frame synchronization control signal output circuit that outputs a control signal that causes the same 1 frame signal of a standard television signal to be output only once twice during a fixed period. j
1 frame memory for outputting 1 frame signal, a switching circuit that takes the same 1 frame signal as the normal signal as input and switches the output signal according to the frame synchronization control signal, converts standard television interlace signal to non-interlace signal It consists of a scan conversion circuit for converting, a D/A converter for converting standard television non-interlaced digital signals into analog signals, and a high-definition television output device.

This configuration allows for the modification of the deflection system for standard television non-interlaced signals to a high-definition television output device.
It is possible to display the vertical scanning frequency at 5 oj-(Z) without switching.

EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings. FIG. 1 shows a high-definition television display device in one embodiment of the invention.

In FIG. 1, 1 is a motion detection circuit, 2 is a frame signal output control circuit, 3 is a synchronization phase difference detection circuit, 4 is a frame synchronization circuit, 5Lfi1 frame memory, 6 is a switching circuit, 7 is a scan conversion circuit, 8 is a D/A converter, 9 is a switching circuit, and 10 is a high-definition television output device.

The operation of the high quality Ten Vision display device configured as described above will be described below.

The synchronization phase difference detection circuit 3 detects the horizontal synchronization signal a21 of the high-quality television signal, the vertical synchronization signal a22, and the horizontal synchronization signal of the standard television signal! L23 receives the vertical synchronizing signal &24 and outputs a signal 2L27 representing the horizontal phase difference and a signal &26 representing the vertical phase difference. The frame synchronization circuit 4 is a digital standard television interlace signal +
a 2 , output of synchronous phase difference detection circuit 3! L26.1
27 as an input, and outputs a standard television signal a3 that is in phase with the high-definition television signal. 1 frame memory 5 digits frame synchronization circuit 4 output &3 as input 1
A signal a4 delayed by a frame is output. The output signal a3 of the frame synchronization circuit 4 and the output signal a4 of the one frame memory 6 are input to the switching circuit 6, which outputs the signal a5 selected by the output a31 of the frame signal output control circuit 2. The signal &2 is input to the motion detection circuit 1, and as shown in FIG.
If it is less than TH), it is determined that it is a still image, and if it is more than that, it is determined that it is a moving image, and a control signal 1L31 is output. In the tree example, if it is determined that it is a moving image, if "o" is determined to be a still image, it is 1.
Output Q k. The frame signal output control circuit 2 receives the output a30 of the motion detection circuit as an input, and as shown in FIG. The output signal a5 of the switching circuit 6 which outputs the output signal a3 of the circuit 4 is 1.
A control signal a32 is outputted so that the frame memory output a4 is obtained.

Also, if there is no still image during period T, period T
One frame memory circuit 5 of the last frame signal in
output signal! L4 is forcibly switched to output signal 2L32 of switching circuit 6 as output signal a5. The output signal a5 of the switching circuit 6 is input to the scan conversion circuit 6 and outputted as a standard television non-interlaced signal 7. The output signal a7 of the scan conversion circuit 7 is converted into an analog signal by a D/A converter 1o and outputted as an output iL8. The output signal a8 of the D/A converter 1o is input to the switching circuit 9 together with the analog high-definition television signal a1.

The output a9 of the switching circuit 9 is selected by the external control signal 1L33 and input to and displayed on the high-definition television display device 10.

Effects of the Invention According to the present invention, high-definition television signals with different vertical scanning frequencies can be produced using a motion detection circuit, a frame signal output control circuit, a synchronization phase difference detection circuit, a frame synchronization circuit, a frame memory, a scan conversion circuit, and a switching circuit. It is possible to display standard television non-interlaced signals without changing the deflection circuit, and its practical effects are significant.

[Brief explanation of drawings]

Fig. 1 is a schematic diagram of a high-definition television display device according to an embodiment of the present invention, Fig. 2 is a schematic diagram for explaining the motion detection circuit output signal, and Fig. 3 is a schematic diagram of the frame signal output control circuit. FIG. 3 is a tentative diagram showing the relationship between an output signal and a motion detection circuit output signal. 1...Motion detection circuit, 2...Frame signal output control circuit, 3...Synchronization phase difference detection circuit, 4
...Frame synchronization circuit, 5...1 frame memory, 6...Switching circuit, 7...
...Scan conversion circuit, 8...D/'m converter, 9
. . . Switching circuit, 10 . . . High-definition television display device.

Claims (1)

[Claims] A synchronization phase difference detection circuit receives as input the horizontal synchronization signal and vertical synchronization signal of a standard television signal and the horizontal synchronization signal and vertical synchronization signal of a high-definition television signal, and detects the phase difference between each synchronization signal; a frame synchronization circuit that is controlled by the output signal of the phase difference detection circuit and adjusts the phases of the high-definition television signal and the standard television signal; a frame memory that delays the digitized standard television interlaced signal data by one frame; A motion detection circuit that detects the number of moving pixels relative to the total number of pixels and determines whether the frame is a still image or a video, and a control signal that outputs the same frame signal of a standard television signal twice within a certain period of time. a frame signal output control circuit to output, a switching circuit which receives the frame synchronization circuit output and one frame memory output as input and selects an output signal according to the frame signal output control circuit output signal, and converts a digital standard television interlace signal into a non-interlace signal. A high-definition television display device comprising a scan conversion circuit that performs conversion.