JPH03212159A - Switching regulator - Google Patents

Abstract

PURPOSE:To suppress ripple current in a capacitor on the output side of a DC power supply and to reduce the capacitance by connecting a phase lag synchronizing circuit between control circuits of a switching regulator, compar ing the levels of saw-tooth wave signals and performing control. CONSTITUTION:A plurality of switching regulator sections 5-1, 5-2 are fed with power from a DC power supply having a capacitor 6. The switching regulator comprises a switching element 2 connected with the primary winding of a trans former 1, a rectifying/smoothing circuit 3 connected with the secondary winding of the transformer 1, and a control circuit 4 for performing pulse width control of the switching element 2. Phase lag synchronizing circuits 7 are connected between respective control circuits 4 and the synchronization ratio is controlled through comparison of levels of saw-tooth signals between respective switching regulator sections.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a switching regulator that is composed of a plurality of switching regulator sections and that operate synchronously with a phase difference.

2. Description of the Related Art When constructing a large-capacity stabilized DC power supply or a high-voltage stabilized DC power supply, a configuration in which a plurality of switching regulator sections are operated synchronously is known. In such a switching regulator, the ripple component of the current supplied from the DC power supply becomes large, and a capacitor is provided on the input side of the DC power supply in order to prevent the propagation of switching noise. It is desired to be able to reduce the capacitance of this capacitor.

[Conventional technology]

FIG. 6 is a block diagram of the main parts of the conventional example, where 41 is a transformer, 42 is a switching element such as a field effect transistor or bipolar transistor connected to the primary winding of the transformer 41, and 43 is a rectifier and smoothing element including a rectifier, a capacitor, etc. 44 is a control circuit that controls the pulse width of the switching element 42, 451.45-2 is a switching regulator section, 46.47 is a capacitor on the power supply side, 48 is an inductance, 49 is a DC power source such as a battery, and 50 is a control circuit. This is a control line that connects between

The switching regulator section 45-1, 45-2 includes a switching element 42 connected to the primary winding of the transformer 41.
is pulse width controlled by the control circuit 44, and the voltage induced in the secondary winding of the transformer 41 is rectified and smoothed by the rectifying and smoothing circuit 43 to obtain a DC output voltage.This DC output voltage is used as a reference in the control circuit 44. The on-period of the switching element 42 is controlled so that the DC output voltage becomes a set value in comparison with the voltage.

Such a switching regulator section 45-1.45
-2 in parallel or in series to supply the load, the control circuits 44 are connected by a control line 50 in order to synchronize the on and off of the switching elements 42, for example, one switching regulator Part 45
The sawtooth wave signal of the terminal CT in the control circuit 44 of -1 is supplied to the terminal CT of the control circuit 44 of the other switching regulator section 45-2, and the same sawtooth wave signal is used to control the pulse width. It is synchronized.

In addition, the capacitors 46, 47 and the inductance 487 prevent switching noise from propagating to the DC power supply 49 side, and the charging charge of the capacitor 46 is simultaneously transferred to the switching element 42 of the switching regulator section 45-1, 45-2. By discharging when turned on and supplying it to the primary winding of the transformer 41, changes in the current supplied from the DC power supply 49 are suppressed.

FIG. 7 is a block diagram of the control circuit, in which 51 is an oscillator, 52.53 is a comparator, 54.55 is an error amplifier, and 56
is a flip-flop, 57 is an OR circuit, 58.59 is a NOR circuit, 60 is an inverter, 61.62 is an AND circuit,
63.64 is the output transistor, RT is the terminal to which the resistor R is connected, CT is the terminal to which the capacitor C is connected, DT is the dead time control terminal, +IN, -IN are the input terminals to which the rectified and smoothed output voltage is applied, FB is the feedback terminal , O.C.
is an output control terminal, and CI, C2, El, and E2 are output terminals.

This control circuit has a configuration that can be applied to a two-stone switching regulator, and may also include a reference voltage generation circuit (not shown), and is usually a semiconductor integrated circuit.

The oscillator 51 charges a capacitor C connected to a terminal CT with a constant current, and when a predetermined voltage is reached, performs rapid discharge to generate a sawtooth wave signal. ] and capacitor C connected to terminal CT
[μF], the oscillation frequency f of the oscillator 51 is f', 1.2/(R-C) (KHz).

In FIG. 6, only this terminal CT is shown.
The control circuit 44 of one switching regulator section 45-1 connects the above-mentioned capacitor C to the terminal CT, and the control circuit 44 of the other switching regulator section 45-2
is, without connecting the capacitor C to the terminal CT, the sawtooth wave signal of one switching regulator section 45-1 is
It is supplied to the other switching regulator section 45-2 to cause it to operate synchronously.

Further, the comparator 53 compares the level of the sawtooth wave signal generated at the terminal CT with the output signal of the error amplifier 54, 55, and outputs the output quadrature transistor 3. 64 on-period.

When the output control terminal OC is set to "0", the output transistor 3.64 simultaneously turns on and off, and when the output control terminal OC is set to "1°", the output transistor 3.64 turns on and off in response to the inversion operation of the flip-flop 56. , the output transistor 3.64 performs reverse phase operation.In the case of a single-stone switching regulator, the output of either output transistor 3.64 can be directly connected to the switching element 42 or connected to a transformer, etc. It will be added via.

[Problem that the invention seeks to solve]

As mentioned above, the plurality of switching regulator sections 45
When -1.45-2 is operated synchronously, pulse width control is performed based on the same sawtooth wave signal, and the switching elements 42 are synchronized so that they are turned on or off at the same time. Therefore, the transformers 41 connected in parallel
DC current is supplied to the primary winding from [49]. The current supplied from the power supply 49 increases, and in order to absorb the change, the DC power supply 4
It is necessary to increase the capacitance of the capacitor 46 on the output side of the circuit 9 and to use a structure with a large allowable ripple current value, which results in an increase in size and cost.

An object of the present invention is to suppress the ripple current value of the capacitor 46 on the output side of the DC power supply 49 and to reduce its capacitance.

[Means to solve the problem]

The switching regulator of the present invention will be explained with reference to FIG. 1. The switching regulator includes a switching element 2 connected to the primary winding of a transformer l, a rectifier smoothing circuit 3 connected to the secondary winding of the transformer 1, and a switching element 2 connected to the primary winding of the transformer 1. 2. A plurality of switching regulator sections 5-1 and 5-2. . . 5-n, a voltage is applied from a DC power supply having a capacitor 6 to the primary winding of the transformer 1 of each switching regulator section 5-1 to 5-n via the switching element 2, and a plurality of switching In a switching regulator that operates the regulator sections 5-1 to 5-n in synchronization, the control circuits 4 are connected via a phase delay synchronization circuit 7, and the switching regulator section 5-1 is controlled by level identification of the sawtooth wave signal. The fall timing of the sawtooth wave signal is made different corresponding to 5-n.

Also, a comparator for comparing the level of the sawtooth wave signal in the control circuit 4 of the switching regulator section, which uses the phase delay synchronization circuit 7 as a master, with a reference voltage corresponding to the switching regulator section, which serves as a slave, and this comparator. At the rising timing of the output signal, the capacitor for outputting the sawtooth wave signal in the control circuit 4 of the slave switching regulator section is forcibly discharged, and the sawtooth wave signal is forced to fall. It is composed of circuits.

In addition, the phase delay synchronization circuit 7 is connected to an oscillator that outputs a pulse with a period shorter than the period of the sawtooth wave signal, and a terminal voltage of a capacitor for outputting the sawtooth wave signal in each switching regulator section. A first comparator that outputs a high level signal when the voltage rises above a reference voltage set for the regulator section, and only when the output signal of this first comparator is at a high level, pulses from the oscillator and the reference voltage are output. and a second comparator that forcibly discharges the capacitor for outputting the sawtooth wave signal and forcibly lowers the sawtooth wave signal.

[Effect]

Since the control circuits 4 of the plurality of switching regulator sections 5-1 to 5-n are synchronized with a phase difference by the phase delay synchronization circuit 7, the control circuits 4 of the plurality of switching regulator sections 51 to 5-n are synchronized with a phase difference. Since the switching elements 2 are not turned on at the same time, the peak current supplied from the DC power supply is reduced. That is, the ripple current of the capacitor 6 is reduced, and its capacitance can be reduced.

In addition, the level of the sawtooth wave signal of the master switching regulator section is compared with the reference voltage set for the slave switching regulator section, and the capacitor for outputting the sawtooth wave signal of the slave switching regulator section is forced. By discharging, the switching element 2 is synchronized with a predetermined phase delay with respect to the master switching regulator section.
are controlled to be turned on or off with a phase difference, respectively.

In addition, when the phase delay control circuit is constituted by an oscillator and first and second comparators, each switching regulator section 5-
The sawtooth wave signals 1 to 5-n are compared with a reference voltage by a first comparator, and when they exceed the reference voltage, a second comparator compares the pulses from the oscillator with the reference voltage. The capacitor for outputting the sawtooth wave signal is forcibly discharged at the timing of the pulse, so the sawtooth wave signal is forcibly output every predetermined number of pulses based on the oscillator pulse timing. The switching regulator can be set to a different phase for each switching regulator section.

[Examples] Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a circuit diagram of the main parts of one embodiment of the present invention, showing the main parts of the control circuit 11 and 12 and the phase delay synchronization circuit when two switching regulator parts are operated synchronously, Output side capacitor.

The illustration of a transformer, a switching element, a rectifying and smoothing circuit, etc. is omitted. In addition, the phase delay synchronization circuit is the comparator 13.1
4, reference voltages Vrl and Vr2, resistors R3 to R5 and capacitor C3 forming a differential circuit. Further, the comparator 14 constitutes a circuit for forcibly discharging the capacitor C2 in the switching regulator section which serves as a slave.

A capacitor C1 and one terminal of the comparator 13 are connected to the terminal CT of the control circuit 11 of one of the switching regulator sections serving as the master, a resistor R1 is connected to the terminal RT, a terminal G is connected to ground, and the comparator 13 is connected to the terminal CT. A reference voltage Vrl is applied to the ten terminals of the . In addition, a capacitor C2 and an output terminal of a comparator 14 are connected to a terminal CT of the control circuit 12 of the other switching regulator section which is a slave, a resistor R2 is connected to a terminal RT, and a terminal G is connected to ground. .

When the level of the sawtooth wave signal at the terminal CT of the control circuit 11 rises and becomes higher than the reference voltage Vrl, the comparator 13 outputs "
The output signal becomes 0''°, and conversely, when it becomes lower than the reference voltage Vrl, the output signal becomes 1''. Further, a +V voltage is applied to the terminal of the comparator 14 after being divided by resistors R4 and R5, and the output signal of the comparator 13 is applied after being differentiated by a differentiating circuit including a capacitor C3. When the voltage at the terminal becomes lower than the reference voltage Vr2, the output signal of the comparator 14 becomes "0", and the control circuit 12
The charge stored in the capacitor C2 connected to the terminal CT of the capacitor C2 flows into the comparator 14, and the sawtooth wave signal is forced to fall.

FIG. 3 is an explanatory diagram of the operation of one embodiment of the present invention, (a)
is a sawtooth wave signal at the terminal CT of the control circuit 11, (■) is the output signal of the comparator 13, (C) is the differential output signal, and (d) is an example of the sawtooth wave signal at the terminal CT of the control circuit 12. show.

The level of the sawtooth wave signal of the terminal voltage of the capacitor C1 connected to the terminal CT of the control circuit 11 and charged with a constant current is
As shown in (a), the output signal of the comparator 13 gradually increases and exceeds the reference voltage Vrl, as shown in (b).
0゛, and conversely, when it drops below the reference voltage Vrl °“
I becomes 11. If the reference voltage Vrl in this case is set to 1/2 of the peak level of the sawtooth wave signal, the output signal of the comparator 13 will be a signal with a duty of 50%.

Further, the output signal of the comparator 13 is differentiated by a differentiating circuit including a capacitor c3, and is applied to the + terminal of the comparator 14 as a signal shown in (C). This differential output signal and the reference voltage Vr2 are compared in the comparator 14, and the comparator 13
The differential output signal at the falling edge of the output signal is the reference voltage Vr.
Since it becomes lower than 2, the output signal of the comparator 14 becomes "O". As a result, the charge in the capacitor C2 flows into the comparator 14 and is discharged, and the sawtooth wave signal at the terminal CT of the control circuit 12 becomes as shown in (d). That is, control circuit 1
The sawtooth wave signal (a) in the control circuit 1 and the sawtooth wave signal (d) in the control circuit 12 have a phase difference of 180°.

Therefore, the on and off timings due to the pulse width control of the switching elements in the switching regulator sections of one side and the other side are shifted by 180'', and the switching regulator sections of one side and the other side are connected to the common DC power supply side. The ripple current of the capacitor 6 (see FIG. 1) can be reduced.Thereby, the capacitance of the capacitor 6 can be reduced.

Furthermore, when a large number of switching regulator sections are operated synchronously, the reference voltage Vrl applied to the ten terminals of the comparator 13 is set to a different value for each switching regulator section, thereby generating sawtooth wave signals with different phases for each of the switching regulator sections. As a result, the on/off timing of the switching elements in each switching regulator section can be shifted, so even if the output capacity of the switching regulator is increased, the ripple current in the capacitor on the DC power supply side can be reduced. can do.

FIG. 4 is a circuit diagram of a main part of another embodiment of the present invention, and 21
．． 22 is a control circuit of the switching regulator section, 23
26 is a comparator, 27 is an oscillator, R11-Rl4 are resistors, C1l and C12 are capacitors, Vrll and Vr12 are reference voltages, and the phase delay synchronization circuit is the first comparator 2.
3.25, a second comparator 24, 26, an oscillator 27, and the like.

The oscillator 27 outputs a pulse signal with a frequency corresponding to the number of switching regulator sections constituting the switching regulator. For example, when operating two switching regulator sections synchronously, the oscillator 27 outputs a pulse signal with a frequency corresponding to the number of switching regulator sections constituting the switching regulator. It outputs a pulse signal with twice the frequency.

In addition, a capacitor C1l is connected to each terminal CT of the control circuit 21 and 22 corresponding to a plurality of switching regulator sections.
, C12, a resistor R11°R12 is connected to the terminal RT,
Terminal G is connected to ground. First comparator 23.
25 is the sawtooth wave signal of the terminal CT and the reference voltage Vrll;
When the level of the sawtooth wave signal is high, the output signal is "1", and when the level of the sawtooth wave signal is low, the output signal is "O".

Also, the second comparators 24 and 26 have one terminal connected to the first comparator 2.
3.25 output signal and a pulse signal from the oscillator 27 via resistors R13 and R14 are applied, and reference voltages Vrll and Vr12 are applied to the ten terminals. Therefore, when the output signal of the first comparator 23.25 is "0", the resistance R
13, even if a pulse signal is applied via R14, the second
Since one terminal of the comparators 24 and 26 remains at a low level, which is lower than the reference voltages Vrll and Vr12, the output signal becomes ``l''. However, when the output signal of the first comparator 2325 becomes "°1", the pulse signal applied via the resistor R13R14 becomes higher than the reference voltages Vrll and Vr12, so the output signal of the second comparator 24.26 becomes 0°, the charges in the capacitors C1l and CI2 flow into the second comparator 24, 26, and the sawtooth signal is forced to fall.

FIG. 5 is an explanatory diagram of the operation of another embodiment of the present invention, (a
) is the pulse signal from the oscillator 27, (b) is the control circuit 2
(C) shows an example of the sawtooth wave signal of the control circuit 22.

(a) When the Li bus PO is applied to one terminal of the comparator 24.26 through resistors R13 and R14, the sawtooth wave signal of the control circuit 21 becomes (b) the sawtooth wave signal of the control circuit 22. Assuming that the wave signal is at the level shown in (C) and the reference voltages are at the levels of Vrll and Vr12, the output signal of the comparator 25 is "0", so the output signal of the comparator 26 is "'". However, since the output signal of the comparator 23 becomes 1", the output signal of the comparator 24 becomes 0". Therefore, the capacitor C1l connected to the terminal CT of the control circuit 21 is forced to discharge. and the sawtooth signal is lowered.

At the time of the next pulse P1, the sawtooth wave signal of the control circuit 21 is at a level lower than the reference voltage Vrll, so the comparator 2
The output signal of the comparator 24 becomes 0'', and therefore the output signal of the comparator 24 remains at 0'1''. However, since the sawtooth wave signal of the control circuit 22 has a level higher than the reference voltage Vr12, the output signal of the comparator 25 becomes "1P", and the output signal of the comparator 25 becomes "1P".
The output signal of 6 becomes '0', the capacitor C12 connected to terminal CT is forcibly discharged, and the sawtooth wave signal falls.Similar operations are repeated according to pulses P2, P3, and so on. As a result, the sawtooth wave signals of the control circuits 21 and 22 are generated with a phase difference of 180 degrees, and pulse width control is performed based on this sawtooth wave signal. Ripple current can be suppressed and the capacitance of the capacitor can be reduced.

In addition, when three switching regulator sections are operated synchronously, for example, the frequency of the pulse from the oscillator 27 is set to three times the frequency of the sawtooth wave signal, and each switching regulator section is operated in synchronization with every second pulse signal. A reference voltage is set to generate a sawtooth signal. In that case, the sawtooth wave signals of the control circuits of each switching regulator section will have a phase difference of 120 degrees.

〔Effect of the invention〕

As explained above, the present invention connects the phase delay synchronization circuit 7 between the control circuits 4 of the switching regulator sections 5-1 to 5-n, and compares the levels of sawtooth wave signals to each switching regulator section 5-n. By making the phases of the sawtooth wave signals in the switching regulator sections 1 to 5-n different, the switching element 2 is turned on or off at the same timing by pulse width control in all the switching regulator sections 5-1 to 5-n. Therefore, it is possible to suppress the ripple current of the capacitor 6 on the output side of the DC power supply and reduce its capacitance, making it possible to achieve miniaturization and cost reduction. .

Furthermore, the phase delay synchronization circuit 7 includes a comparator 13 that compares the level of the sawtooth wave signal of the master switching regulator section with a reference voltage, and a capacitor C2 for outputting the sawtooth wave signal of the slave switching regulator section. By configuring the comparator 14 as a forced discharge circuit, the reference voltage Vrl to be compared with the level of the sawtooth wave signal of the switching regulator section of the master is selected to correspond to the switching regulator section of the slave. As a reference for the sawtooth wave signal of the regulator section, by making the phases of the sawtooth wave signals of the slave switching regulator sections different, it is possible to easily control the switching elements using pulse width control at different timings corresponding to the switching regulator sections. Therefore, the capacitance of the capacitor 6 on the output side of the DC power supply can be reduced.

Further, the phase delay synchronization circuit 7 is constituted by an oscillator 27, a first comparator 23.25, a second comparator 24.26, etc., and the pulse signal from the oscillator 27 is controlled for every number of switching regulator sections. Since the control circuits of each switching regulator section can synchronize and generate a sawtooth wave signal, the switching element 2 can be controlled by pulse width control.
This means that it can be easily controlled at different timings depending on the switching regulator section.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram of the principle of the present invention, Fig. 2 is a main circuit diagram of an embodiment of the present invention, - Fig. 3 is an explanatory diagram of the operation of an embodiment of the invention, and Fig. 4 is a diagram illustrating the operation of an embodiment of the present invention. Main part circuit diagram of other embodiments, No. 5
FIG. 6 is an explanatory diagram of the operation of another embodiment of the present invention, FIG. 6 is a block diagram of the main part of the conventional example, and FIG. 7 is a block diagram of the control circuit. 1 is a transformer, 2 is a switching element, 3 is a rectifier and smoothing circuit, 4 is a control circuit, 5-1.5-2°... is a switching regulator section, and 6 is a capacitor.

Claims (3)

[Claims] (1), a switching element (2) connected to the primary winding of the transformer (1), a rectifying and smoothing circuit (3) connected to the secondary winding of the transformer (1), and the switching element (2) connected to the secondary winding of the transformer (1).
) and a control circuit (4) for stabilizing the output DC voltage of the rectifying and smoothing circuit (3) by controlling the pulse width of the input voltage. The plurality of switching regulator sections (5-1 to
5-n) to apply a voltage to the primary winding of each transformer (1) via the switching element (2) to operate the plurality of switching regulator sections (5-1 to 5-n) synchronously; In the regulator, the plurality of switching regulator sections (5-1 to 5
-n) The level identification of the sawtooth wave signal for pulse width control in the control circuit (4) allows the sawtooth wave signal corresponding to each of the switching regulator sections (5-1 to 5-n) to be A control circuit (4) corresponding to each of the switching regulator units (5-1 to 5-n) includes a phase delay synchronization circuit (7) that controls the falling timing to be different from each other.
A switching regulator characterized in that it is connected between. (2) The phase delay synchronization circuit (7) has one of the plurality of switching regulator sections (5-1 to 5-n) as a master and the others as slaves, and the switching regulator section (7) of the master ( a comparator that compares the level of the sawtooth wave signal in the control circuit (4) of 5-1) with a reference voltage corresponding to the slave switching regulator section (5-2 to 5-n); In order to output a sawtooth wave signal in the control circuit (4) of the switching regulator section (5-2 to 5-n) based on the output signal of the comparator when the level of the wave signal exceeds the reference voltage. 2. The switching regulator according to claim 1, further comprising a circuit for forcibly discharging the capacitor and forcibly lowering the sawtooth wave signal. (3) The phase delay synchronization circuit (7) includes an oscillator that outputs a pulse with a cycle shorter than the cycle of the sawtooth wave signal, and each of the switching regulator sections (5-1 to 5-n).
The terminal voltage of the capacitor for outputting the sawtooth wave signal in each switching regulator section (5-1 to 5-5-
n) a first comparator that outputs a high level signal when the voltage rises above a correspondingly set reference voltage; 2. The switching regulator according to claim 1, further comprising: a second comparator that compares the values of the two and forcibly discharges the capacitor to forcibly lower the sawtooth wave signal.