JPH03212957A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize the high density of an electrode-connecting part by a method wherein a second mask-alignment pattern is integrally formed in a mask for first electrode formation and a mask for second connecting-hole formation is aligned by using the pattern as a reference. CONSTITUTION:A silicon oxide film as a first insulating film 3 is formed, by a CVD method, on a silicon substrate 1 where a first mask-alignment pattern 2 has been formed. A first connecting hole 4 is made by a photoetching operation. Then, a first electrode 5 is formed of polycrystalline silicon by a low-pressure CVD method. A mask pattern 6 for first electrode formation use, of a photoresist, in which a mask 6a for second mask-alignment pattern formation use has been built is aligned and formed by using the pattern 2 as a reference. A first electrode 5 and a second mask- alignment pattern 7 are formed by using the patterns 6, 6a. The patterns 6, 6a are removed. A second insulating film 8 of a silicon oxide film is formed. An alignment operation is executed by using the pattern 7 as a reference. A mask pattern 9 for second connecting-hole formation use is formed. The film 8 is etched selectively. The pattern 9 is removed. A second connecting hole 10 is made. A second electrode 12 is connected. Thereby, the high density of an electrode-connecting part is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a manufacturing method for realizing high density electrode connection portions of a semiconductor device.

2. Description of the Related Art A conventional manufacturing method will be explained with reference to step-by-step cross-sectional views of FIGS. 2(a) to 2(d).

First, as shown in FIG. 2(a), for example, a silicon substrate 21 is used as an object to be connected, and is made of a silicon oxide film or the like using a first mask alignment pattern 22 formed in advance on the main surface as a reference. A mask button 24 for forming a first connection hole made of photoresist or the like is aligned on the first insulating film 23,
The first insulating film 23 is selectively etched, and the first connection hole 2 is etched.
2 was formed. Next, as shown in FIG. 2(b), the first
The connection hole forming mask pattern 24 is selectively removed, and polycrystalline silicon containing, for example, an N-type impurity is formed thereon as the first electrode 26, and the first mask pattern 24 is removed.
A mask pattern 27 for forming a first electrode made of photoresist or the like was aligned with reference to 2, and the polycrystalline silicon was selectively etched. Next, as shown in FIG. 2C, the first electrode forming mask pattern 27 is selectively removed, a second insulating film 28 is formed of a silicon oxide film, etc., and the first mask pattern 22 is removed. A mask pattern 29 for forming a second contact hole made of photoresist or the like was aligned as a reference, and the second insulating film 28 was selectively etched to form a second contact hole 30. Finally, as shown in FIG. 2(d), the second connection hole forming mask pattern 29 is selectively removed,
A second electrode 31 made of aluminum or the like was connected.

By the conventional manufacturing method as described above, the first connecting hole 24 is
．． For forming the first electrode 27. Each mask pattern for forming the second connection hole 29 is made to match the first mask alignment pattern 22. However, in practice, it is necessary to allow for a certain degree of misalignment, and here it is assumed that a maximum misalignment of χ is allowed.

Therefore, according to the conventional manufacturing method shown in FIGS. 2(a) to 2(d), the mask alignment margin δ between the first electrode 26 and the second connection hole 30 shown in FIG. 26 is +
If the second connection hole 30 has a deviation of 1.chi..mu.m, a maximum of about 2.chi..mu.m is required.

Problems to be Solved by the Invention However, in the method for manufacturing a semiconductor device, if the allowable one-time mask misalignment is χμm, the mask alignment margin δ of the first electrode 26 shown in FIG. 3 can be expected to be about 2χμm. Since this is necessary, there is a problem in that it becomes an obstacle to increasing the density of the electrode connection portions.

The present invention solves the above-mentioned problems, and an object of the present invention is to provide a method for manufacturing a semiconductor device that can realize high density electrode connection parts.

Means for Solving the Problems In order to achieve this object, the method for manufacturing a semiconductor device of the present invention includes a step of forming a second mask alignment pattern simultaneously with the formation of the first electrode, and a step of forming a second connection hole forming mask pattern. and performing mask alignment based on the second mask pattern.

Effect: This configuration improves the precision of alignment of the second connection hole mask to the first electrode, so the mask alignment margin of the first electrode can be reduced, and the density of the electrode connection portions can be increased.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to FIGS. 1(a) to (g).
) will be described with reference to step-by-step sectional views shown in FIG.

First, as shown in FIG. 1(a), for example, a silicon substrate 1 is used as an object to be connected, and a first mask alignment pattern 2 is formed in advance on the main surface thereof. Next, as shown in FIG. 1(b), a 200 nm silicon oxide film was formed as a first insulating film 3 on the silicon substrate 1 by, for example, the CVD method, and a first connection hole 4 was formed by photoetching. .

Next, as shown in FIG. 1C, polycrystalline silicon containing, for example, about I x 10"am' of phosphorus was formed as the first electrode 5 to a thickness of 20 nm by low pressure CVD.Next, , as shown in FIG. 1(d), a first electrode forming mask pattern 6 made of photoresist or the like is applied to the first electrode.
It was formed by aligning with mask alignment pattern 2 as a reference. At this time, the first electrode forming mask pattern 6 includes a second mask matching pattern forming mask pattern 6a,
formed at the same time. Next, as shown in Figure 1(e),
The polycrystalline silicon is selectively, for example, dry etched using the mask patterns 6 and 6a to form the first electrode 5 and the second mask alignment pattern 7, and the mask patterns 6 and 6a are selectively removed. 2. As the insulating film 8, for example, a silicon oxide film was formed with a thickness of 500 rv. Further, as shown in FIG. 1(f), the second mask alignment pattern 7
The mask pattern 9 for forming the second contact hole was formed using photoresist or the like, with alignment based on the above. Finally, as shown in FIG. 1(g), the second
The insulating film 8 was selectively etched, the mask pattern 9 was selectively removed, a second connection hole 10 was formed, and a second electrode 11 made of aluminum or the like was connected.

As described above, according to this embodiment, when forming the first electrode 5, the second mask alignment pattern 7 is formed at the same time, and the second connection hole forming mask button 9 is positioned based on the second mask alignment pattern 7. This alignment improves the mask alignment accuracy of the second connection hole 10 with respect to the first electrode 5. For example, the mask alignment margin δ between the first electrode 26 and the second connection hole 30 shown in FIG.
The second connection hole 30 is +7μm or -χμ with respect to the electrode 26.
Even if a deviation of m occurs, the maximum deviation is approximately χμm.

Effects of the Invention According to the present invention, the second mask matching pattern is built into the first electrode forming mask and formed simultaneously, and the second connection hole forming mask is mask matched based on the second mask matching pattern. By doing so, it is possible to reduce the mask margin of the first electrode second connection hole, and to realize higher density of the electrode connection portion.

[Brief explanation of drawings]

FIG. 1 is a step-by-step sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a step-by-step sectional view of a conventional example,
FIG. 3 is a cross-sectional view of a semiconductor device for explaining the mask alignment margin. DESCRIPTION OF SYMBOLS 1... Silicon substrate, 2... First mask alignment pattern, 3... First insulating film, 4... Song...
First connection hole, 5...First electrode, 6...
First electrode formation mask button, 6a...Mask button for second mask alignment pattern formation, 7...Second mask alignment pattern, 8...Second insulating film, 9・
...Mask button for forming second connection hole, 10...
...Second connection hole, 11...Second electrode.

Claims (1)

[Claims] a step of forming a first insulating film on a semiconductor substrate having a first mask alignment pattern formed in advance or an object to be connected on the same substrate, and forming a first connection hole in the first insulating film; A conductive film is formed on the object to be connected on the same substrate, and a first electrode forming mask pattern having a built-in second mask alignment pattern is aligned with reference to the first mask alignment pattern, and the selectively etching the conductive film to form a first electrode; forming a second insulating film; performing alignment based on the second mask alignment pattern;
The method includes the steps of selectively etching the second insulating film to form a second connection hole on the first electrode, and forming a second electrode covering the second connection hole. A method for manufacturing a semiconductor device.