JPH03214912A - Automatic gain control circuit - Google Patents

Abstract

PURPOSE:To attain direct connection with an amplifier stage not via a capacitor by connecting a compensation circuit so that a bias current flowing to a load resistor is always constant even when a base bias current is changed by gain control. CONSTITUTION:Two sets of transistors(TRs) Q7, Q8 and Q9, Q10 whose emitters and bases are connected respectively in common in a compensation circuit, and the respective emitters of them are connected in common to a voltage source V1 via other current source 12, and the bases of each set connect respectively to a reference voltage source VR and a control voltage source VC. Moreover, collectors of the TRs Q9, Q10 connect to the voltage source V2 and the collectors of the TRs Q7, Q8 connect to output terminals V0, V0' respectively. Even when a bias current of TRs Q3, Q6 for gain control is changed, the change in the current is compensated by the TRs Q7, Q8 of the compensation circuit and the output level at a terminal of a load resistor is made constant.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) This invention relates to improvements in automatic gain control circuits.

(Prior art) An automatic gain control circuit using Gilbert's multibriar circuit type has excellent linearity between the gain control voltage and the voltage gain (in dB), and has a wide band. It is widely used from etc.

FIG. 3 shows a circuit diagram of a conventional automatic gain control circuit.

That is, the pair of transistors Ql and Q2 each have an emitter resistor Rl. They are commonly connected via R2 and connected to a voltage source Vl via a current source 1l.

The collectors of the transistors Ql and Q2 are connected to two pairs of common emitter transistors Q3, Q4 and Q, respectively.
5. Correspondingly connected to the emitter of QB, transistor Q3
．． The collectors of QB are connected to transistors Q4.QB through load resistors RL, respectively. Together with the collector of Q5, it is connected to the voltage source v2.

In the above conventional automatic gain control circuit configuration, transistor Q
l. A signal input terminal Vl. connected to each base of Q2.
An input signal V1. After V1' is supplied and gain controlled, the terminal of the load resistor RL (transistor Q
3, collector of Q6) as output signals Vo, Vo', respectively, from output terminals vo. It is taken out in vo'.

Also, the voltage gain is determined by the voltage gain of transistor Q4. A reference voltage source VR commonly connected to the base of transistors Q3. Control voltage source VC commonly connected to the base of QG
It is controlled by the potential difference (Vc-Vr) between the two.

By the way, in the above circuit, the DC output potential Vodc is expressed by the following equation (1), where v2 is the DC voltage of the voltage source v2.

Vodc-V2 R L-I Q (1)
However, IQ indicates the collector DC bias current of the transistor Q3 or Q6.

As can be seen from the above equation (1), when the potential difference (Vc-Vr) is changed in order to control the gain, the bias current IQ changes accordingly, so the DC output potential Vodc changes.

If this DC output potential Vodc is changed by gain control, DC connection with other amplification stages becomes difficult. In such cases, a large-capacity capacitor must be used to connect to other amplification stages, but large-capacity capacitors themselves are difficult to integrate into integrated circuits, so it is difficult to integrate such automatic gain control circuits. It had become an obstacle to

Also, to reduce the gain, transistor Q3. If the base bias current of Q6 is made small, there will be no margin for bias potential for small signal amplitudes, so an improvement has been desired.

(Problems to be Solved by the Invention) Conventional automatic gain control circuits have problems such as difficulty in direct current coupling because the output potential changes by controlling the gain, and lack of margin for bias potential for small signal amplitudes. was there.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an automatic gain control circuit which eliminates the above-mentioned conventional drawbacks and keeps the output potential constant even when the gain is controlled.

[Structure of the Invention] (Means for Solving the Problems) The present invention comprises a pair of transistors commonly connected to each other via an emitter resistor, and two transistors each having an emitter connected to the collector of the pair of transistors, respectively. The pair of transistors are each connected through a load resistor, and the pair of transistors is connected to a voltage source through a current source. In an automatic gain control circuit that extracts an input signal supplied between the bases as an output signal from a terminal of a load resistor, the bias current flowing through the load resistor is always kept almost constant even if the base bias currents of the two sets of transistors are changed. The present invention is characterized in that a compensation circuit is connected in series with the load resistor and in parallel with the two sets of transistors.

(Function) The automatic gain control circuit according to the present invention has a compensation circuit connected so that even if the base bias current is changed for gain control, the value of the bias current flowing through the load resistor is always constant.

Therefore, the DC output potential can be maintained at a constant level regardless of the gain control level, and it is possible to connect directly to the amplifier stage without using a capacitor, making it possible to realize an integrated circuit.

(Embodiments) Hereinafter, embodiments of the automatic gain control circuit according to the present invention will be described in detail with reference to the drawings. Components that are the same as the conventional configuration shown in FIG. 3 will be described with the same reference numerals.

FIG. 1 is a circuit diagram showing an embodiment of an automatic gain control circuit according to the present invention.

That is, similar to the circuit shown in FIG. 3, a pair of transistors Q1. The emitters of Q2 are connected to respective resistors Rl. A common connection is made via R2, and a corresponding connection is made to a voltage source Vl via a current source I1. In addition, two sets of transistors Q3. Q4 and Q5. Connected to each emitter of Q6. Transistor Q3. The collector of QB is connected to transistor Q4.Q through each load resistor RL. Together with the collector of Q5, it is connected to the voltage source v2.

An input signal vt. is supplied between the bases of transistors Ql and Q2. vt' is subjected to gain control and is taken out as output signals Vo, Vo' from the terminals of each load resistor RL (between the collectors of transistors Q3 and Qe). The voltage gain is determined by the transistor Q4. Q5's common base voltage source VR and transistors Q3. The potential difference between the voltage applied between QB and the common base voltage source VC (Vc-
Vr).

The difference from the automatic gain control circuit shown in FIG. 3 is that a compensation circuit is added so that the DC output potential level is always constant regardless of changes in gain.

The compensation circuit first consists of two sets of transistors Q7. whose emitters and bases are commonly connected. Q8 and Q9. Q1
0 are commonly connected to the voltage source Vl through another current source I2, and the bases are respectively connected to a reference voltage source VR. Connected to control voltage source ■c. Furthermore, transistor Q9. The collector of QlO is connected to voltage source v2 and to transistor Q7. The collector of Q8 is output terminal vo, respectively.
connected to vo'.

Therefore, when the current value of current source If is l, current source 1
The circuit is set so that the current value of 2 is I/2.

The reason why the current values of the current sources +1 and I2 are different in this way is that when there is no potential difference (We-Vr) between the reference voltage source VR and the control voltage source VC and it is zero, the transistor Q3
This is to make the bias current values of QB and transistors Q7 to QIO equal.

That is, the potential difference (We-Vr) is zero (Vc-Vr-0
), each bias current of each transistor 03 to QIO is ! The output potential VodC at the DC level is expressed by the following equation (2).

Vode-V2 -ut,e (1/4+l/4)
(2) Now, if we change the value of Vc to control the gain and increase the bias currents of transistors Q3 and QB by Δ■, then conversely, if we change the value of Vc and increase the bias currents of transistors Q3 and QB, then vice versa. Bias current ΔI of Q8 decreases. Therefore, the output potential Vodc is expressed by the following equation (3).

Vodc-V2-RL((I+ΔI)+(I+Δ1
))-V2-RL(lha1Ic)(3) That is, equation (3) is the same as equation (2) above, and Vodc is V
This means that there is no change even if c is changed and the bias current is increased. In equation (3), transistor Q3.
Although the case has been described in which the bias current of Q6 increases, Vode remains constant even when it decreases.

As described above, the automatic gain control circuit according to the present invention uses transistors Q3. Even if the bias current of Q6 is changed, the amount of change in current flows through transistor Q7 of the compensation circuit. This is compensated by QB, and the output potential at the terminal of the load resistor remains constant.

In this way, the compensation circuit consists of two sets of transistors Q3 to Q.
6 in parallel and in series with the load resistor RL, the bias current flowing through the load resistor can be kept constant even if the control voltage is changed, so that the output potential can always be kept constant.

FIG. 2 is a circuit diagram showing another embodiment of the automatic gain control circuit according to the present invention. Similar to FIG. 1, the main difference is only the compensation circuit, and in operation, output potential fluctuations are compensated and kept constant. It is something.

That is, in FIG. 2, components that are symmetrical to the gain control section shown in FIG. 3 are given the same reference numerals and a dash ('). Connected to another voltage source v3.

The bases of transistors Q3' and QB' are commonly connected to voltage source VC, and the collectors are commonly connected to voltage source v2.

Further, the bases of transistors Q4' and Q5' are commonly connected to the voltage source VR, and the collectors are respectively connected to the output terminal vO.
It is connected corresponding to vO'. Note that the current value of current source +1' is 1 similarly to current source I.

As is clear from the circuit configuration in Figure 2, the transistor Q
3 to QB and transistors Q3' to Q8' are connected so that the collectors of the symmetrical pairs cross each other, so the change in the bias current of transistors Q3 and QB due to gain control is caused by the change in the bias current of transistors Q4' and Q5. ' is compensated for by the bias current change, and the output potential level is held constant.

As described above, the automatic gain control circuit according to the present invention can always maintain the output potential constant regardless of level fluctuations of the control signal, so that DC coupling with other amplification stages is possible and it is convenient for integration into an integrated circuit. Furthermore, even if the bias current is made smaller to reduce the gain, there is no problem in that the bias current for small signal amplitudes does not run out of room as in the conventional case.

C Effects of the Invention] The automatic gain control circuit according to the present invention adds a compensation circuit to the conventional circuit configuration, suppresses fluctuations in output potential due to gain control, enables direct current coupling, and achieves integration, etc. This is a great practical effect.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of an automatic gain control circuit according to the present invention, FIG. 2 is a circuit diagram showing another embodiment of the automatic gain control circuit according to the present invention, and FIG. 3 is a circuit diagram showing a conventional automatic gain control circuit. FIG. 3 is a circuit diagram showing a control circuit. +I. I1', 12... Current source, Ql-QIO
．． Ql' to Q6'...transistor, Rl.
R2, R1'. R2'...Resistance, RL...
Load resistance, Vl-VB. VR. VC-... Voltage source, Vl, M
l'...input terminal, vo, vo'...output terminal.

Claims (1)

[Claims] A pair of transistors that are commonly connected to each other via an emitter resistor, two pairs of transistors whose emitters are respectively connected to the collectors of the pair of transistors, and these two pairs of transistors, respectively. A voltage source is connected to the pair of transistors via a load resistor and a current source, and the input signal supplied between the bases of the pair of transistors is taken out as an output signal from the terminal of the load resistor. In the automatic gain control circuit, the transistor is connected in series with the load resistor and in parallel with the two sets of transistors so that the bias current flowing through the load resistor is always approximately constant even if the base bias current of the two sets of transistors is changed. An automatic gain control circuit characterized in that a compensation circuit is connected and configured.