JPH03214972A - Video signal processing device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a video signal processing device that reduces color shift due to fluctuations in clamp level when digital signal processing is performed on video input signals. Conventional technology In recent years, television receivers and video tape recorders have
It is well-established that devices have additional functions that utilize digital signal processing. These functions are performed by A/D converting the video input signal. When A/D converting a video input signal, the input signal is A/D converted as shown in Figure 2(a).
After the clamp circuit 1 holds the DC potential at the synchronization tip of the video input signal constant so that it falls within the dynamic range of A/D conversion, the DC potential is set at a reference DC level setting circuit 8 via the A/D conversion circuit 2. Various functions are achieved by setting levels and performing digital processing. Among these functions, for example, processing such as picture-in-picture that outputs two screens on a display is divided into a digitally processed part and a non-digitally processed part, and the former is shown in Figure 2 (a). After making the DC potential of the synchronization signal tip of the video input signal constant in the clamp circuit 1 so that the input signal falls within the dynamic range of the A/D conversion circuit 2, the DC level is changed through the A/D conversion circuit. As shown in FIG. 2(b), the reference DC level determined at the time of design is set in the reference DC level fixing circuit 9 without going through an A/D conversion circuit, and the DC Various functions were realized using levels. Problems to be Solved by the Invention In the case of the above-mentioned digital signal processing, all the video signals appearing on the display, such as a large static screen, are A/
No problem occurs when processing is performed via the D conversion circuit 2, but in the case of functions such as picture-in-picture, as shown in FIG. A/D conversion circuit Color shift may occur due to factors such as fluctuations in the reference DC level. The present invention solves the above problem, and provides a video signal processing device that always eliminates color shift on the video screen in video processing including digital processing functions! The purpose is to provide the following. Means for Solving Problems In order to achieve this object, the video signal processing device of the present invention includes a circuit that calculates and outputs the average of several H reference DC levels from an A/D conversion circuit, and a circuit that calculates and outputs the average of several H reference DC levels from an A/D conversion circuit. and a comparison calculation circuit that compares the real-time output of the reference DC level from the A/D conversion circuit, and when the difference is large, the reference DC level is
For example, the average value output of the level is the standard D of the l area in Fig. 3.
It is configured such that when the difference is small, the real-time output from the A/D conversion circuit is similarly set as the reference DC level of area I in FIG. 3, for example. Effect: With this configuration, even if the reference DC level set in the A/D conversion circuit fluctuates due to power supply voltage fluctuations, the internal circuit will set the average value output of the reference DC level as the reference DC level, This prevents the reference DC level in the l area from fluctuating greatly, thereby making the step j between the DC levels in the h area and i area in FIG. It is possible to reduce the color shift between the h area and the l area due to fluctuations. EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a video signal processing device according to an embodiment of the present invention. In Fig. 1, numerals 1 and 2 are the same clamp circuit and A/D conversion circuit as in the conventional example. 3 takes in the reference DC level of n bits and y bits output from the A/D conversion circuit 2 at the timing of the clamp level setting pulse, and converts it to several H.
This is a reference DC level averaging circuit that calculates in minute or field units and outputs the average value of the reference DC level. 4
is the n-bit reference DC from the reference DC level averaging circuit 3.
This is the first register circuit that takes in level data at the timing of the clamp level setting pulse. 5 is an n-bit real-time reference DC output from the A/D conversion circuit 2.
The second step is to capture the level at the clamp level setting timing.
It is a register circuit. 6 receives the reference DC level average value n bits from the first register circuit 4 and the real time reference DC level n bits from the second register circuit 5;
The corresponding bits are compared, and when the least significant bit (LSB) rises, the selector terminal is controlled so that only the output from the second register circuit 4 can be accepted as an input to the selector circuit 7 at the next stage. This is a comparison calculation circuit. When this ratio calculation circuit 6 detects that the outputs from the first register 4 and the second register circuit 5 are the same, only the output from the second register circuit 5 is sent to the selector circuit 7.
be accepted by In this way, the selector circuit 7 is controlled by the output signal from the comparison calculation circuit 6, and the first
Select either the output from the register circuit 4 or the output from the second register circuit 5. Reference numeral 8 denotes a reference DC level setting circuit that sets the n-bit reference DC level data from the selector circuit 7 in the processing in the i area of FIG. In Figure 1, a is a data acquisition pulse, b is a data reset pulse, C is averaged DC level data, d is DC data from the A/D conversion circuit, and e is selector circuit control depending on the data comparison result. Pulse, f is stabilized DC level data. In such a configuration, even if the reference DC level set in the A/D conversion circuit 2 fluctuates due to power supply voltage fluctuations, the average value output of the reference DC level averaging circuit 3 remains at the reference DC level. The third
In the figure, the difference j in the DC level between the ha area of the main screen A and the l area of the child screen is relatively small, and the stable reference DC
level is obtained, the color shift between the h area and the 1 area is reduced,
When performing digital signal processing, it is possible to always obtain images without color shift even if the clamp level fluctuates. Effects of the Invention As described above, according to the present invention, the conventional crank circuit A
By adding extremely simple circuits to the /D conversion circuit and the reference DC level setting circuit, the reference DC level during digital signal processing can always be kept stable, and there is always no color shift even if the clamp level fluctuates. You can get images.

[Brief explanation of drawings]

Figure 1 is a block diagram of a video signal processing device according to an embodiment of the present invention, Figure 2 (aHb) is a block diagram of a conventional clamp level setting device, and Figures 3 (a) and (b) are digital signal processing. FIG. 2 is a plan view and a cross-sectional view of horizontal meat k for explaining color shift when performing this process.

Claims (1)

[Claims] 1. An A/D conversion circuit into which the output of a clamp circuit that performs DC reproduction of a video input signal is input, and a reference DC level averaging circuit which takes in the output of this A/D conversion circuit at the timing of a clamp level setting pulse. a first register circuit that takes in the output of the reference DC level averaging circuit at the timing of the clamp level setting pulse; a second register circuit that takes in the output of the A/D conversion circuit at the timing of the clamp level setting pulse; A comparison calculation circuit that takes the outputs of the first and second register circuits as input and compares data; and a comparison calculation circuit that takes the outputs of the first and second register circuits as input and selects one of the outputs based on the output result of the comparison calculation circuit. 1. A video signal processing device, comprising: a selector circuit that can be used, and a circuit that uses an output of the selector circuit as an input to set a clamp level.