JPH03215943A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To make it possible to obtain trench isolation grooves having good interelement isolation characteristics by a method wherein intrinsic gettering layers are formed on places, where are situated sufficiently deeper than the lower parts of trench grooves, in a semiconductor substrate. CONSTITUTION:A second conductivity type buried layer 2 is provided in a first conductivity type semiconductor substrate 1 and a second conductivity type epitaxially grown layer 3 is formed thereon. After trench grooves 4 to reach the substrate 1 are formed by etching, an impurity, such as phosphorus or the like, is ion-implanted in parts, which correspond to the bottoms of the grooves 4, in the substrate for forming intrinsic gettering layers. At that time, even after all heat treatments in the latter process are performed, the impurity is ion-implanted at a high energy so that the intrinsic gettering layers 7 are formed on places sufficiently deeper than the interfaces between the bottoms of the grooves 4 and the substrate. Then, first conductivity type buried layers 5 which are used as isolation channel cut layers are formed and moreover, an embedding material is buried in the grooves 4. Thereby, trench isolation grooves having good interelement isolation characteristics are obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device equipped with one-wrench isolation having good element isolation characteristics.

[Conventional technology]

Generally, in a semiconductor integrated circuit device equipped with trench isolation, a one-trench groove is formed as shown in FIG.

First, a second conductive type buried layer 2 is formed on a first conductive type semiconductor substrate 1.
A second conductivity type epitaxial growth layer 3 is further formed on the second conductivity type buried layer 2.

After that, a trench trench 4 is formed at a desired position, and a buried layer 5 of the first conductivity type is formed to become an element isolation channel cathode layer.
form.

Thereafter, a filling material (such as an oxide film) is further filled in the trench groove 4, and elements such as transistors are then formed using well-known techniques.

[Problem to be solved by the invention]

A semiconductor integrated circuit device equipped with a conventional trench isolation groove is configured as described above, but after forming the trench isolation groove,
If heat treatment is applied when forming the element, defects 6 are likely to occur at the bottom of the trench groove 4, as shown in FIG.

This defect 6 caused poor isolation between elements (leakage, etc.).

This invention was made in order to solve the above-mentioned problems, and it is possible to remove defects that occur at the bottom of trench grooves and cause poor isolation between elements, and to create a trench isolation that has good isolation characteristics between elements. An object of the present invention is to obtain a semiconductor integrated circuit device provided with a groove.

[Means to solve the problem]

A semiconductor integrated circuit device with trench isolation according to the present invention has an intrinsic trench isolation layer formed in a semiconductor substrate at a location sufficiently deeper than the bottom of an I-trench isolation trench.

Further, in the semiconductor integrated circuit device with trench isolation according to the present invention, intrinsic gettering layers are formed independently in a sufficiently deep substrate below the bottom of each trench isolation groove.

[Effect]

In the semiconductor integrated circuit device with trench isolation according to the present invention, in the substrate sufficiently deep from the bottom of the trench isolation groove,
Alternatively, since an in-1 gettering layer is formed independently in the substrate sufficiently deep than the bottom of each trench isolation groove, defects that occur in the subsequent process are absorbed by this intrinsic gettering layer and the bottom of the trench groove is absorbed. This prevents defects from occurring at locations other than the intrinsic layer, such as at the interface between the trench and the substrate.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a semiconductor integrated circuit device according to a first embodiment of the present invention. 2 is a buried layer of conductivity type, 3 is an epitaxial growth layer of second conductivity type formed on this buried N2 of second conductivity type, 4 is a 1-wrench groove, 5 is a buried layer of first conductivity type, and 7 is a buried layer of first conductivity type. This is the intrinsinokuge sotaring layer.

To explain the manufacturing method, first, a second conductivity type buried layer 2 is provided on the first conductivity type semiconductor substrate '+Fil, and then a second conductivity type epitaxial growth layer 3 is formed thereon.

Then, a trench groove 4 reaching the substrate 1 is formed by etching.
After forming, impurities such as phosphorus are ion-implanted into the substrate corresponding to the bottom of the trench groove 4 to form an intrinsic gettering layer.

At this time, impurity ions are implanted with high energy so that the intrinsic gesottering layer 7 is formed sufficiently deeper than the interface between the trench bottom and the semiconductor substrate even after all post-process heat treatments are performed. For example, when ion-implanting phosphorus, when implanting with an energy of IMeV, the implantation peak (Rp) will be at a depth of 1.12 μm from the bottom of the trench.
The injection standard deviation (delta Rp) is also 0.18μ.
m, the phosphorus injection layer can be formed sufficiently deep at the bottom of the trench. This ion-implanted layer becomes an intrinsic gesotering layer 7 after being subjected to a heat treatment in a post-process.

Next, a buried layer 5 of the first conductivity type to serve as a separation channel cut layer is formed, and a buried material (such as an oxide film) is buried in the trench 4. Thereafter, elements such as transistors are formed using well-known techniques, and a desired process is carried out. end.

The intrinsic gettering layer 7 formed in this embodiment serves to absorb defects that occur when a heat treatment is applied to form a device after forming the trench isolation groove.

Since the intrinsic gettering layer 7 is formed sufficiently deeper than the interface between the trench bottom and the semiconductor substrate,
Defects absorbed into the intrinsic gettering layer do not cause poor isolation between devices.

Note that in the above embodiment, the first
Although the intrinsic gettering layer 7 is formed before the formation of the conductivity type buried layer 5, the intrinsic gettering layer 7 may be formed after the formation of the first conductivity type buried layer 5.

Further, FIG. 2 is a diagram showing a semiconductor integrated circuit device according to a second embodiment of the present invention, and will be explained below using the diagram.

In the figure, the same reference numerals as in FIG. 1 indicate the same parts.

First, impurities such as phosphorus are ion-implanted into the entire surface of the first conductivity type semiconductor substrate 1, and the intrinsic gettering layer 7 is formed at a position sufficiently deeper in the substrate than the trenches 4 to be formed later. At this time, impurities are ion-implanted with high energy so that an intrinsic gettering layer is formed sufficiently deep than the interface between the trench bottom and the semiconductor substrate even after all post-process heat treatments are performed. This ion implantation layer becomes an intrinsic gettering layer 7 after being subjected to a heat treatment in a post-process.

Next, a second conductivity type buried layer 2 is formed, a second conductivity type epitaxial growth layer 3 is formed, and then a trench groove 4 is formed in the element isolation region, and then an isolation channel layer and a layer are formed. A buried layer 5 of the first conductivity type is formed.

Furthermore, a filling material (such as an oxide film) is filled in the trench groove 4, and then elements such as transistors are formed using well-known techniques, and the desired process is completed.

Similar to the embodiment described above, the thus formed layer 7 has a function of absorbing defects that occur when heat treatment is applied to form a device after forming the trench isolation groove. In addition, the intrinsic gettering layer 7 is formed sufficiently deeper than the interface between the trench bottom and the semiconductor substrate.
Defects absorbed in the wafer do not cause poor isolation between elements.

〔Effect of the invention〕

As described above, according to the present invention, an intrinsic gettering layer is formed in the semiconductor substrate at the bottom of the trench groove or deep within the substrate corresponding to the bottom of each trench groove, thereby eliminating defects that cause poor isolation between elements. It can be confined away from the interface between the trench groove and the semiconductor substrate,
There is an effect that a semiconductor integrated circuit device having trench isolation with good isolation characteristics between elements can be obtained.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a semiconductor integrated circuit device according to a first embodiment of the present invention before trench filling, and FIG. 2 is a cross-sectional view of a semiconductor integrated circuit device according to a second embodiment of the present invention before trench trench filling. FIG. 3 is a cross-sectional view of a conventional semiconductor integrated circuit having trenches before the trenches are filled. DESCRIPTION OF SYMBOLS 1... First conductivity type semiconductor substrate, 2... Second conductivity type buried layer, 3... Second conductivity type epitaxial growth layer, 4...
... Trench groove, 5... First conductivity type buried layer, 7...
Intrinsic gettering layer. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (2)

[Claims] (1) A semiconductor integrated circuit device characterized in that an intrinsic gettering layer is provided in the substrate below a trench isolation groove formed on a semiconductor substrate of a first conductivity type. (2) A semiconductor integrated circuit characterized in that an independent intrinsic gettering layer is provided for each of the trench isolation grooves in the substrate at the bottom of the trench isolation groove formed on the semiconductor substrate of the first conductivity type. Device.