JPH03215978A - Bidirectional diode-thyristor - Google Patents
Bidirectional diode-thyristorInfo
- Publication number
- JPH03215978A JPH03215978A JP1068390A JP1068390A JPH03215978A JP H03215978 A JPH03215978 A JP H03215978A JP 1068390 A JP1068390 A JP 1068390A JP 1068390 A JP1068390 A JP 1068390A JP H03215978 A JPH03215978 A JP H03215978A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- exposed
- thyristor
- substrate
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000002457 bidirectional effect Effects 0.000 title claims description 8
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000004065 semiconductor Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 abstract description 6
- JCALBVZBIRXHMQ-UHFFFAOYSA-N [[hydroxy-(phosphonoamino)phosphoryl]amino]phosphonic acid Chemical compound OP(O)(=O)NP(O)(=O)NP(O)(O)=O JCALBVZBIRXHMQ-UHFFFAOYSA-N 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 3
- VMXJCRHCUWKQCB-UHFFFAOYSA-N NPNP Chemical compound NPNP VMXJCRHCUWKQCB-UHFFFAOYSA-N 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 6
- 230000003321 amplification Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000003199 nucleic acid amplification method Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Landscapes
- Thyristors (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は遮断性能にずくれ、しかも製造容易な両方向性
2端子サイリスタに関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a bidirectional two-terminal thyristor that has excellent interrupting performance and is easy to manufacture.
(従来技術と解決すべき問題点)
第1図の(a)(b)に示す平面図(金属電極M +
, M 2絶縁膜Iの図示を省略)および断面図のよう
なPNPNP (NPNPN)構造をもつ方向性2端子
サイリスタは、小型安価であって使用が簡単である等の
理由から、雷サージなどのサージ防護素子として広く使
用されている。例えば第2図(a)のように被保護電子
回路Aの入力回路L+,Lz間に2端子サイリスタZを
接続し、第2図(b)のようにその耐圧VBOを越える
雷サージ電圧が侵入したとき直ちにオンするようにして
、雷サージを被保護電子機器Aから側路として保護する
ことが行われている。ところでこの場合雷サージの通過
後両方向性2端子サイリスタZは、第2図(b)の回路
電圧E。(Prior art and problems to be solved) Plan views shown in FIGS. 1(a) and (b) (metal electrode M +
, M 2 insulating film I (not shown) and PNPNP (NPNPN) structure as shown in the cross-sectional view are small, inexpensive, and easy to use, so they are highly effective against lightning surges, etc. Widely used as a surge protection device. For example, as shown in Figure 2 (a), a two-terminal thyristor Z is connected between the input circuits L+ and Lz of protected electronic circuit A, and as shown in Figure 2 (b), lightning surge voltage exceeding its withstand voltage VBO enters. In this method, the lightning surge is turned on immediately when a lightning surge occurs, thereby protecting the protected electronic device A from the lightning surge as a bypass. In this case, after the lightning surge has passed, the bidirectional two-terminal thyristor Z has a circuit voltage E as shown in FIG. 2(b).
を遮断してサージ侵入前の状態に戻ることが必要である
。このためには回路インピーダンスを第2図(a)のよ
うにRとしたとき、第2図(b)における2端子サイリ
スタZの保持電流Il+が
E0
?■ 〉
R
?満足しなげればならない。It is necessary to shut off the surge and return to the state before the surge. For this purpose, when the circuit impedance is R as shown in FIG. 2(a), the holding current Il+ of the two-terminal thyristor Z in FIG. 2(b) is E0? ■〉R? I have to be satisfied.
ところで前記第1図に示す通常のサイリスタ構造におい
ては、周知のように保持電流IllばPN,,P,N2
,P2等の各層の不純物濃度,層厚キャリアライフタイ
ム等によって定まるが、通常上記の条件を満足させるよ
うに所要の範囲に入れるためには、製造工程上の精密な
制御が要求され、しかも原材料のばらつき等もあるので
その達成は容易ではない。By the way, in the normal thyristor structure shown in FIG.
, P2, etc., the impurity concentration of each layer, layer thickness, carrier lifetime, etc., but usually precise control of the manufacturing process is required to satisfy the above conditions and keep it within the required range. It is not easy to achieve this goal since there are variations in the results.
(発明の目的)
本発明は新規な面(電極)構造による、新しい保持電流
IHの制御手段を提供して製造の容易化を図ると共に、
大きな保持電流■■値を得ることができるようにして遮
断特性の向上を図ったものである。(Objective of the Invention) The present invention provides a new holding current IH control means using a novel surface (electrode) structure to facilitate manufacturing.
This is intended to improve the interrupting characteristics by making it possible to obtain a large holding current value.
(問題点を解決するだめの本発明の手段)第3図(a)
(b) (C)(d)および(e)は本発明ノ−実施
例を示す平面図(図では上面の絶縁層■,金属電極Mを
除去している)、そのA−A’ 部断面図、AA゛部断
面図の要部拡大図、上記平面図におげるB−B’部断面
図、および等価回路であって、本発明の特徴とするとこ
ろは次の点にある。(Means of the present invention to solve the problem) Figure 3 (a)
(b) (C) (d) and (e) are plan views showing embodiments of the present invention (in the figure, the upper insulating layer and metal electrode M are removed), and a cross section taken along line A-A'. The present invention is characterized by the following points.
即ちP型基板を共通基板として第3図(b)のようにそ
の一面にはN,層(ヘース)層を設け他面にN2層(ヘ
ース)を設ける。また上記N1層とN2層中にはN,層
とN2層が−・面と他面の表面に露出すると共に、第3
図(a)と(b)のように−面の露出領域が他面の露出
領域と一部が重なって碁盤目状に複数個(第3図(a)
において実線の四角はN1の露出領域、点線四角ばN2
の領域を示す)交互に配置されるように四角形のP,層
(エミッタ)とP2層(エミッタ)を設けて2端子ザイ
リスタTT 2 , T 3 ”’−’−を形成ずる。That is, a P-type substrate is used as a common substrate, and as shown in FIG. 3(b), an N2 layer (Heath) is provided on one surface and an N2 layer (Heath) is provided on the other surface. Further, in the N1 layer and the N2 layer, the N layer and the N2 layer are exposed on the - surface and the other surface, and the third
As shown in Figures (a) and (b), the exposed areas on the - side partially overlap with the exposed areas on the other side, forming a plurality of exposed areas in a checkerboard pattern (Figure 3 (a)).
, the solid line square is the exposed area of N1, and the dotted line square is the exposed area of N2.
2-terminal zyristors TT 2 and T 3 '''-'- are formed by providing rectangular P layers (emitters) and P2 layers (emitters) so as to be alternately arranged (representing the region of 1).
そして両面においてそれぞれ上記P,層と露出したNl
層およびP2層と露出したN2を、金属電極M,,M2
により短絡して、それぞれ一つの電極を構成するように
して、N,とN2の露出領域においては、NPNP層の
4層構造、他の部分においてPNPNPの5層構造を有
する素子としたことを特徴とするものである。And on both sides, the above P layer and exposed Nl layer, respectively.
layer and P2 layer and exposed N2 are connected to metal electrodes M,,M2
are short-circuited to form one electrode, respectively, so that the exposed regions of N and N2 have a four-layer structure of NPNP layers, and the other parts have a five-layer structure of PNPNP layers. That is.
このようにすれば第3図(C)に示す2端子サイリスタ
T,,T2部分を拡大した図のように、その構造は第1
図に示した通常の両方向性2端子サイリスタと同じであ
るから同じ動作を行い、例えば第3図(C)中に示す実
線矢印Iの方向に電圧が印加された場合には、2端子サ
イリスタT2が先ずターンオンする。In this way, as shown in the enlarged view of the two-terminal thyristor T, T2 shown in FIG.
Since it is the same as the normal bidirectional two-terminal thyristor shown in the figure, it operates in the same way. For example, when a voltage is applied in the direction of the solid arrow I shown in FIG. 3(C), the two-terminal thyristor T2 turns on first.
即ちこの構造においては相隣る2端子・り゛イリスタ同
士で通常の両方向性2端子サイリスタを形成し、この関
係は例えば2端子ザイリスタT 2 , T 3の組合
わせにおいても全く同じである。しかも各2端子サイリ
スタは両面においてそれぞれ金属電極M + , M
2によって短絡されているため、電圧が印加されたとき
各2端子サイリスタの内の最もターンオンし易いものが
最初にターンオンし、これによって相隣る他の2端子ザ
イリスタのN2,P層にそれぞれゲー1・電流が流出入
するため、これもターンオンして以後順次ターンオン領
域は素子の全面に拡がることになる。例えば第3図(a
)に示す単方向2端子サイリスタT.,T.を含む断面
図において、2端子サイリスタT2が最初にターンオン
した場合を考えると、第3図(e)の等価回路図のよう
に単方向2端子ザイリスタT3のN2層とP層に、横方
向抵抗を介してゲート電流■9が流出入するので単方向
2端子サイリスタT3もターンオンする。That is, in this structure, adjacent two-terminal thyristors form a normal bidirectional two-terminal thyristor, and this relationship is exactly the same for the combination of two-terminal thyristors T 2 and T 3, for example. Moreover, each two-terminal thyristor has metal electrodes M + and M on both sides, respectively.
2, so when a voltage is applied, the one that is easiest to turn on among the two-terminal thyristors turns on first, and this causes a gate to be applied to the N2 and P layers of the other two-terminal thyristors adjacent to each other. 1. Since current flows in and out, this also turns on, and thereafter the turn-on region gradually spreads over the entire surface of the element. For example, in Figure 3 (a
) The unidirectional two-terminal thyristor T. ,T. In the cross-sectional view including 2-terminal thyristor T2, if we consider the case where it is turned on first, a lateral resistance is added to the N2 layer and P layer of unidirectional 2-terminal thyristor T3 as shown in the equivalent circuit diagram of FIG. 3(e). Since the gate current 9 flows in and out through , the unidirectional two-terminal thyristor T3 is also turned on.
以上のことは第3図(a)の平面図のどの部分において
も成立するから、前記したように一部分がターンオンす
ればターンオン領域は全面に拡がることになる。また第
3図(C)中の点線矢印Iのように逆な電圧が印加され
た場合には単方向2端子ザイリスタT2が先ずターンし
、次にT1が動作する全く同じ動作を行う。Since the above is true in any part of the plan view of FIG. 3(a), if a part is turned on as described above, the turn-on region will spread over the entire surface. Further, when a reverse voltage is applied as indicated by the dotted arrow I in FIG. 3(C), the unidirectional two-terminal Zyrister T2 turns first, and then T1 operates, which is exactly the same operation.
従って本発明の構造は両方向性2端子ザイリスタとして
動作することは明らかであり、本発明の構造とすること
によって、本発明の目的とする遮断特性に大きく関係す
る保持電流の制御を容易に行いうる。Therefore, it is clear that the structure of the present invention operates as a bidirectional two-terminal Zyristor, and by using the structure of the present invention, it is possible to easily control the holding current, which is greatly related to the interrupting characteristics targeted by the present invention. .
次に本発明の構造が保持電流の制御に有用であることを
、第4図(a)に示す本発明素子の部分簡略図および導
通状態におりる電子と正孔の釣合いを示す図によって説
明する。Next, the usefulness of the structure of the present invention for controlling the holding current will be explained using a partially simplified diagram of the device of the present invention shown in FIG. 4(a) and a diagram showing the balance between electrons and holes in a conductive state. do.
第4図(a)においてLをP,,N,層の短絡部分の長
さ、!を短絡部分が影響する実効距離とする。In Fig. 4(a), L is P,,N, the length of the shorted part of the layer, ! Let be the effective distance affected by the shorted part.
また第4図(b)においてIを単方向2端子サイリスタ
を流れている全電流、Itを短絡部分に流れている電流
、Icoを漏洩電流、α8,α2を構成1一ランジスタ
N,,P,N2およびP 2+ N Z+ P層の電流
増幅率とする。In addition, in Fig. 4(b), I is the total current flowing through the unidirectional two-terminal thyristor, It is the current flowing in the short circuit, Ico is the leakage current, α8, α2 are the transistors N,, P, Let N2 and P 2+ N Z+ be the current amplification factors of the P layer.
そこでN2層における電子電流(第4図(b)図中の実
線)と正孔電流(第4図(1))図中の点線)の釣合い
を考えると、本発明の構造では
(1−αP)(I lx)一αJ−T Z +
I coとなり、これを整理すると、
I(1−(α,(1−一)十α.))一r,。Therefore, considering the balance between the electron current (solid line in Figure 4(b)) and hole current (dotted line in Figure 4(1)) in the N2 layer, the structure of the present invention (1-αP )(I lx)-αJ−T Z +
I co, and rearranging this, I(1-(α, (1-1) ten α.))-r,.
■
(1)
となる。一方短絡部分のない2端子ザイリスクの場合に
は
I(1−(α,]−α−) ) = T CO ’−
”’−’−’ (2)で与えられる。また電流増幅率の
α,,α1,ば電流Iに依存し、電流の低下によって低
下することか公知であり、しかもα,+αN=1を維持
できない電流がI.であることも公知である。■ (1). On the other hand, in the case of a two-terminal Xyrisk with no short circuit, I(1-(α,]-α-)) = T CO '-
``'-'-'' (2) It is also known that the current amplification factor α, , α1, depends on the current I and decreases as the current decreases, and furthermore, α, + αN = 1 is maintained. It is also known that the current that cannot be used is I.
従って以上を考慮して(1)(2)式を比較すれば判る
ように、本発明の場合には短絡部分のない2端子ザイリ
スタに比べて、電流増幅器率αPが1!
(1−−、)だけ低下、即ちI t / Iの関数とし
■
て電流増幅率α,が低下することが判る。Therefore, as can be seen by comparing equations (1) and (2) in consideration of the above, in the case of the present invention, the current amplifier ratio αP is 1! It can be seen that the current amplification factor α, decreases by (1--,), that is, as a function of It/I.
以上からI t / Iの関数として電流増幅率α,が
低下し、保持電流IHが増大ずることが明らかであるが
、全電流Iは例えば第1図(a)のN,層が表面に露出
する部分の面積の和に比例し、短絡部分に流れる電流I
!は、短絡部分の境界の長さしと短絡部分からの有効距
離!(例えば第4図(a)のN2層の横方向抵抗等に関
係する)との積で定まる。From the above, it is clear that the current amplification factor α, decreases as a function of I t /I, and the holding current IH increases. The current I flowing through the short circuit is proportional to the sum of the areas of the short circuit parts.
! is the length of the boundary of the shorted part and the effective distance from the shorted part! (Related to, for example, the lateral resistance of the N2 layer in FIG. 4(a)).
従って各層の不純物分布,厚め等が定まれば保持電流I
IIの増加分はLに比例することになる。Therefore, once the impurity distribution and thickness of each layer are determined, the holding current I
The increase in II will be proportional to L.
以上のことは本発明が有効面積従って電流容量を同一と
しながら、短絡部分の有効長L例えば第3図におけN,
層の露出領域の総和を大にして、保持電流Il+を制御
するのに有効な構造と云え、これから従来のように精密
なプロセス技術などを要求されることはな<I,,を大
として遮断性能のよいサージ防護素子を提供できる。The above means that the present invention can maintain the same effective area and current capacity while maintaining the effective length L of the short-circuited portion, for example, N in FIG.
It can be said that this structure is effective for controlling the holding current Il+ by increasing the total exposed area of the layers, and from now on, precise process technology will no longer be required as in the past. A surge protection element with good performance can be provided.
これに加えて第3図に示したように本発明の構造では、
第1図に示した通常の構造のものに比較して、或る一方
向の導通の場合に導通領域が分散される。このことは本
発明の場合導通時の電力損失の分散となるので、電流容
量の増大を得る利点を生む。In addition to this, in the structure of the present invention as shown in FIG.
Compared to the conventional structure shown in FIG. 1, the conduction areas are dispersed in the case of conduction in one direction. In the case of the present invention, this results in dispersion of power loss during conduction, resulting in an advantage of increasing current capacity.
以上本発明を一実施例によって説明したが、例えば第5
図に示す本発明の他の実施例平面図(絶9
縁膜■、金属電極M,,M2などの図示を省略)および
そのA−A’ 部におりる断面図のように、本発明の要
旨を逸脱しない範囲内において、露出部分の形状,数な
どを変えることができ、また導電型を以」二と逆にする
ことができる。The present invention has been explained above using one embodiment, but for example, the fifth embodiment
As shown in the plan view of another embodiment of the present invention shown in the figure (illustration of the insulating film 1, metal electrodes M, M2, etc. is omitted) and the cross-sectional view taken along the line A-A', the present invention is The shape, number, etc. of the exposed portions may be changed, and the conductivity type may be reversed, without departing from the scope of the invention.
また以上では一面の露出ベース領域が他面のベース領域
とが一部において重なり合うようにしたが、重なり部分
をもたないようにしてもよい。Further, in the above description, the exposed base region on one side partially overlaps with the base region on the other side, but the exposed base region on one side may overlap with the base area on the other side.
また実際の素子においては信軌性確保などのために通常
用いられている構造を適用できることは云うまでもない
。In addition, it goes without saying that a structure commonly used for ensuring reliability can be applied to an actual element.
(発明の効果)
以上の説明から明らかなように本発明によれば、雷サー
ジなどのザージ防護素子として好適する遮断特性のよい
素子を容易に製造できる。(Effects of the Invention) As is clear from the above description, according to the present invention, it is possible to easily manufacture an element with good interrupting characteristics suitable as a surge protection element against lightning surges and the like.
第1図(a)(b)は従来素子の平面図および断面図、
第2図(a) (b)はサージ防護の一例を示す回路図
およびサージ防護素子の電圧電流特性例図、第3図(a
)■
0
(b)(C) (d) (e)は本発明の一実施例を示
す平面図、そのA−A’部断面図、その要部拡大断面図
、平面図、B−B’ 部断面図および等価回路図、第4
図(a) (b)は本発明素子の動作説明のための斜視
図およびその要部断面図、第5図(a)(b)は本発明
の他の実施例を示す平面図およびそのA−A’部断面図
である。FIGS. 1(a) and 1(b) are a plan view and a cross-sectional view of a conventional element,
Figures 2(a) and 2(b) are a circuit diagram showing an example of surge protection, an example diagram of the voltage-current characteristics of a surge protection element, and Figure 3(a).
) ■ 0 (b) (C) (d) (e) is a plan view showing one embodiment of the present invention, a sectional view taken along line A-A', an enlarged cross-sectional view of essential parts, plan view, and B-B' Partial sectional view and equivalent circuit diagram, 4th
Figures (a) and (b) are perspective views and sectional views of essential parts for explaining the operation of the device of the present invention, and Figures 5 (a) and 5 (b) are plan views showing other embodiments of the present invention and their A -A' section sectional view.
Claims (2)
それぞれN(P)ベースとP(N)エミッタを設けると
共に、前記N(P)ベースの一部が複数箇所において前
記P(N)エミッタを突き抜けて表面にそれぞれ露出し
、かつその一面の露出領域が他面の露出領域と一部が重
なるように交互に配置し、各面においてそれぞれ前記エ
ミッタと露出ベース領域が短絡されて一つの電極を構成
するようにしたことを特徴とする両方向性2端子サイリ
スタ。(1) A P(N) type semiconductor is used as a common substrate, an N(P) base and a P(N) emitter are provided on both sides of the common substrate, and a part of the N(P) base is located at multiple locations in the P(N) ) The emitters are penetrated through the emitter and exposed on the surface, and are arranged alternately so that the exposed region on one side partially overlaps the exposed region on the other surface, and the emitter and the exposed base region are short-circuited and unified on each surface. A bidirectional two-terminal thyristor comprising two electrodes.
重なる部分をもたないことを特徴とする特許請求の範囲
第1項記載の両方向性2端子サイリスタ。(2) The bidirectional two-terminal thyristor according to claim 1, characterized in that the exposed base region on one side does not overlap with the exposed base region on the other side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010683A JP2724898B2 (en) | 1990-01-22 | 1990-01-22 | Bidirectional 2-terminal thyristor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010683A JP2724898B2 (en) | 1990-01-22 | 1990-01-22 | Bidirectional 2-terminal thyristor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03215978A true JPH03215978A (en) | 1991-09-20 |
| JP2724898B2 JP2724898B2 (en) | 1998-03-09 |
Family
ID=11757063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010683A Expired - Fee Related JP2724898B2 (en) | 1990-01-22 | 1990-01-22 | Bidirectional 2-terminal thyristor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2724898B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002368209A (en) * | 2001-06-04 | 2002-12-20 | Shindengen Electric Mfg Co Ltd | Bidirectional two-terminal thyristor |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54109386A (en) * | 1978-02-15 | 1979-08-27 | Nec Home Electronics Ltd | Manufacture for silicon symmetrical switch |
| JPS5562768A (en) * | 1978-11-06 | 1980-05-12 | Hitachi Ltd | Semiconductor device |
| JPS5678362U (en) * | 1979-11-14 | 1981-06-25 | ||
| JPH01171273A (en) * | 1987-12-25 | 1989-07-06 | Fuji Electric Co Ltd | Bidirectional semiconductor switching element |
-
1990
- 1990-01-22 JP JP2010683A patent/JP2724898B2/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54109386A (en) * | 1978-02-15 | 1979-08-27 | Nec Home Electronics Ltd | Manufacture for silicon symmetrical switch |
| JPS5562768A (en) * | 1978-11-06 | 1980-05-12 | Hitachi Ltd | Semiconductor device |
| JPS5678362U (en) * | 1979-11-14 | 1981-06-25 | ||
| JPH01171273A (en) * | 1987-12-25 | 1989-07-06 | Fuji Electric Co Ltd | Bidirectional semiconductor switching element |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002368209A (en) * | 2001-06-04 | 2002-12-20 | Shindengen Electric Mfg Co Ltd | Bidirectional two-terminal thyristor |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2724898B2 (en) | 1998-03-09 |
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