JPH03218675A - Compound semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a compound semiconductor device, particularly an n-type Al x
Regarding the formation of contacts to Ga1-xAs.

(Prior art) Gallium arsenide (GaAs) has advantages such as having a mobility approximately six times that of silicon (St) and being able to easily obtain a semi-insulating substrate. Therefore, it is seen as a promising material for high-speed devices.

And aluminum gallium arsenide (Al x Ga+- x
As) has a lattice constant very close to that of GaAs ( , GaA
Since it is possible to perform good epitaxial growth with s, we used the heterojunction between them.
1xGa+-XAs/GaAs-based heterojunction devices are being actively developed.

For example, Al x Ga+- x As/ using At x Ga+- x As as a wide gap emitter.
GaAs heterojunction bipolar transistor (HB
Many de-Hys devices are being developed, such as T) and high electron mobility transistors (HEMT) using Al x Ga + - x As as an electron supply layer.

Reducing ohmic contact plays an extremely important role in improving the performance of these devices.

Generally, ^l X Ga+- xAs layer (0x≦1)
Since it is difficult to form a low-resistance ohmic contact on the top, even if the device has At is used.

Various ideas have been made regarding the composition of the electrode metal material, the heat treatment temperature for alloying, and the like.

However, GaAs and Al x Ga+-
Since s has a larger band gap than Si and also has a lower upper limit of the electron concentration that can be obtained, there is a limit to the reduction in contact resistance.

Therefore, recently, In>(Ga), which has a smaller bandgap,
A method using +-x As as a contact layer has been proposed (J. Vac. Sc t. Techno 1.
, 19 (3) 1981 PP626-627).

As an example, when forming a contact to an n-type GaAs layer, an n+ type 1nx Ga+-
From an n-type GaAs layer with an InAs layer interposed,
The ideal energy band diagram leading to the metal electrode through the n-type Inx Ga1-X As layer and the n+lnAs layer is
It is shown in FIG.

Here, in order to smoothly connect the bands of the GaAs layer and the lnAs layer, InX Gal-
A compositionally graded layer of As (X -0-1) is inserted. Since there is no Schottky barrier between the InAs layer and the electrode, a low resistance contact can be obtained.

By the way, there is a gap of about 7
There is a large lattice irregularity of 96.

Therefore, misfit dislocations occur in the InGaAs layer. If the thickness of this lnGaAs layer is less than the critical thickness, no dislocations will occur. However, in order to obtain a low-resistance ohmic contact, the closer the 1n mixed crystal ratio X is to 1, the better, and the closer X is to 1, the smaller the critical thickness.

This critical thickness is several tens of amps or less when X is 0.5. Furthermore, the closer X is to 1, the thicker the InxGa1-xAs compositionally graded layer is required to smoothly connect the bands. On the other hand, in consideration of device performance, process, etc., it is preferable that the contact layer be thinner. For these reasons, the occurrence of misfit dislocations is unavoidable in order to obtain a low resistance ohmic contact with a practical structure.

Such dislocations are particularly important in the intermediate layer Inx
There is a problem in that the Ga+- x As concentrates in the gradient composition layer and compensates for carriers in this region, leading to a decrease in carrier concentration.

By the way, although the upper limit of the carrier concentration that can be obtained normally depends on the epitaxial growth conditions, etc.,
As it about 2×1019CII1-31×
It is known that it is about 10l9C#l-3,
InAs/ [nx Ga+- x As/ GaAs
In the structure, a large dip in carrier concentration occurs particularly in the lnx Ga1-xAs intermediate layer. If the Inx Ga+-

However, when this structure is applied to a semiconductor device having an n-type ohmic contact, increasing the film thickness is not practical.

Figure 6 shows silicon-doped InAs/lnx Ga
The results of measuring the carrier concentration distribution in the 1-xAs/GaAs structure are shown. Here, lnx Ga1- x A
The film thickness of s is 500, InAs, lnx Ga+
- x For As, silicon is 1. 5 x 1
019cm-3 doped. As is clear from this figure, the carrier concentration in the InxGa+-xAs layer drops significantly, and regions where no carriers exist are also formed, especially near the interface with the GaAs layer. In such a state, the contact resistance when a current was passed in a direction perpendicular to the semiconductor layer was as high as 5×10 −6 ΩcIIt.

In this way, even if a low-resistance contact can be obtained at the InAs/electrode interface, there is a problem in that the resistance of the contact portion as a whole cannot be sufficiently reduced.

(Problem to be solved by the invention) In this way, by using the lnx Ga1-
When forming an ohmic contact to a type GaAs layer, the carrier concentration decreases due to compensation of carriers by misfit dislocations in the lnx Ga1- The problem was that it got too big.

The present invention has been made in view of the above-mentioned circumstances.
+- x When forming an ohmic contact to the n-type GaAs layer using the As layer, Inx Ga+- x
The purpose of this invention is to avoid the problem of formation of a high resistance layer due to a decrease in carrier concentration in an As composition gradient layer, and to realize an ohmic contact with extremely low resistance.

[Structure of the invention]

(Means for Solving the Problems) Therefore, in the present invention, an electrode metal layer is formed on the n-type Alx Ga+- x As layer via a 1nX Ga1- x As compositionally graded layer and an Inx Ga+- x As contact layer having a uniform composition. In forming lnx Ga+- x
The As composition gradient layer is doped with an n-type impurity of more than 1 degree of impurity activated as an n-type.

Preferably, the carrier concentration in the region in contact with the 1nxGa+-X As contact layer in the [nx Ga+-
The carrier concentration is configured to be higher than the carrier concentration in the region in contact with the As layer.

Further, desirably, the n-type impurity concentration of the region in contact with the Al x Ga+- x As layer in the 1nx'Ga+-
The n-type impurity concentration is configured to be higher than the n-type impurity concentration in the region in contact with the As contact layer.

(Function) The present inventors have developed silicon-doped lnAs/Inx Ga+- x As/GaA as shown in FIG.
As a result of various considerations and various experiments based on the measurement results of carrier concentration distribution during stJi formation, lnx
It has been discovered that by significantly increasing the amount of n-type impurity doped into the Ga1-xAs compositionally graded layer, only an extreme drop in the carrier concentration in this layer can be eliminated.

The present invention has been made with this in mind.

That is, according to the present invention, Inx Ga+- x A
By setting the amount of n-type impurity doped into the s-composition graded layer to be higher than the concentration of impurities activated as n-type, a contact with extremely low resistance can be obtained even when a current is passed in the vertical direction.

Moreover, at this time, the carrier concentration in the region in contact with the 1nx Ga+- x As contact layer in the lnx Ga+- x As compositionally graded layer is ^I x Ga1-
By configuring the carrier concentration to be higher than the region in contact with the X As layer, the contact resistance can be further reduced.

Furthermore, the n-type impurity concentration of the region in contact with the Al x Ga+- x As layer in the ++1X Ga+- x As compositionally graded layer is such that
By making the n-type impurity concentration higher than the n-type impurity concentration in the region in contact with the contact layer, it becomes possible to increase the carrier concentration in this layer and obtain a contact with further lower resistance.

From the experimental results, this impurity concentration is 3X1019cam
-3 or more is desirable.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

Embodiment 1 FIG. 1 is a sectional view showing a heterojunction bipolar transistor according to a first embodiment of the present invention using an AIGaAs/GaAs heterojunction.

This heterojunction bipolar transistor has a film thickness of 200 mm.
0 n-type Alo. a Gao. The contact to the emitter layer consisting of the 7^S layer 5 and the n-type^I type GaAs layer 7, a film thickness of 400A, n-type 1nx Ga+- x As composition gradient layer (x1011) 8, and a film thickness of 400A, n-type 1n
The impurity concentration of the n0-type 1nAs layer 9 and the n0-type 1nX Ga+-x As layer 8 is set to 3. 5. It is characterized in that it has a high concentration of x 1 0 19cn+-3, and an emitter electrode 13 made of a Cr/Au layer is formed thereon. Kondoki lnx
The impurity concentration of the Ga1- x As compositionally graded layer 8 is the second
As shown in figure (a), it is 3.5×1019CIll-3. Here, St was used as the n-type impurity and Be was used as the p-type impurity.

In other words, this heterojunction bibolar transistor is
An n+ type GaAs layer 2 with a thickness of 5000 Å is laminated on a semi-insulating GaAs substrate 1 and constitutes a collector contact layer, and an n1 type GaAs layer 2 with a thickness of 5000 Å is laminated in order on top of this layer and constitutes a low concentration collector layer. 3, a p+ GaAs layer 4 with a thickness of 10,008 cm constituting the base layer, and an n-type Ato. 3 Gao
．． 7As layer 5 and film thickness 300mm n-type Alx Ga+
-x As composition gradient layer (X -0.3 →0) 6 constitutes the element region, and the contact to the emitter layer is formed by the n+ type GaAs layer 7 and the n+ type InX Ga+
- x As composition gradient layer (x-0→1) 8 and n+ type I
It is composed of an nAs layer 9.

Then, an emitter electrode 10 is placed in contact with each layer.
, a base electrode 1fill, and a collector electrode 12 are formed.

Each semiconductor layer of this heterojunction bipolar transistor needs to be grown epitaxially on the substrate, and the epitaxial growth methods include molecular beam epitaxy (MBE) and gas source molecular beam epitaxy (GS).
MBE method) or metal organic chemical vapor deposition method (MOCVD
law) etc. are used. Here, the MBE method was used.

Here, in the n-type 1nx Ga + - x As composition gradient layer (x -0 → 1) 8, X is set to increase from bottom to top between 0 and 1. As a result, the conduction band between the n+ type GaAs layer 7 and the n+ type lnAs layer 9 can be smoothly connected.

The n+ type GaAs layer 7 and the n+ type 1nxGaAs layer 7 of this HBT
1-X As intermediate layer or compositionally graded layer (X-0→1
) 8 and the n0-type 1nAs layer 9. The results of measuring the carrier concentrations are shown in FIG. 2(b). As is clear from this figure, there is almost no drop in the carrier concentration in the n-type lnx Ga+-x As intermediate layer.

The emitter contact resistance of the HBT obtained in this way is 7X10-8Ωcd, which is different from that of the conventional HB.
It was extremely small compared to 5×10 6 ΩC of T.

As described above, since the HBT of the present invention can have an extremely low emitter resistance, the transconductance GII1 is improved compared to the conventional HBT, making it possible to operate in a higher current density region.

In addition, the cutoff frequency fT, which is one of the performance indicators of a transistor, is 90 GHz, which is significantly improved compared to the conventional 70 GHz.

In addition, in the same structure, n-type 1nx Ga+-
Table 1 shows the results of measuring the relationship between impurity concentration and contact resistivity of HBTs in which only the impurity concentration of the xAs intermediate layer 8 was changed.

Table 1 In this case, the upper limit of the n-type carrier concentration obtained is Oyoso 2
×10l9cII1-3, but as is clear from this table, when the impurity concentration of the n-type single-hole X Ga+- can be obtained.

Example 2 Next, as a second example of the present invention, a HBT with the same structure as the HBT of Example 1 shown in FIG.
An example in which the impurity concentration of the compositionally graded layer 8 is varied within the layer will be described.

That is, the HBT of Example 2 has lnxGa1-x
As shown in FIG. 3(a), the impurity concentration of the As compositionally graded layer 8 is InxGa1-
The type impurity concentration is made to gradually decrease from the GaAs layer 7 side to the 1nAs contact layer 9 side. That is, the n-type impurity concentration d1 in the region in contact with the GaAs layer 7 is higher than the n-type impurity concentration d2 in the region in contact with the 1 nAs contact layer 9.

At this time, the n-type impurity concentration d2 in the region in contact with the lnAs contact layer 9 is set to 3.5×1019 CIll-3,
The n-type impurity concentration di in the region in contact with the GaAs layer 7 is set to 5.
It was set as 0x10190II+-3.

The n+ type GaAs layer 7 of this HBT and the n+ type In>(G
a+- x As intermediate layer or compositionally graded layer (x-0-
1) What is the carrier concentration in 8 and n-type 1 nAs layer 9? The determined results are shown in Figure 3(b). As is clear from this figure, n-type In) (Ga+-
As the drop in carrier concentration in the intermediate layer almost disappears, the Inx Ga+-x As composition gradient layer
Carrier concentration D2 in the region in contact with the InAs contact layer
is higher than the carrier concentration D1 in the region in contact with the GaAs layer.

The emitter contact resistance of the HBT thus obtained was 5 x 10-8 ΩC-, which was the same as that of H in Example 1.
It is smaller than BT and even smaller than conventional HBT.
It was extremely small compared to 5×10 −6 ΩC.

In this way, in the HBT of Example 2, the emitter resistance can be made extremely low, so the transconductance Gi is further improved, and operation in a region with higher current density is possible.

Further, the cutoff frequency fr, which is one of the performance indexes of the transistor, is 100 GHz, which is further improved than the cutoff frequency f■ of the HBT of the first embodiment.

In addition, in a similar structure, n-type 1nxGa+- x
Table 2 shows the results of measuring the relationship between impurity concentration and contact resistivity for HBTs in which the slope of impurity concentration change in the As intermediate layer 8 is the same and only the impurity concentration level is changed.

Table 2 In this case, the upper limit of the n-type carrier concentration obtained is approximately 2
X1019C'3, but as is clear from this table, extremely low contact resistance can be obtained when the impurity concentration of the n0-type 1nx Ga+- .

Example 3 The HBT of Example 2 is Inx Ga+-
The impurity concentration of the xAs compositionally graded layer 8 was made to gradually decrease from the GaAs layer 7 side to the 1 nAs contact layer 9 side.
As shown in FIG.
The n-type impurity concentration may be increased in a region slightly closer to the InAs contact layer 9 than the region in contact with the GaAs layer 7, and then gradually lowered.

In this case, the n+ type GaAs layer 7 of the IBT and the n+ type I
nX Ga+- x As intermediate layer or compositionally graded layer (
The results of measuring the carrier concentration in x-0-+1) 8 and n-type InAs layer 9 are shown in FIG. 4(b). As is clear from this figure, n-type 1nx Ga+- x
There is no drop in the carrier concentration in the As intermediate layer at all, and the carrier concentration D2 in the region in contact with the InAs-7 contact layer in the Inx Ga+- It is higher than that. The contact resistance is even lower at 4×10 −8 ΩC.

Note that the impurity concentration and thickness of each semiconductor layer are not limited to the embodiments and can be changed as necessary.

In addition, the present invention can be implemented with various modifications without departing from the spirit thereof.

〔effect〕

As explained above, according to the present invention, n-type Al
x Gal-
Ga+- xAs composition gradient layer and lnx G with uniform composition
When forming the a+- x As contact layer and the electrode metal layer, the Inx Ga1- Ga
Even if the thickness of the 1-X As compositionally graded layer is kept sufficiently thin, there is no increase in resistance due to a decrease in the carrier concentration in this portion, making it possible to form a contact with low resistance.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing a heterojunction bipolar transistor according to the first embodiment of the present invention, and FIG. 2(a) shows the relationship between the n-type impurity concentration and depth of each layer of the emitter contact portion of the same transistor. 2(b) is a sectional view showing the relationship between carrier concentration and depth, and FIG. 3(a) is a sectional view showing the n-type impurity in each layer of the emitter contact portion of the same transistor according to the second embodiment of the present invention. FIG. 3(b) is a cross-sectional view showing the relationship between the carrier concentration and depth of the transistor, and FIG. 4(a) is a cross-sectional view showing the relationship between the carrier concentration and depth of the same transistor. A cross-sectional view showing the relationship between the n-type impurity concentration and depth of each layer of the emitter contact portion of a transistor, FIG. 4(b) is a cross-sectional view showing the relationship between the carrier concentration and depth of the transistor, and FIG. 5 is an n-type impurity concentration. GaAs/n type 1nx
Ideal energy band diagram of Ga+- x As/InAs electrode structure, Figure 6 shows conventional silicon-doped n-type G
aAs/n type 10! nx Ga+- x As/ lnA
FIG. 3 is a cross-sectional view showing the relationship between carrier concentration and depth of each layer in the s-electrode structure. 1...Semi-insulating GaAs substrate, 2-n 10 type GaAs layer, 3--n 1 type GaAs layer, 4-p+GaAs
layer, 5-n type ^lo, a Gao. y As layer, 6.=
n-type^1 x Ga+- x As composition gradient layer (x-0
．． 3 −+0), 7=・n+ type GaAs layer, 8−
n+ type Inx Ga+- x As composition gradient layer (x
-0-"1), 'L...n ten-type InAs layer, 10
... Emitter electrode, 11... Base electrode, 12...
・Collector electrode. Complete 1 Figure (0) (b) Figure 2 Figure 5 Distance 1 of 500 0 5C0100015! (A) Fig. 6 InAs contour 7, stomach 500 05001 αy: > + 5oo distance (8) (0) 3rd Intacon 97 eyebrow distance (person) (0.) 4th [nAs comfort 5i distance ( A) (b) Figure distance W fA) (b) Figure

Claims (3)

[Claims] (1) n-type Al_xGa_1_-_xAs layer (0≦x≦
1) and In_xGa_1_-_ whose composition gradually changes
xAs (0≦x≦1) composition gradient layer and uniform composition In_xGa_1_-_xAs (0<x≦
1) In a compound semiconductor device including a contact structure consisting of a contact layer and a metal electrode layer, the In_xGa_1_-_xAs compositionally graded layer is doped with an n-type impurity higher than an impurity concentration that is activated as an n-type. A compound semiconductor device characterized by (2) The carrier concentration in the region in contact with the In_xGa_1_-_xAs contact layer in the In_xGa_1_-_xAs compositionally graded layer is such that the Al_xGa_1_
-_x The compound semiconductor device according to claim 1, wherein the compound semiconductor device is configured to have a higher carrier concentration than the region in contact with the As layer. (3) The n-type impurity concentration of the region in contact with the Al_xGa_1_-_xAs layer in the In_xGa_1_-_xAs compositionally graded layer is such that the In_xGa_1_-_xA
3. The compound semiconductor device according to claim 1, wherein the compound semiconductor device is configured to have a higher n-type impurity concentration than a region in contact with the s-contact layer.