JPH03220810A - Piezoelectric single crystal wafer and its manufacture - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to piezoelectric single crystal wafers and their manufacturing capabilities;
In particular, the present invention relates to a piezoelectric single crystal wafer whose surface is roughened and a method for manufacturing the same.

[Prior Art] Lithium tantalate, lithium niobate, crystal, and the like are known as piezoelectric single crystals, and these are widely used as surface acoustic wave device substrates, for example.

For piezoelectric single-crystal wafers used as surface acoustic wave device substrates, the surface wave propagation surface A-plane is mirror-polished to a mirror surface, and the opposite surface is uneven for bulk wave removal. It is said that the surface is roughened to have a surface roughness, and this surface roughening is done using Li2O, which has a suitable grain size depending on the desired surface roughness.
If the Ra is 25 μm, lapping is performed using a slurry of #240 abrasive grains mixed with water and a small amount of dispersant.

[Problem to be solved by the invention] However, when a piezoelectric single crystal wafer is roughened using this method, the surface roughness Ra within the wafer surface may vary due to the large grain size of the abrasive grains. However, there are disadvantages in that the wafers often suffer from defects such as cracks, chips, and scratches during processing, and the yield of wafers decreases.

[Means for Solving the Problems] The present invention relates to a piezoelectric single crystal wafer and a method for manufacturing the same that solve the above-mentioned disadvantages. When roughening a piezoelectric single-crystal wafer and a piezoelectric single-crystal wafer characterized by a variation of ±15% or less with respect to the average value by lapping using a fi grinding position, the desired surface is JIS Rδ00 required to obtain roughness
1! .: This relates to a method for manufacturing a piezoelectric single crystal wafer, characterized in that abrasive grains having a finer grain size are added to the abrasive grains having a predetermined grain size of #100 to #400 for lapping.

In other words, the present inventors have conducted various studies on ways to suppress the occurrence of defects such as cracks, chips, and scratches during surface roughening of piezoelectric single crystal wafers, and found that piezoelectric single crystal wafers are generally used for surface roughening of piezoelectric single crystal wafers. When lapping with abrasive grains with a finer grain size added to the #100 to #400 abrasive grains, the gaps between the larger abrasive grains are filled with smaller abrasive grains, which can be applied to the wafer during lapping. It was found that the variation in surface roughness (Ra) within the wafer surface was within ±15% of the average value, and the particle size of the abrasive grains used, amount added, etc. The research progressed and the present invention was completed.

This will be explained in further detail below.

[Function] The present invention is an improvement of a method for roughening a piezoelectric single crystal wafer and a piezoelectric material obtained thereby! #Related to crystal wafers.

Piezoelectric single crystal wafers such as lithium tantalate, lithium niobate, and quartz used as surface acoustic wave device substrates have one side that serves as a surface wave propagation surface, so this side is said to have a mirror finish. However, the opposite surface is roughened to eliminate bulk waves.

This surface roughening is usually performed according to the roughness of the target surface.
Particle size #100 to # running on IS R~6001
Is this done by lapping using 400 abrasive grains? In this case, the wafers are often cracked, chips, scratches, etc. due to the large grain size of the abrasive grains, and the amount of this generation varies depending on the grain size of the abrasive grains. When it is high, it is about 35%, and when it is low, it is about 15%, so there is a disadvantage that the product yield of wafers is 65 to 85%.

However, according to the present invention, the particle size is between #2QO and #400.
If you add abrasive grains with a finer particle size to the abrasive grains, the smaller abrasive particles will get into the gaps between the larger abrasive particles,
The load on large-sized abrasive grains is dispersed and reduced; ■The gaps between the abrasive grains become narrower, which improves the water retention and fluidity of the slurry made by adding water and a dispersant to the abrasive grains. The abrasive grains with a large particle size can also be rotated easily.■ The dispersibility of the abrasive grains is improved, so the abrasive grains with a large particle size are distributed evenly.
Even if a slurry containing mainly abrasive grains of Given.

The abrasive grains used here are silicon carbide, alumina, diamond powder, green silicon carbide abrasive GC (JIS R
6111), etc., but this fine abrasive grain has the # specified in JIS R-6001 according to the particle size of the large abrasive grain to which it is added. 500 to #l, 000; Frequently, this addition amount is 500 to 1,000 by weight for a large grain size
It was determined that the range of ~35% was sufficient, and it was confirmed that the wafers obtained in this way had variations in surface roughness (Ra) within the wafer surface within ±15% of the average value. Ta.

[Example] Examples and comparative examples of the present invention will be shown below.

Examples 1 to 3, Comparative Examples 1 to 3 300 lithium tantalate single crystal wafers with a diameter of 3 inches and a thickness of 0.4 m+n were prepared, and 50 wafers each were placed on a surface plate, and JIS R- Particle size defined by #6001 or #180. #240. 10 kg of #360 silicon carbide abrasive grains and 25 kg of water. A slurry made by adding Q and a dispersant was supplied at a rate of 1°C/min, and a load of 25g/cm2. Lapping was performed under the conditions of a surface plate rotation speed of 20 rpm and a wafer removal allowance of 10 am (Comparative Examples 1 to 3), and these abrasive grains had a particle size specified by JIS R-6001 or #50.
0. #700. Using a slurry containing #800 silicon carbide abrasive grains in the amounts shown in Table 1, lapping was carried out under the same conditions as above (Examples 1 to 3), and the resulting wafers were free from cracking, cracking, and cracking. Number of sheets with defective plates or scratches,
When considering the yield of wafer products and the surface roughness of the obtained wafers, the results shown in Table 1 were obtained.

In addition, for the wafer obtained in this way, the in-plane roughness (Ra) of the wafer was examined at the center of the surface and at four points on the outer periphery 5 mm inside from the wafer edge, and the results are shown in Table 2. or obtained.

Table 1 Table 2 (Note) Values in parentheses indicate variations from the average value [Effects of the invention] The present invention relates to pouring for the rough surface of piezoelectric single crystal wafers, and as described above, This method is characterized by roughening a single crystal wafer by lapping it using abrasive grains with a grain size of #100 to #400 mixed with abrasive grains with a finer grain size. According to this method, the gaps between large abrasive grains are filled with abrasive grains of small particle size, which prevents cracks, chips, and scratches from occurring on wafers.
The product yield of wafers was reduced from 5 to 85% to 88 to 96%.
The advantage is that it can be increased up to %.

Claims (8)

[Claims] 1. In-wafer surface roughness R of piezoelectric single crystal wafer
A piezoelectric single crystal wafer characterized in that the variation in a is ±15% or less with respect to an average value. 2. 2. The piezoelectric single crystal wafer according to claim 1, wherein the piezoelectric single crystal is lithium tantalate, lithium niobate, or quartz. 3. When roughening the surface of a piezoelectric single crystal wafer by lapping with free abrasive grains, the grain size specified in JIS R6001 is necessary to obtain the desired surface roughness.
A method for manufacturing a piezoelectric single crystal wafer, characterized in that lapping is performed by adding abrasive grains finer in size to 400 abrasive grains. 4. 4. The method of manufacturing a piezoelectric single crystal wafer according to claim 3, wherein the fine abrasive grains have a grain size of #500 to #1,000 as defined in JIS R6001. 5. Mixed amount of fine abrasive grains is 5-35% by weight
The method for manufacturing a piezoelectric single crystal wafer according to claim 3 or 4. 6. Claim 3: The abrasive grains are mainly composed of SiC.
, 4 or 5. A method for manufacturing a piezoelectric single crystal wafer as described in . 7. 6. The method of manufacturing a piezoelectric single crystal wafer according to claim 3, wherein the abrasive grains are mainly composed of Al_2O_3. 8. 6. The method for manufacturing a piezoelectric single crystal wafer according to claim 3, 4 or 5, wherein the abrasive grains are green silicon carbide abrasive GC defined in JIS R6111.