JPH03224262A - Semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] A high-precision input characteristic test is performed on a semiconductor device that includes a built-in termination circuit for terminating an external signal transmission line, and it is possible to detect minute defects that were previously difficult to detect. However, the purpose is to make it possible to easily discover defects that are clearly the cause of characteristic deterioration in the future as initial defects, and to improve the reliability of the semiconductor device itself or the entire system. The termination circuit is connected via a capacitor to an internal signal transmission path between an input signal external terminal to which the external signal transmission path is connected and an internal circuit.

[Industrial Application Field] The present invention relates to a semiconductor device having a built-in termination circuit for terminating an external signal transmission path, and a semiconductor device for terminating an external signal transmission path.

[Prior art] Conventionally, E CL (emitter-coupled
For example, as an ECL circuit constituting a semiconductor integrated circuit device, a circuit diagram of which is shown in FIG. 8 has been proposed.

This ECL circuit is an example of a so-called one-man powered NOR circuit, and is configured by connecting a current switching circuit 1 to an output circuit 2.

Here, the current switching circuit 1 is an NPN) transistor 3.4.
and a resistor 5.6.7 (NPN)
The transistor 3 has its collector connected via a resistor 5 to a high voltage power supply terminal 8 to which a high voltage VCC5, for example, 0 [■] is supplied, and its base to a logic signal input terminal 9 to which a logic signal S1 is input. connected and its emitter is NPN
It is connected to the emitter of the transistor 4 and one end of the resistor 7. The other end of the resistor 7 is connected to a low voltage power supply terminal 10 to which a low voltage ■Eε, for example, −5.2 [V] is supplied.
It is connected to the. Further, the NPN transistor 4 has its collector connected to a high voltage power supply terminal 8 via a resistor 6, and its base connected to a reference voltage VR1, for example, -1
, 29[V] is supplied to the reference voltage input terminal 1.
Connected to 1.

The output circuit 2 also includes an NPN) transistor 12 and a resistor 1.
It is composed of an emitter follower circuit provided with 3 and 3. Here, the NPN transistor 12 has its collector connected to the high voltage power supply terminal 8, its base connected to the collector of the NPN transistor 3, and its emitter connected to the logic signal output terminal 14 and one end of the resistor 13. The other end of the resistor 13 is connected to the low voltage power supply terminal 10.

In such an ECL circuit, when the input logic signal S1 input to the logic signal input terminal 9 is at a low level "L",
The NPN) transistor 3 is turned off, and the collector voltage of the NPN) transistor 3, and therefore the base voltage of the NPN) transistor 12, becomes a high level "H". As a result, the emitter voltage of the NPN transistor 12, and therefore the output logic signal. SO becomes a high level "H". Conversely, the input logic signal S1 input to the logic signal input terminal 9
When is at a high level "H", the NPN transistor 3 is turned on, and the collector voltage of the NPN transistor 3, and therefore the base voltage of the NPN transistor 12, becomes low level "L".

As a result, the emitter voltage of the NPN transistor 12, and therefore the output logic signal So, becomes a low level "L".

Incidentally, in an ECL semiconductor integrated circuit device, an external circuit, for example, an ECL circuit (an ECL circuit constituting a final stage circuit) connected to another ECL semiconductor integrated circuit device, is configured as shown in FIG. First, it is usually constructed as shown in FIG. That is, the resistor 13, which is a resistor for setting the level of the output logic signal S0, is usually not provided in the same chip.

This is intended, for example, to connect to other ECL semiconductor integrated circuit devices as shown in Section 10.

That is, in this FIG. 10, 15 is the ECL of the example in FIG.
An ECL semiconductor integrated circuit device with a built-in circuit 16, 17 an external signal transmission path, 18 a terminating resistor, for example, a 50Ω resistor, and 19 a terminating voltage Vt, for example, a terminating voltage to which -2 [V] is input. An input terminal, 20 is another ECL semiconductor integrated circuit device, 21 is an external terminal for its input signal, and 22 is an internal circuit, but the ECL shown in the example of FIG.
The circuit 16 is connected to the vicinity of the input signal external terminal 21 of the other semiconductor-integrated circuit device 20 as a terminating resistor 18 in which a resistance for setting the level of the output logic signal So is matched with the impedance of the external signal transmission line 17. Prevents the occurrence of reflected waves,
The purpose is to supply an output logic signal So without distortion to other ECL semiconductor integrated circuit devices 20.

Therefore, conventionally, as shown in FIG.
An ECL semiconductor integrated circuit device has also been proposed, which incorporates ECL 8 and is capable of improving the packaging density on a wiring board. In addition, 23 is the semiconductor integrated circuit device main body,
24 is an internal signal transmission line.

[Problems to be Solved by the Invention] By the way, in the conventional ECL semiconductor integrated circuit device shown in FIG. A so-called input characteristic test is performed in which a predetermined DC voltage is applied to the external terminal 21 and it is measured whether a current as designed flows through the internal circuit 22 or not. In this case, the current flowing into the internal circuit 22 is a current flowing into the base of the NPN transistor constituting the current switching circuit of the first-stage ECL circuit, so it is on the order of several J:LA, whereas the current flowing into the terminating resistor 18 is on the order of several J:LA. The current that flows is several mA. For this reason, it is difficult to measure the current flowing through the internal circuit 22 with high precision, and although it is a minute defect, it is difficult to easily discover defects that are clearly the cause of characteristic deterioration in the future as initial defects. There was a problem.

Furthermore, the ECL semiconductor integrated circuit device 20 shown in FIG.
In this case, the input characteristic test is performed with the terminating resistor 18 connected, but in this case as well, the current flowing through the terminating resistor 18 is much larger than the current flowing through the internal circuit 22. There is a problem in that it is difficult to measure the current flowing through the circuit 22 with high accuracy, and it is not possible to perform a highly accurate input characteristic test.

In view of this, the present invention performs a high-precision input characteristic test despite having a built-in termination circuit such as a termination resistor, and detects minute defects that were difficult to detect in the past. We are developing semiconductor devices and termination circuits that can easily detect defects that are clearly the cause of characteristic deterioration in the future as initial failures, and improve the reliability of the semiconductor device itself or the entire system. We perform high-precision input characteristic tests on semiconductor devices that do not have built-in devices, and identify micro defects that are difficult to detect in the past, but defects that are clear to cause characteristic deterioration in the future as initial defects. It is an object of the present invention to provide a semiconductor device which is an external termination circuit device that can be easily discovered and improves the reliability of the semiconductor device itself or the entire system.

[Means for Solving the Problems] In the present invention, the semiconductor device according to the first invention has an external signal transmission path 26 connected to an external terminal 25 for input signals, as shown in FIG. Termination circuit 27 that terminates
In a semiconductor device having a built-in terminal, a termination circuit 27 is connected to an internal signal transmission path 29 between an input signal external terminal 25 and an internal circuit 28 via a capacitor 30. Note that 31 is a semiconductor integrated circuit device body, and 32 is a termination voltage input terminal.

In the present invention, the semiconductor device according to the second invention includes a capacitor 30 and a termination circuit 27, as shown in FIG.
It is constructed by connecting these in series. In addition, 33 is the capacity 30
This is a terminal for externally connecting one end of the terminal to an external terminal for an input signal of a semiconductor device.

[Function] In the semiconductor device according to the first aspect of the present invention, the termination circuit 27 connects the internal signal transmission path 29 with the capacitor 30.
It is connected for AC and cut off for DC. Therefore, when the logic signal So is supplied to the input signal external terminal 25, the termination circuit 27 is electrically connected to the two internal signal transmission paths and functions as a level setting circuit and a matching circuit. On the other hand, when testing input characteristics by applying a predetermined DC voltage to the input signal external terminal 25, the termination circuit 2
7 is electrically disconnected from the internal signal transmission path 29, so that current can only flow through the internal circuit 28.

In the present invention, the semiconductor device according to the second invention is used by being connected to the input signal external terminal 25 of a semiconductor device 34 that does not have a built-in termination circuit, as shown in FIG. In this case, the termination circuit 27 is connected to the input signal external terminal 25 by the capacitor 30 in terms of alternating current, but is cut off in terms of direct current. Therefore, the input signal external terminal 2 of the semiconductor device 34
5 is supplied with the logic signal SO, the termination circuit 27
is electrically connected to the input signal external terminal 25 and functions as a level setting circuit and a matching circuit.

On the other hand, when performing an input characteristic test by applying a predetermined DC voltage to the input signal external terminal 25, the termination circuit 27 is electrically disconnected from the input signal external terminal 25, so that the internal circuit 28 of the semiconductor device 34 is current can only flow through the

[Embodiments] Various embodiments of the present invention will be described below with reference to FIGS. 4 to 7. In addition, in these FIGS. 4 to 7, parts corresponding to FIGS. 10 and 11 are designated by the same reference numerals, and redundant explanation thereof will be omitted.

First, an embodiment of the semiconductor device according to the first invention will be described with reference to FIG.

FIG. 4 is a circuit diagram showing a main part of an embodiment of the semiconductor device according to the first invention. The other components are the same as the conventional example shown in FIG. 11. Note that 36 indicates the main body of the semiconductor integrated circuit device.

In the example shown in FIG. 4, the terminating resistor 18 has a capacitance of 35
is connected to the internal signal transmission line 24 in terms of alternating current,
Direct current is cut off. As a result, when the logic signal So is supplied to the input signal external terminal 21, the terminating resistor 1
8 is electrically connected to the internal signal transmission line 24 and functions as a level setting resistor and a matching resistor. On the other hand, when performing an input characteristic test by applying a predetermined DC voltage to the input signal external terminal 21, the terminating resistor 18 is electrically disconnected from the internal signal transmission path 24, so current should only be allowed to flow through the internal circuit 22. I can do it.

Therefore, according to the example in FIG. 4, even though the termination resistor 18 is built-in, the internal circuit 2
Since it is possible to apply current only to 2 and measure the current value, it is possible to perform highly accurate input characteristic tests and to detect small defects that are difficult to detect in the past, but which may cause characteristic deterioration in the future. Defects that are clearly caused by defects can be discovered as initial defects.

Next, referring to FIG. 5, another embodiment of the semiconductor device according to the first invention will be described.

FIG. 5 is a circuit diagram showing a main part of another embodiment of the semiconductor device according to the first invention, and is an example of the case where the first invention is applied to a hybrid type semiconductor integrated circuit device.
In the figure, 37 is a main body of the semiconductor integrated circuit device, 38 is an external terminal for input signals, 3 are internal signal transmission paths, and 40 is a monolithic ECL semiconductor integrated circuit device. In this example, the capacitor 35 and the terminating resistor 18 are connected to the ECL semiconductor integrated circuit device 4 in order to effectively suppress the generation of reflected waves.
It is preferable to connect it to the input signal external terminal 0 or to connect it close to this.

In the example shown in FIG. 5 as well, the same effects as in the example shown in FIG. 4 can be obtained for the hybrid semiconductor integrated circuit device.

Next, an embodiment of the semiconductor device according to the second invention will be described with reference to FIG.

FIG. 6 is a circuit diagram showing a main part of an embodiment of a semiconductor device according to the second invention, and is an example in which the second invention is applied to a termination circuit device for an ECLu path. This termination circuit device is constructed by connecting a capacitor 35 and a termination resistor 18 in series.

Note that 41 is a terminal for connecting one end of the capacitor 35 to an external terminal for an input signal of the semiconductor integrated circuit device;
The figure shows a case where the termination circuit device of the example in FIG. 6 is connected to the input signal external terminal 21 of an ECL semiconductor integrated circuit device 20 which does not include a termination resistor.

In this case, the terminating resistor 18 is connected to the input signal external terminal 21 by the capacitor 35 in terms of alternating current, but is cut off in terms of direct current. Therefore, when the logic signal So is supplied to the input signal external terminal 21, the terminating resistor 18 is electrically connected to the input signal external terminal 21 and functions as a level setting resistor and a matching resistor. On the other hand, when performing an input characteristic test by applying a predetermined DC voltage to the input signal external terminal 21, the terminating resistor 18 connects the input signal external terminal 2
Since the internal circuit 22 is electrically disconnected from the internal circuit 22, current can only flow through the internal circuit 22.

Therefore, according to the semiconductor device (termination circuit device) shown in the example in FIG. 6, a high-precision input characteristic test is performed on the ECL semiconductor integrated circuit device that does not have a built-in termination resistor, and it is difficult to detect conventionally. Although the defects are minute, defects that are clearly the cause of characteristic deterioration in the future can be easily discovered as initial defects.

In the above embodiment, the case where the termination circuit is composed of a resistor has been described, but the termination circuit may be of any type as long as it can function as a level setting circuit and a matching circuit. It is also possible to take various circuit configurations.

Further, in the above embodiment, the case where the termination circuit is configured for the ECL circuit has been described, but instead of this, the TT
It can also be configured for an L circuit.

Furthermore, in the above embodiments, the case where the target with a built-in termination resistor and the target to be externally attached are ECL semiconductor integrated circuit devices has been described, but instead, various semiconductor integrated circuit devices such as a TTL semiconductor integrated circuit device can be used. The present invention can also be applied to circuit devices.

[Effects of the Invention] In the semiconductor device according to the first aspect of the present invention, by adopting a configuration in which the termination circuit is connected to the internal signal transmission path through the capacitor, the termination circuit is connected to the internal signal transmission path through the capacitor. During input characteristics testing, which is performed by cutting off DC from the transmission line and applying a specified DC voltage to the input signal external terminal, current can only flow through the internal circuit, allowing highly accurate measurement of the current flowing through the internal circuit. Measurement, that is, high-precision input characteristic testing is performed to easily detect small defects that are difficult to detect in the past, but defects that are clearly the cause of characteristic deterioration in the future as initial defects. be able to. Therefore, the reliability of the semiconductor device itself or the entire system can be improved.

In the semiconductor device according to the second aspect of the present invention, by adopting a configuration in which a capacitor and a termination circuit are connected in series, this can be used as an external terminal for input signals of a semiconductor device that does not have a built-in termination circuit. Even if an input characteristic test is performed by connecting the termination circuit externally to the semiconductor device, since this termination circuit is DC-blocked by the capacitance, current can only flow through the internal circuit of the semiconductor device. We conduct high-precision input characteristic tests on semiconductor devices that have not yet been tested, and we can easily identify small defects that are difficult to detect in the past, but which are clearly the cause of characteristic deterioration in the future, as initial defects. can be discovered.

Therefore, also in the semiconductor device according to the present invention, it is possible to improve the reliability of the semiconductor device itself or the entire system.

[Brief explanation of drawings]

FIG. 1 is a principle explanatory diagram of a semiconductor device according to the first invention of the present invention, FIG. 2 is a principle explanatory diagram of a semiconductor device according to the second invention of the present invention, and FIG. 3 is a semiconductor device according to the second invention. A circuit diagram showing an example of the use of the device, FIG. 4 is a main part of an embodiment of the semiconductor device according to the first invention of the present invention (an example when the semiconductor device according to the present invention is applied to an ECL semiconductor integrated circuit device) FIG. 5 is a circuit diagram showing another embodiment of the semiconductor device according to the first invention, which is a monolithic type E.
FIG. 6 is a circuit diagram showing a main part of a semiconductor device according to the second aspect of the present invention. A circuit diagram showing the main parts, Figure 7 shows the semiconductor device (terminal circuit device) of the example in Figure 6.
A circuit diagram showing the main parts when externally connected to an L semiconductor integrated circuit device, Figure 8 is a circuit diagram showing an example of an ECL circuit, and Figure 9 is an EC
A circuit diagram showing another example of the L circuit, Figure 1O is E of the example in Figure 9.
A circuit diagram showing the main parts when an ECL semiconductor integrated circuit device with a built-in CL circuit is connected to another ECL semiconductor integrated circuit device, Figure 11 shows a conventional ECL semiconductor integrated circuit device with a built-in terminating resistor.
FIG. 2 is a circuit diagram showing main parts of a semiconductor integrated circuit device. (In Figures 1 to 3) 25... External terminal for input signal 27... Termination circuit 28... Internal circuit 29... Internal signal transmission path 30... Capacitor 31... Semiconductor integrated Circuit device main body 32... Voltage input terminal for termination 33... Terminal for external terminals Fig. 1 explanatory diagram of the principle of the semiconductor device according to the first invention Fig. 1 T Diagram 2 explanatory of the principle of the semiconductor device according to the second invention FIG. 7 Third circuit diagram showing an example of use of the semiconductor device 1 according to the second invention
FIG. 4 Main part of another embodiment of the semiconductor device 1 according to the first invention FIG. 5 Main part of another embodiment of the semiconductor device 1 according to the first invention FIG. Main part Figure 6V7 Circuit diagram 7 showing the main part when the semiconductor device (terminal circuit device) of the example in Figure 6 is externally attached to an ECL semiconductor integrated circuit device
Figure (-5, 2V") Example of ECL circuit (-5, 2V) Other example of ECL circuit Figure 9 0

Claims (1)

[Claims] 1. In a semiconductor device having a built-in termination circuit (27) for terminating an external signal transmission path (26) connected to an input signal external terminal (25), the termination circuit (27) The semiconductor device is connected to an internal signal transmission path (29) between the input signal external terminal (25) and the internal circuit (28) via a capacitor (30). 2. A semiconductor device comprising a capacitor (30) and a termination circuit (27) connected in series. 3. The termination circuit (2) is connected to the input signal external terminal (25) to which the external signal transmission path (26) is connected via the capacitor (30)
7) is externally attached.