JPH0322430U - - Google Patents
Info
- Publication number
- JPH0322430U JPH0322430U JP8377089U JP8377089U JPH0322430U JP H0322430 U JPH0322430 U JP H0322430U JP 8377089 U JP8377089 U JP 8377089U JP 8377089 U JP8377089 U JP 8377089U JP H0322430 U JPH0322430 U JP H0322430U
- Authority
- JP
- Japan
- Prior art keywords
- flop
- flip
- signal
- pulse width
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Pulse Circuits (AREA)
Description
第１図は、本考案の一実施例を示す回路図、第
２図は従来のパルス幅伸張回路を示す回路図、第
３図イ乃至ニは第２図の説明に供する為の波形図
、第４図イ乃至ホは第１図の説明に供する為の波
形図、及び第５図は第１図の具体回路例を示す回
路図である。
６……ＲＳ−ＦＦ、８……Ｄ−ＦＦ、９……第
１インバータ、１０……第２インバータ、１１…
…第３インバータ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional pulse width stretching circuit, and FIGS. 3A to 3D are waveform diagrams for explaining FIG. 4A to 4E are waveform diagrams for explaining FIG. 1, and FIG. 5 is a circuit diagram showing a specific circuit example of FIG. 1. 6...RS-FF, 8...D-FF, 9...First inverter, 10...Second inverter, 11...
...Third inverter.
Claims (1)
ロツプと、 該ＲＳフリツプフロツプの出力信号がデータ端
子に、クロツク信号がクロツク端子に印加される
Ｄフリツプフロツプと、 反転された前記クロツク信号と前記Ｄフリツプ
フロツプの出力信号とが印加されると共にその出
力信号で前記ＲＳフリツプフロツプを反転させる
インバータとから成り、 前記ＲＳフリツプフロツプの出力信号及び前記
Ｄフリツプフロツプの出力信号から前記入力信号
のパルス幅伸張を行なつた信号を得るようにした
ことを特徴とするパルス幅伸張回路。 (2) 前記パルス幅伸張回路を構成する素子は、
Ｉ２Ｌで構成されることを特徴とする請求項第１
項記載のパルス幅伸張回路。[Claims for Utility Model Registration] (1) An RS flip-flop that is inverted according to an input signal; a D flip-flop in which the output signal of the RS flip-flop is applied to a data terminal and a clock signal is applied to a clock terminal; an inverter to which a clock signal and an output signal of the D flip-flop are applied and inverts the RS flip-flop with the output signal; A pulse width expansion circuit characterized in that a signal that has been expanded is obtained. (2) The elements constituting the pulse width expansion circuit are:
Claim 1, characterized in that it is composed of I 2 L.
The pulse width stretching circuit described in Section 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989083770U JPH0735454Y2 (en) | 1989-07-17 | 1989-07-17 | Pulse width expansion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989083770U JPH0735454Y2 (en) | 1989-07-17 | 1989-07-17 | Pulse width expansion circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0322430U true JPH0322430U (en) | 1991-03-07 |
| JPH0735454Y2 JPH0735454Y2 (en) | 1995-08-09 |
Family
ID=31631715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989083770U Expired - Lifetime JPH0735454Y2 (en) | 1989-07-17 | 1989-07-17 | Pulse width expansion circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0735454Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5144629A (en) * | 1974-10-09 | 1976-04-16 | Sumitomo Chemical Co | Borudooekino chogosanpuhoho |
| JPS52141550A (en) * | 1976-05-20 | 1977-11-25 | Matsushita Electric Ind Co Ltd | Pulse expanding circuit |
-
1989
- 1989-07-17 JP JP1989083770U patent/JPH0735454Y2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5144629A (en) * | 1974-10-09 | 1976-04-16 | Sumitomo Chemical Co | Borudooekino chogosanpuhoho |
| JPS52141550A (en) * | 1976-05-20 | 1977-11-25 | Matsushita Electric Ind Co Ltd | Pulse expanding circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0735454Y2 (en) | 1995-08-09 |
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