JPH03224312A - Driving method for pulse generation circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pulse generation circuit used in a drive circuit for switching elements constituting an inverter or the like.

[Prior art] Fig. 3 shows a system for turning on/off switching elements such as an inverter, which is formed by connecting a plurality of switching elements in a bridge.
This figure shows a conventional example of a drive circuit for driving.

In the figure, 1 is a PNP type transistor, and 2 is an NPN type transistor, which constitute a buffer (current amplification circuit). 4 is a pulse transformer, and 5 is an output transistor. Both transistors 1 and 2 form a haphazard circuit with positive and negative emitter follower connections, and are connected to a power source 6 (voltage El).
), and a pulse signal PI is supplied to the base. A DC cutting capacitor 3 is inserted between the series connection point a of both transistors 1 and 2 and one end of the input winding m4P of the pulse transformer 4. The output winding 4S of the pulse transformer 4 is connected to the base of the output transistor 5 via a resistor r1. The collector of the output transistor 5 is connected to a voltage a (voltage E2) 8 via a resistor 7.

9 is an output terminal, and its output (drive signal) P2 is directly or amplified and then supplied to a switching element of an inverter (not shown) to turn the switching element ON10F.
F. 10 is an operation command circuit, which outputs a start command (
When receiving a command (ON), it sends out a pulse P1, and when receiving a stop command (OFF), it stops sending out a pulse P1.

r2 is a resistance.

In this configuration, pulse P+ has a duty ratio of 50%
When the positive pulse is supplied to the base of transistor 1.2, transistor 1 turns ONL, and the voltage of the positive pulse after subtracting the fill layer pressure between the base and emitter passes through capacitor 3 to the pulse transformer. The voltage is applied to the input winding 4P of the pulse transformer 4, and the output winding '! a
A positive voltage Vp is induced in 4S. This voltage Vp is the resistance r
1 to the base of transistor 5, transistor 5 is ONL, and output terminal 9 is at 0 potential. Next, when a negative pulse of pulse P is supplied to the bases of transistors 1 and 2, transistor 1 is turned off and transistor 2 is turned on, so that a negative voltage is applied to the pulse transformer 4, and its output winding A negative voltage Vp is induced in 4S, and this voltage Vp is applied to the base of the output transistor 50, so that the output transistor 5 is 0FFL and the output terminal 9 sends out a drive signal P2 of level E2 that turns on the switching element of the inverter. .

This operation is repeated until the above-mentioned OFF command is generated.

[Problem to be solved by the invention]

In this conventional configuration, when the above-mentioned OFF command is generated after the negative pulse of pulse P1 is continuously applied, the capacitor 3 remains charged to the polarity shown in the figure, so that , the pulse P1 is passed through the transistor l
2, the output Vp of the pulse transformer 4, as shown in FIG. This will lead to a short circuit in the arm of the inverter.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a method for driving a pulse generation circuit that can generate output pulses without delay in response to a start command.

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a control circuit that sends out positive and negative pulses by connecting in series a transistor for current amplifying positive pulses and a transistor for current amplifying negative pulses. A pulse generation circuit having a pulse transformer to which an output of a control circuit is applied via a capacitor, and a transistor that is turned on/off by the output pulse of the pulse transformer, wherein a first switch is provided between the control circuit and the capacitor. In addition, a second switch for shorting inserted between the primary terminals of the pulse transformer and a capacitor discharge circuit consisting of a discharge resistor is provided, and when the operation is stopped, the negative pulse is supplied to the control circuit for a predetermined period of time. After that, the first switch is opened, and the second short-circuit switch is closed. The transistor is configured to be turned off when the operation is stopped, and in claim 3, a Zener diode is connected in series on the secondary side of the pulse transformer in place of the second switch for shorting. Inserted.

[Effect]

In the present invention, when the operation is stopped, the energy stored in the pulse transformer is released to the capacitor, and the energy stored in the capacitor is consumed in the discharge circuit, so that when the operation is restarted, normal pulse power can be obtained from the beginning of the startup.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

In FIG. 1, a switch 11 is inserted between a connection point a between transistors 1 and 2 and a capacitor 3. In FIG. 12 is a discharge resistor, and 13 is a short circuit switch. This short circuit switch 13 is inserted between both ends of the input winding 4P of the pulse transformer 3. The operation command circuit 10 not only sends out the pulse P, but also supplies a signal disconnection signal S1 to the switch 11 and also to the switch 13 via the inverting element 14.

Next, the operation of this embodiment will be explained with reference to the waveform time chart of FIG. FIG. 2 shows the waveform of the output Vp of the pulse transformer 4.

At time t1, when an OFF command is given to the driving command circuit 10, the driving command circuit 10 gives a negative pulse of the pulse P to the transistors 1 and 2 for a predetermined time (Δt). As a result, the transistor 2 remains in the ON state for a period of time Δ, so that the capacitor 3 is sufficiently charged to the illustrated polarity.

When the time Δ has elapsed, the signal disconnection command SI is supplied to the switch 11 and the switch 11 is opened (time tz),
At the same time, a signal obtained by inverting the signal disconnection command S1 by the inverting element 14 is applied to the switch 13, and the switch 13 is closed.

As a result, the capacitor 3 is discharged with a time constant determined by the resistance value R of the discharge resistor 12 and the capacitance C of the capacitor 3, and the potential of the output winding 4S settles to zero potential.

When restarting, an ON command is given to the operation command circuit 10 to supply the pulse P1 to the transistors 1 and 2, and at the same time, the signal disconnection command S is extinguished, the switch 11 is turned on, and the switch 13 is opened.

As described above, in this embodiment, when stopping the operation of the drive circuit, a negative pulse is applied to the transistors 1 and 2 for a predetermined time ΔL to ensure the off operation, and then the accumulation of pulse transformer 4 is stopped. The on-resistance of the switch 13 causes enough energy to be released to the capacitor 3, and the energy stored in the capacitor 3 is consumed by the discharging resistor 12. Therefore, when the drive circuit is restarted, the pulse transformer 4
will send out normal pulses with equal positive and negative peak values from the beginning of startup.

In the above embodiment, the control circuit consisting of transistors 1 and 2 is completely disconnected by the switch 11, but since it is sufficient for the switch 11 to disconnect the negative pulse sent out by the control circuit, the switch 11 is A switch having the configuration shown in FIG. 1(a) may be used.

In FIG. 1(a), 15 is a diode, 16 is an FE
It is a T transistor, and the diode 15 is in the forward direction for positive pulses. The FET) transistor 16 is in the forward direction with respect to the negative pulse, and turns OFF when receiving the signal disconnection signal Sl.

Further, in the above embodiment, although the delay in the operation of the switch 11 is not taken into account, after the generation of the ON command, a negative pulse is applied to the transistors 1 and 2 for a predetermined time, and then a pulse P
It is preferable to give 1 so that the pulse Vp of the first full day due to the delay in the operation of the switch 11 is not adversely affected.

In the above embodiment, a discharge circuit is formed by closing the switch 13 to discharge the charge of the capacitor 3, but the CR constant of the capacitor 3 and the discharge resistor 12 is selected to a value such that Vp is less than E1. , as shown by the broken line in FIG. 1, the Zener potential is E on the secondary side 4S of the pulse transformer 4.
, insert Zener die tote 16, and switch 1
3 may be omitted.

[Effects of the Invention] As explained above, the present invention provides a pulse transformer having a capacitor in its input circuit, when the pulse transformer is stopped,
Since the configuration is such that the energy stored in the capacitor is released, the voltage of the capacitor does not have an adverse effect at the start of operation, and normal pulses can be obtained from the output pulses of the first full day.

[Brief explanation of drawings]

1 is a circuit diagram showing an embodiment of the present invention, FIG. 1(a) is a diagram showing a specific example of the switch in the above embodiment, FIG. 2 is an output waveform diagram of the pulse transformer in the above embodiment, This figure shows a conventional pulse generating circuit, and FIG. 4 is an output waveform diagram of the pulse transformer at startup in the conventional example. ■, 2-1-ransistor, 3-capacitor, 4-pulse transformer, 5-output transistor, 10--operation command circuit, 11--first switch, 12-discharge resistor, 1
3-second switch, 15--diode, 16--F
E T ) transistor, 17-tunina diode.

Claims (3)

[Claims] (1) A control circuit that sends out positive and negative pulses, a pulse transformer to which the output of this control circuit is applied via a capacitor,
In a pulse generating circuit having a transistor that is turned ON/OFF by the output pulse of the pulse transformer, a first switch is inserted between the control circuit and the capacitor, and a first switch is inserted between the primary side terminals of the pulse transformer. A capacitor discharging circuit consisting of a second short-circuiting switch and a discharging resistor is provided, and when the operation is stopped, the negative pulse is supplied to the control circuit for a predetermined period of time, and then the first switch is opened and the short-circuiting switch is turned off. A method for driving a pulse generation circuit, characterized in that the circuit is closed. (2) Driving the pulse generating circuit according to claim 1, wherein the first switch includes a diode that passes a positive pulse and a transistor that passes a negative pulse, and the transistor is turned off when the operation is stopped. Method. (3) The method for driving a pulse generating circuit according to claim 1 or 2, characterized in that a Zener diode is inserted in series on the secondary side of the pulse transformer in place of the second short-circuiting switch.