JPH03225281A - Sampling oscilloscope - Google Patents

Abstract

PURPOSE:To accurately display a waveform in a wide time width by providing the sampling oscilloscope with a trigger circuit, two delay circuits, a pulse generator, etc., and synthesizing the outputs of a sampling head in plural data recording time widths to display the waveform. CONSTITUTION:In each data recording time width T3, the output S3 of the trigger circuit 6 is delayed by adding DELTAt1 by a 1st delay circuit 7 in each period of a trigger signal. The output S4 of the circuit 7 is delayed by adding DELTAt2 by a 2nd delay circuit 11 in each time width T3. In the succeeding time width T3, the delay time of the circuit 11 is set up to DELTAt2 and data are samplied like a1, a2.... In the succeeding time width T3, data are similarly sampled like b1, b2... and the sampled data are synthesized with the preceding signal data to obtain a display waveform. Then, the delay time values of the circuit 11 are respectively set up to 2DELTAt2, 3DELTAt2, signal data are similarly sampled like C1, C2..., d1, d2... and synthesized with the preceding signal data to form a display waveform. Since the data are sampled four times in total, a waveform extremely close to the original signal can be obtained as compared with a conventional display waveform.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to improving the time resolution of a sampling oscilloscope.

<Prior Art> FIG. 7 is a block diagram showing a conventional example of a sampling oscilloscope. The signal input S1 applied to the terminal 1 is sampled by a sampling head 2 consisting of a sampling switch, a hold capacitor, etc., and then sent to an amplifier 3.
After being amplified, the signal is displayed on the CRT via the Y-axis output terminal 4. Further, a trigger input S2 synchronized with the signal human power S2 is applied to the terminal 5, and the trigger circuit 6 generates a trigger signal S3 of several tens to several hundreds of kHz in synchronization with the trigger input S2. The signal S3 is delayed by a predetermined time every cycle by the delay circuit 7. The pulse generator 8 outputs the output S of the delay circuit n7.
The sampling head 2 is driven by the output S5 which is synchronized with the sampling head 4. Further, the fi1-stage wave generator 9 changes the output voltage every time a sampling signal is input from the delay circuit 7, and
Generates a staircase wave that sweeps the axis. This staircase wave output is applied to the CRT via terminal 10.

<Problems to be Solved by the Invention> FIG. 8 is a time chart for explaining the operation of the sampling oscilloscope. For simplicity, the display resolution on the horizontal axis is set to 9 dots, so the delay time Δ is equal to the display time width/8. When observing a repetitive waveform with a narrow time width [1] as shown in (A), a waveform CB similar to the original waveform can be displayed, but a wide time width T2
When performing 1tlJ, the sampling interval is rough, so
A waveform different from the original waveform as shown in (-C) is displayed, and it is also difficult to accurately display a waveform with glitches. In other words, when the input signal waveform changes more rapidly than the interval between sampling points. There is a problem that it cannot be displayed accurately.

The present invention was made to solve the above problems,
The objective is to realize a sampling oscilloscope that can accurately display waveforms over a wide range of time widths.

Means for Solving the Problems> A sampling oscilloscope according to the present invention includes a sampling head that samples a signal input, a trigger circuit that generates a trigger signal synchronized with the signal input, and an output signal of the trigger circuit that inputs each output signal. a first delay circuit that increases and delays the trigger signal by a first unit time for each cycle of the trigger signal in the data recording time width; and an output signal of the first delay circuit that is delayed for each cycle of the data recording time width. second to
A second delay circuit that increases the delay by a unit time of It is characterized in that it is configured to synthesize outputs and display signal inputs in waveforms.

Furthermore, the first delay circuit and the second delay circuit may be interchanged.

Effect> Since the signal data sampled every second delay time is further added to the signal data sampled every first delay time, time resolution is improved.

<Example> Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing an embodiment of a sampling oscilloscope according to the present invention. The same parts as in FIG. 7 are given the same symbols and the explanation is omitted. The configuration shown in FIG. 1 is different from the configuration shown in FIG. The point is that it is added to the input of the generator 9. The delay circuit 11 further delicately delays the output of the delay circuit 7. Here, when the unit delay amount (first delay time) of the delay circuit 7 is Δt1, the second delay time is Δt2=Δt1/ Apply a delay of 4. That is, as will be described later, the waveform is sampled over a time period of 4@, which is the data recording time width.

Figure 2 is the first illustration! Time chart showing the operation of
The figure shows the CRT display waveform corresponding to FIG. 2. In FIG. 0, the data recording time width T3 corresponds to one sweep in the CRT display.

In each data recording time width T3, the output S3 (FIG. 2(A)) of the trigger circuit 6 is delayed by the delay circuit 7 by increasing Δt1 for each period of the trigger signal S3 (
2(B)), the output S4 of the delay circuit 7 is output from the delay circuit 11.
Therefore, the delay is increased by Δt2 for each data recording time width T (FIG. 2(C)). That is, in the first data recording time width T3, the delay time of the delay circuit 11 is set to 0 and the signal data is taken. As a result, a1 to a8 (
The third
The zero-order pig recording time width T that results in the displayed waveform shown in Figure (A>)
3, the delay time of the delay circuit 11 is set to Δt2, and samples are sampled as shown in b1 to b8 (b3 and subsequent parts in the figure are omitted) in FIG.
Obtain the displayed waveform of B). Similarly, the signal data are obtained by setting the delay times of the delay circuit 11 to 2Δt2 and 3Δt2, and the signal data is obtained from c to c8 in FIG. (omitted), and the display waveforms shown in FIGS. 3(C) and 3(D) are obtained by combining each with the previous signal data. Here, since the display resolution and the sampling time resolution are equal to 9 dots, the data a'□CI, a2~C2,..., a8~ delayed by the delay circuit 11 is
c8 is the same time on the display.Sampling the signal data for a total of four data recording time widths means that the signal data between the time intervals of delay time Δt1 is also sampled as shown in Figure 4. Since sampling is performed through interpolation, the displayed waveform in FIG. 3 (D>) is much closer to the original signal waveform than in FIG. 3 (A), which corresponds to the conventional displayed waveform.

Furthermore, as shown in FIG. 5, even a waveform with glitches g can be sampled accurately.

According to the sampling oscilloscope score with the above configuration, by changing the sampling timing in two stages and changing the delay offset little by little for each sweep,
Sampling with high time resolution can be performed.

In addition, as is clear from Figure 3, since all the sampling is done in multiple sweeps, the general shape of the waveform can be grasped in the -th sweep, and it is easier to see the waveform than in the case of finely sampling in the -th sweep. The upper sweep time becomes shorter.

In the above embodiment, the delay circuits 7.11 may be replaced and connected.

Furthermore, if the time resolution during display is made smaller than the time resolution during sampling, the displays corresponding to each sweep stage of FIGS. 3(A) to (D) are shown in FIGS. 6(A) to (D). This allows you to display a waveform that is even closer to the original waveform.

Further, the number of sweeps for performing all sampling is not limited to the above-mentioned four times, but can be any number of times.

<Effects of the Invention> As described above, according to the present invention, a sampling oscilloscope that can accurately display waveforms over a wide range of time widths can be realized with a simple configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the sampling oscilloscope according to the present invention, FIG. 2 is a time chart showing the operation of the sampling circuit of the device shown in FIG. 1, and FIG. Diagram showing the display state, No. 4
5 and 5 are operation explanatory diagrams showing the sampling state of the device shown in FIG. 1, FIG. 6 is a diagram showing other display states by the device shown in FIG. 1, and FIG. 7 is a configuration block diagram showing a conventional sampling oscilloscope. , FIG. 8 is a time chart showing the operation of the device shown in FIG. 7. 2... Sampling head, 6... Trigger circuit, 7
. . . first delay circuit, 8 . . . pulse generator, 11.
...Second delay circuit, S...Signal input, T3...
Data recording time width, Δt...first unit time, Δt
2...Second unit time.

Claims (2)

[Claims] (1) A sampling head that samples a signal input, a trigger circuit that generates a trigger signal synchronized with the signal input, and an output signal of this trigger circuit that is input for each cycle of the trigger signal in each data recording time width. 1st
a first delay circuit that delays the output signal of the first delay circuit by increasing the unit time; and a second delay circuit that delays the output signal of the first delay circuit by increasing the second unit time for each cycle of the data recording time width.
a delay circuit, and a pulse generator that drives the sampling head in synchronization with the output of the second delay circuit, and synthesizes the outputs of the sampling head in a plurality of data recording time widths to display the signal input in a waveform. A sampling oscilloscope characterized by being configured as follows. (2) The sampling oscilloscope according to claim 1, wherein the first delay circuit and the second delay circuit are exchanged.