JPH03230249A - Data transfer system using shared memory - Google Patents

Abstract

PURPOSE:To accelerate a processing and to reduce cost by setting the time to restrict an information processing part when transferring data only to the notifying time for a processing demand when the data is transferred between host and slave stations by using a shared memory. CONSTITUTION:An information processing part 2 of a host station 20 writes the data to be processed by a slave station 21 into a shared memory 7. After finishing writing, the information processing part 2 investigates the state of an information processing part 3 in the slave station 21 by using status line 8, and as soon as the possibility of reception is answered from the information processing part 3, the permission of using the shared memory 7 and the processing demand are notified to the information processing part 3. The information processing part 3 notifies the changeover of a switch to a selector 5 by sending out a specified instruction to a data bus 9b, and since the selector 5 notifies the changeover of the switch to a selector 6, the shared memory 7 is turned to a state occupied by the slave station 21. Thus, at the time of data transfer between the host and slave stations, the restricting time is set to only the notifying time for the processing demand, and the processing efficiency of the information processing part is improved.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a data transfer method using a shared memory, and particularly to a data transfer system using a shared memory in which a master station and a slave station that transfer data transfer data via a shared memory. Regarding the data transfer method used.

[Conventional technology]

Conventionally, when transmitting data from a master station to a slave station, as shown in FIG.
4 to notify the slave station 21 that there is data to be transmitted. In response, when a response indicating that reception is possible is obtained from the slave station 21, the data stored in the memory 1 is transferred to the data bus 12a.
, the slave station 2 via the information processing section 2 and the data bus 12b.
Send one byte at a time to 1. In this case, each of the information processing units 2 and 3 of the main station 2o and the slave station 21 uses the status line 14 to mutually check the status of the other information processing units, and then transmits and receives data. The slave station 21 stores data received from the master station 20 in the memory 4 via the information processing section 3.degree. data bus 12C. Furthermore, 13a,
13b are each used as an address bus.

[Problem to be solved by the invention]

In the conventional data transfer method described above, the information processing units of both the main and slave stations use the status line to check the status of the other information processing units while transmitting and receiving one byte at a time. The drawbacks are that the overhead in transfer is large and the processing efficiency of the information processing section is poor.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data transfer method that solves these drawbacks and significantly improves the processing efficiency of an information processing section.

[Means to solve the problem]

The method of the present invention includes an information processing section that processes information regarding transfer data and a memory section for storing data, and transfers data via a status line that instructs to start communication and a data bus for data transfer. A data transfer method using a shared memory in which data is transferred between a master station and a slave station via a shared memory. It is configured to include a pair of cascade-connected selectors that allow the information processing units of the master station and the slave station to mutually exclusively access the shared memory under the control of the information processing unit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of a data transfer system according to the present invention. In FIG. 1, 1 is the memory of the main station 20, 2
3 is the information processing section of the master station 20, 3 is the information processing section of the slave station 21,
4 is the memory of the slave station 21, 5 is a selector for switching the data bus between the master station and the slave station, 6 is a selector for switching the address bus between the master station and the slave station, 7 is a shared memory between the master station and the slave station, 8 is communication 9.9a, 9b are data buses, 10.10a, 10b are address buses, 1
1 is a communication line. ' Consider a situation where the main station 20 occupies the shared memory 7. This state can be established by sending a specific command from the main station 20 via the data bus 9a.
b is connected to the shared memory 7, and the selector 6 is controlled via the communication line 11 from the selector 5, and the address bus 10
This is done by connecting the address bus 10 to the shared memory 7.

In this state, the information processing unit 2 of the master station 20 writes data that it wants the slave station 21 to process into the shared memory 7. After the writing is completed, the information processing unit 2 checks the status of the information processing unit 3 of the slave station 21 using the status line 8, and as soon as there is a response from the information processing unit 3 indicating that the data can be received, the information processing unit 2 transfers the information to the shared memory to the information processing unit 3. 7, notification of permission to use and notification of processing request will be sent.

The information processing unit 3 that has received the processing request notification notifies the selector 5 of the switch change by sending a specific command to the data bus 9b.

When the selector 5 is notified of the switch change, the selector 5 connects the communication line 11 to the communication line 11.
The switch change is notified to the selector 6 via the slave station 21, and the shared memory 7 becomes occupied by the slave station 21. That is, the selector 5 and the selector 6 realize mutual exclusion of simultaneous accesses to the shared memory 7 from the information processing units 2.3 of the master station 20 and slave station 21.

Thereafter, the information processing unit 3 of the slave station 21 processes the data stored in the shared memory 7 and supplies the results to the master station 20 via the data bus 9.

Note that even when the data in the shared memory that has been processed by the slave station 1 is to be sent back to the master station 20 again, the selector 5.6 may be connected to the master station side by the above-described process and the data can be transferred.

Furthermore, although the above-mentioned embodiment is based on the case where two stations are connected and one shared memory is connected, it is clear that it can be easily implemented when any number of stations and any number of shared memories are connected. be.

In this way, the constraint time during data transfer between the master station and the slave station is limited to the notification time for processing requests, thereby strengthening the independence of the information processing section and significantly improving processing efficiency. Furthermore, the increased independence significantly increases the applicability to parallel processing such as pipeline processing.

〔Effect of the invention〕

As explained above, the present invention, when transferring data between a master station and a slave station using a shared memory, reduces the constraint time of the information processing unit at the time of data transfer to only the notification time for processing requests. This has the effect of significantly improving the processing efficiency of the information processing units of the master station and the slave station, speeding up processing, and reducing costs.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a data transfer method according to the present invention, and FIG. 2 is a block diagram showing a conventional data transfer method. 1.4...Memory, 2,3...Information processing unit, 5.6
...Selector, 7...Shared memory, 8...Status line, 9.9a, 9b=...Data bus, 10.10
a, lOb...Address bus, 11...Communication line, 1
2a to 12c...data bus, 13a, 13b...
Address bus, 14...Status line, 20...Main station, 21...Slave 0°
Agent 4T8! Susumu Shiuchihara) [Prisoner

Claims (1)

[Claims] Each station is equipped with an information processing section for processing information related to transferred data and a memory section for storing data, and is used to transfer data between a master station and a slave station via a status line for instructing the start of communication and a data bus for data transfer. A data transfer method using a shared memory in which data is transferred via a shared memory, which includes a shared memory for storing data to be transmitted from the master station to the slave stations, and a shared memory for controlling the information processing units of the master station and the slave stations. A data transfer method using a shared memory, characterized in that the shared memory is provided with a pair of cascade-connected selectors that allow the information processing units of the master station and the slave station to mutually exclusively access the shared memory.