JPH03230390A - Dual port memory device - Google Patents

Abstract

PURPOSE:To reduce the size and cost of the dual port memory device by simple construction by using a serial memory and an FIFO memory for inputting optional image data out of image data outputted from the serial memory and successively outputting the image data. CONSTITUTION:Image data outputted from an image pickup means at real time are A/D converted and digital data are stored in the serial memory 1 in series and outputted as continuous image data for pictures. On the other hand, image data outputted from the memory 1 are sent also to the FIFO memory 2 and only necessary data are inputted to the memory 2 in each line e.g., worked when necessary and outputted to the external as digital data information.

Description

[Detailed description of the invention] [Field of application in a business] This invention provides continuous image data for a screen as well as
4' child! The present invention relates to a dual port memory device capable of outputting digital image data.

[Conventional technology] Conventionally, images captured by a video camera etc. are transferred to a CRT.
(Cathode-ray tube), etc., and when extracting the necessary image data as digital information, there is a serial port that continuously outputs data stored in series, and a random board that can output arbitrary data. Using a dual port memory device having two ports (in this specification, the term "dual port" is used to mean having two ports, a serial port and a random port, as data read ports),
Continuous image data and arbitrary digital image data are read out from separate outlets.

FIG. 3 is a block diagram showing the configuration of a conventional dual port memory device. As shown in the figure, a conventional device of this type is configured using a dual port DRAM 31 (hereinafter abbreviated as DPDRAM) having two ports, a serial port and a random port. , the DRAM 31 is provided with an external control circuit 32 for controlling its operation.

In such a device, real-time image data obtained from a video camera or the like is input to the DPDRAM 31 and temporarily stored, image data for continuous screens is outputted from the serial port 31a, and arbitrary image data is output as necessary. Digital image data is random boat 31b
is output from.

[Problem to be solved by the invention] However, the dual port memory device using the conventional DPDRAM as described above does not have a refrigerant circuit or an RA.
RA S required to specify row and column addresses of M
(row address 5trobe) ・C
A S (column address 5trob
e) Generator, Atres Multibretas circuit, etc., D
It is necessary to provide various circuits specific to RAM externally, which has the disadvantage that the external control circuit becomes large-scale and complicated. Further, DPDRAM itself is very expensive, and conventionally, it has been difficult to reduce the size and cost of dual-port memory devices.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a dual port memory device that has a simple structure, can be miniaturized, and is inexpensive.

[Means for Solving the Problems] A dual port memory device of the present invention includes serial data output means for outputting continuous image data and random data output means for outputting arbitrary image data, and has the above-mentioned features. In order to achieve the above object, the serial data output means includes a serial memory that stores input image data in series and outputs it continuously, and the random data output means includes a serial memory that stores input image data in series and outputs the input image data continuously. It is equipped with a FIFO memory that captures arbitrary image data among the image data and outputs it in the order in which it is captured.

[Operation] The present invention will be described in detail with reference to FIG. 1 showing the basic configuration of a dual port memory device according to the present invention.

Instead of using a DPDRAM, the dual port memory device of the present invention has a serial memory 1 that stores data serially and outputs it continuously over time, and a serial memory 1 that stores data in series and outputs it continuously over time, and a serial memory 1 that stores only necessary image data in a certain unit (generally, line by line). F I F O (fir
(first in first out) memory 2.

The serial memory 1 has input/output lines for clock signals and their control signals, and input/output lines for data, and even a write clock is input! Operations such as f and refresh are automatically performed within the serial memory 1. Therefore, there is no need to perform troublesome timing design and provide an external refresh circuit. In addition, when inputting image data, control that requires very delicate timing design such as input of a multiplex address signal using RAS-CAS, or is not required at all, and an external control circuit for specifying the address is required. There is no need to provide

In such a dual port memory device, real-time image data from the imaging means is A/D converted, stored in series in the serial memory 1, and output as continuous image data for the screen. At this time, for example, if image data of the same subject is sent at different times for each color (red-R, green-G, blue-B) (details will be described later), R,
G.

By temporarily storing each B image data in the serial memory 1 and outputting the corresponding image data in three colors simultaneously, a color screen can be easily obtained.

On the other hand, the image data output from serial memory 1 is
The data is also sent to the IFO memory 2, and only necessary data, for example, line by line, is taken into the FIFO memory 2, processed as necessary, and outputted to the outside as digital information.

Here, the amount of data that can be loaded into the FIFO memory 2 naturally depends on the capacity of the FIFO memory 2, but
- There is almost no need to handle planning data at each time, and FIFO memory 2 consisting of line memory etc.
Even if you need data in an area larger than the capacity of
This can be done by repeatedly importing data in the required area. Also, when outputting these data to the outside, if you sequentially import the next data while outputting the data, the FIF
The loss time due to the loading of data into the O memory 2 is almost negligible.

In addition, in such a case, the data read speed is
Although slower than RAM, the external device to which digital image data is output is generally a computer device, etc.
The output from the FIFO memory 2 can sufficiently correspond to the processing speed of the data receiving and receiving side. In other words, D
Only special applications require high-speed output that cannot be achieved without the use of PDRAM.

Embodiment FIG. 2 is a block diagram for explaining a dual port memory device according to an embodiment of the present invention.

In the figure, 23 is a color video camera equipped with a CCD image sensor, which sequentially captures images of the subject in each of the three primary colors (red-R, fi-G, blue-B) using filters (frame sequential method). It looks like this.

In this way, compared to the case where a color filter is applied to each pixel of the CCD image sensor to obtain R, G, and B image data in one scan, one point on a color screen is represented by a combination of three colors. Therefore, in the method of obtaining R, G, and B image data at the same time, the number of pixels becomes 1/3 of the original), and the aperture ratio of the CCD image sensor is improved.

The R2O and B image data from the video camera 23 are sequentially output for each color and digitized by the A/D converter 24. The digitized image data for each color is temporarily stored in the serial memory 21, and the data for the three primary colors on the same screen are simultaneously output from the serial memory 21. That is, in the serial memory 21, R,
Sequential-simultaneous conversion of G and B image data is performed. Digital image data that is continuously output from the serial memory 21 is converted into an analog signal by a D/A converter 25 and sent to a receiver 26 as a video signal. In the receiver 26, a color screen in which three colors, R, G, and B are combined, is obtained.

On the other hand, the output data line from the serial memory 21 is FIFO
It is also connected to an input terminal of a line memory 22 serving as a memory, and the digitized image data is also sent to the line memory 22. In this embodiment, a synchronizing signal generator 27 and a CPU 28 are connected to the line memory 22 in order to control the loading of data into the line memory 22. The synchronization signal generator 27 is controlled by the CPU 28 and sends an enable signal to the line memory 22 for writing data from an arbitrary position to the line memory 22, so that only necessary data is written to the line memory 22. The output from the line memory 22 is the CPL 128. It is output to the outside via the digital interface 29. In this way, arbitrary digital image data is extracted from the real-time image data from the video camera 23 together with the video signal for the screen.

[Effects of the Invention] As described above, the present invention uses a serial memory that stores image data in series and outputs it continuously, and a serial memory that stores image data in series and outputs it continuously, instead of a PDRAM that has a large number of pins and is expensive. The dual-port memory device is constructed using a FIFO memory that captures arbitrary image data and outputs it in the order in which it is captured, making it easy to control and eliminating the need for complex peripheral circuits, making the device more compact and reducing costs. You can try to lower it.

Such a dual port memory device of the present invention is suitably used, for example, when extracting arbitrary digital image data together with continuous image data for a screen from real-time image data obtained from a frame-sequential color camera.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the basic configuration of the present invention, FIG. 2 is a block diagram for explaining the present invention in detail, and FIG. 3 is a block diagram showing the conventional configuration. [Explanation of symbols of main parts 1.21... Serial memory 2... FIFO memory 22...
・・・・・・・・・Line memory 23・・・・・・・・・
...Video camera 24...A
/D converter 25......D/A converter 26......Receiver 27... Synchronous signal generator 28...
・・・・・・・・・・・・CPU

Claims (1)

[Scope of Claims] A dual port memory device having serial data output means for outputting continuous image data and random data output means for outputting arbitrary image data, wherein the serial data output means is configured to output an input image. It is equipped with a serial memory that stores data in series and outputs it continuously, and as the random data output means,
An FI that captures arbitrary image data among the image data output from the serial memory and outputs it in the order of capture.
A dual port memory device characterized by having FO memory.