JPH03230640A - Cell compositing equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to ATM (Asynchronous T
The present invention relates to a cell assembly device that assembles received ATM cells into frames handled at layer 2 or higher in transfer mode (transfer mode) communications.

[Prior Art] The following documents 1 and 2 can be cited as documents disclosing conventional techniques for assembling received ATM cells into frames in ATM communication.

Reference 1; Institute of Electronics, Information and Communication Engineers Technical Research Report 5SE88-
166 ``Study of rATM protocol processing method'' (Institute of Electronics, Information and Communication Engineers) Document 2; IEICE technical research report 5E87-87 ``Study of r wideband l5DN architecture'' (Institute of Electronics, Information and Communication Engineers)
Here, the above-mentioned document 1 describes in advance that information professionals
When decomposed into cells, ADP
A technique has been disclosed in which a header (abbreviated as ``ADP'') is created in advance and the resulting ADP header is used for assembly.

In this case, the cell type, effective information field length, etc. are set in the ADP header, and the cell type is used to distinguish between a first cell, an intermediate cell, a final cell, and one cell (one that fits within one frame). Ru.

Then, this ADP header and logical channel identifier (Vi
A frame is assembled by sending each cell to a buffer memory determined for each VCI using the rtual Channel Identifier (hereinafter abbreviated as VCI).

In the buffer for each VCI, the first cell of the cell type is placed at the beginning of the frame, after which intermediate cells are placed in the order in which the cells arrive, and when the last cell arrives, the frame includes the length of the effective information field of that cell. Complete assembly.

Note that, in the case of one cell that fits into a frame, the frame includes up to the effective information field length.

FIG. 2 is disclosed in Document 2 and shows the flow of information that enters the ATM network and is decomposed into cells.

In other words, frames #1 to #3, which are information blocks, are A
The signal enters the TM network N, is decomposed into cells, and each cell is transmitted over a transmission path in a multiplexed state. Each cell has a buffer memory BMI determined for each VCI.
-BM3, and are assembled into a frame in each of the two buffer memories BMI-BM3 according to the contents of the ADP header, and when the frame assembly is completed, the contents of each buffer are output as a frame to be handled at layer 2 or higher.

[Problems to be Solved by the Invention] However, in the conventional methods described in References 1 and 2, buffer memory for frame assembly is stored in each VCI in advance.
Since buffer memories are allocated and used for each VCI, there is a problem in that buffer memories are required for the number of VCIs, and the capacity of the buffer memory becomes large, which is uneconomical.

In addition, since the buffer memory that can be used to assemble frames is fixed for each VCI, even if there is an empty buffer, it cannot be used for different VCIs, and when assembling frames of the same VCI consecutively, There is also the problem that the next frame cannot be assembled until the previous frame is completely transmitted to the host device and the buffer of the VCI becomes empty, which increases the processing time.

Then, if you tried to assemble cells of the same VCI as the assembled frame while transmitting that frame, you would have to prepare two buffers for each VCI, which caused the problem of doubling the buffer capacity. .

The present invention has been made in view of the above-mentioned circumstances, and includes a buffer memory for assembling ATM cells into frames.
It can be set smaller than the number of CIs, and even if frames of the same VCI are assembled consecutively, the previous frame is completely transmitted to the higher-level device and its VCI is
It is an object of the present invention to provide a cell assembly device which eliminates the need to wait for assembly of the next frame until a CI buffer becomes empty, and which is excellent in economical efficiency and shortening of processing time.

[Means for Solving the Problems] A cell assembly device according to the present invention converts received ATM cells into V
It includes a cell assembling section that assembles a frame by sending each CI to a buffer memory, and a frame transmitting section that transmits the frame assembled by the cell assembling section to an upper layer.

The cell assembling unit then stores the V of the received ATM cell.
Equipped with a cell processing unit capable of extracting CI, a buffer memory having a capacity sufficient to assemble a plurality of frames, an empty buffer management unit for storing empty buffers that are not used for assembly in the buffer memory, and a VCI management unit. has been done.

The VCI management unit is configured to manage, for each MCI, whether or not it is already being assembled into a frame, and the buffer to be used during assembly.

When the cell processing unit extracts the MCI of the received cell, the VCI management unit checks whether or not the VCI is currently being assembled, and the VCI is currently being assembled in that cell or in the cell at the beginning of the frame. If not, the free buffer stored in the free buffer management section is allocated each time as a buffer for assembling a frame for that VCI.

[Function] In the cell assembly device according to the present invention, the VCI management unit manages for each MCI whether or not the cell is already being assembled, and the buffer used when the cell is being assembled, In addition, the empty buffer management section stores empty buffers in the buffer memory in which cells are to be assembled.

When the cell processing unit extracts the VCI of the received cell, the VCI management unit checks whether or not the VCI is being assembled, and if it is a new VCI that is not being assembled, the VCI An empty buffer stored in the empty buffer management unit is allocated as a buffer for assembling cells for the empty buffer.

Therefore, the buffer for assembling ATM cells into frames is not fixed in advance for each MCI, but is highly flexible and can be allocated on a case-by-case basis depending on the input and processing conditions. It is possible to set the number of buffer memories smaller than the number of VCIs, thereby increasing economical efficiency by reducing the capacity of the buffer memory.

Moreover, even when assembling frames of the same VCI consecutively, there is no need to wait until the previous frame has been completely transmitted to the higher-level device and the buffer of that VCI becomes empty before assembling the next frame. It is also possible to shorten the processing time.

[Embodiment] Fig. 1 is a block diagram showing an embodiment of the present invention, and shows a cell assembly section I that assembles ATM cells into a frame handled at layer 2 or higher, and a frame assembled in the cell assembly section I. It consists of a frame transmitting section (2) that transmits the frame to the higher-level device.

The cell assembly unit I includes a cell processing unit 1 and a VCI
Management section 2, empty buffer management section 3, and buffer selection section 4
, a buffer memory 5 , and a transmission queue 6 .

Here, the cell processing unit 1 performs ATM processing from the ATM layer.
When a cell is received, the VCI of the received cell is extracted. Then, the extracted VCI is transmitted to the VCI via the transmission line 8.
The cells are sent to the management unit 2, and the received cells are sent to the buffer memory 5 mentioned above via the transmission line 9.

The VCI management section 2 has a vC management memory M shown in FIG.

This VCI management memory M has a first data storage section D1 and a second data storage section D2 at each address A. The cell processing unit 1 is stored in the data storage unit D1 of 1.
The value of the "frame assembly flag" of the MCI sent from the MCI is stored, and the buffer number in the Nofa memory 5 is stored in the second data storage section D2. It looks like this.

Here, if the value of the first data storage unit D1 is “1”, it indicates that a frame is being assembled with the MCI in the buffer stored in the second data storage unit D2, and If the value of Di is “0”, the VCI
indicates that the buffer is not in use (ie, a frame is not being assembled).

Then, this VCI management section 2 receives the VC from the cell processing section 1.
When receiving I, the data in the first data storage section DI and the second data storage section D2 of the storage area corresponding to the VCI or address is read out. Then, the empty buffer management section 3 and buffer selection section 4 are notified of the value of the first data storage section D1 (that is, whether or not the received VCI is in frame assembly) via the transmission path 10. Also, the VC
When the frame is being assembled, the second data storage section D
2 (that is, the buffer number) is output to the buffer selection section 4 via the transmission line 11.

The empty buffer management unit 3 queues the empty buffer numbers in the buffer memory 5 in the FIF○ memory, and when a notification from the transmission path 10 or a frame is not being assembled, the empty buffer management unit 3 queues the empty buffer numbers in the buffer memory 5. buffer selection unit 4 via transmission line 12 in order from
Output to.

C, the F selector 4 determines that the value output to the transmission line 10 is
1'', the value of the transmission path 11 (that is, the buffer number during frame assembly) is notified to the buffer memory 5 via the transmission path 13, and the value output to the transmission path 10 is “Oo”.
In the case of o, the value of the transmission path 12 (that is, the number of the empty buffer) is notified to the buffer memory 5 via the transmission path 13.

The buffer number output to the transmission path 13 is detected by the VCI management unit 2 via the transmission path 2a, and is stored in the VCI management memory M.
"1" is written into the second data storage section D2 at that address, and "1" is simultaneously written into the first data storage section D1 at that address.

The buffer memory 5 sequentially writes cells sent from the transmission line 9 into the buffer of the buffer number notified from the transmission line 13, and assembles a frame.

When the frame assembly is completed, the buffer number is output to the transmission queue 6 via the transmission path 14, and the buffer number is output to the first data storage section D in the VCI management memory M for the VCI for which the frame assembly has been completed.
It is set to a value of 1 or 0'°.

The transmission queue 6 queues buffer numbers for which frame assembly has been completed in a FIFO memory,
As soon as the frame transmitting section (2) becomes free, it outputs the queued buffer numbers to the frame transmitting section H via the transmission path 16 in order from the first buffer number.

The frame transmitting unit (■) transfers the contents of the buffer with the buffer number input from the transmission path 16 to the upper layer as frame information, and when the transfer is completed, queues this buffer number in the FIF○ memory of the empty buffer management unit 3. do.

Next, a series of processing operations in the cell assembling unit I and the frame transmitting unit H will be explained based on the flowcharts shown in FIGS. 4 and 5.

As shown in FIG. 4, the operation of the cell assembling section I begins when a cell arrives at the cell processing section 1 (step 101
), the cell processing unit 1 extracts the VCI (step 102).
), and sends the extracted vcr to the VCI management section 2.

Then, the VCI management unit 2 determines whether or not the frame is being assembled by checking the "Frame assembly in progress" flag of the VCI (step 103). If it is determined that the frame is being assembled, the frame is assembled. Sends the buffer number in use to the buffer selection unit 4 via the transmission line 11 (
Step 104).

On the other hand, if it is determined that the frame is not being assembled,
The VCI management section 2 newly sets a "frame assembly in progress" flag for the VCI, and at the same time notifies the empty buffer management section 3 that the frame is not being assembled (step 105).

Upon receiving the notification that "frame is not being assembled", the empty buffer management section 3 selects an empty buffer in the buffer memory 5 and transmits the buffer number to the buffer selection section 4.

The buffer selection unit 4 monitors whether or not a frame is being assembled using the signal on the transmission line 10. If the frame is being assembled, the buffer selection unit 4 uses the buffer number notified from the VCI management unit 2, and if not, it uses the empty buffer management unit 3. The buffer number notified from is output to the buffer memory 5. Then, in the buffer memory 5, cells sent from the transmission line 9 are sequentially written using the buffer with the buffer number notified from the buffer selection section 4, and assembled into a frame (step 106).

The VCI management unit 2 monitors the signal output to the transmission line 13, and determines the buffer number output from the buffer selection unit 4 to the buffer memory 5 via the transmission line 13.
Register it as a buffer to be used for the VCI.

When assembly of the frame is started using the buffer number notified from the buffer selection section 4, it is determined whether or not assembly of the frame is completed (step 107).

When the assembly is completed, the buffer number is sent to the transmission queue 6, and the transmission queue 6 queues the sent buffer number and manages the VCI so that the frame assembly flag of the VCI at that time is dropped. 2 (step 108), and the process ends.

As shown in FIG. 5, the operation of the frame transmitter (2) is to first check whether a buffer number is queued in the transmission queue 6 (step 111), and when the frame transmitter (2) becomes vacant, the transmission queue is The frame containing the contents of the buffer with that number is sent to the upper layer in order from the first buffer number queued in
12).

When the transmission is completed, the buffer number is notified to the empty buffer management unit 3 as an empty buffer via the transmission path 17 (step 113), and the process is ended.

In such a cell assembly device, each buffer for assembling cells into frames is highly flexible and can be allocated on a case-by-case basis depending on the input situation and processing situation.
Compared to the conventional case in which a buffer is prepared for each VCI, the capacity of the buffer memory for assembling ATM cells into frames can be significantly reduced, thereby increasing economic efficiency.

Moreover, even when assembling frames of the same VCI in succession, there is no need to wait until the previous frame has been completely transmitted to the higher-level device and the buffer of that VCI becomes free before assembling the next frame. It is also possible to shorten processing time.

[Effects of the Invention] As is clear from the above description, in the cell assembly apparatus according to the present invention, the VCI management section can check for each VCI whether or not a cell is already being assembled, and whether or not the cell is being assembled. In addition, an empty buffer management section stores empty buffers in the buffer memory used for assembling cells.

When the cell processing unit extracts the VCI of the received cell, the VC management unit checks whether the VCI is being assembled or not, and if it is a new VCI that is not being assembled, the VCI is checked each time. An empty buffer stored in the empty buffer management unit is allocated as a buffer for assembling cells for the VCI.

Therefore, the buffer for assembling cells into frames is not fixed in advance for each VCI, but is highly flexible and can be allocated on a case-by-case basis depending on the input situation and processing situation. It is possible to set the number of buffer memories smaller than the number of VCIs, thereby increasing economic efficiency by reducing the capacity of the buffer memory.

Furthermore, even when assembling frames of the same VCI in succession, there is no need to wait until the previous frame is completely transmitted to the host device and the buffer of that VCI becomes empty before assembling the next frame. It is also possible to shorten the processing time.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is an explanatory diagram of a conventional cell assembly device, and Fig. 3 is a VC diagram of the above embodiment.
FIG. 4 is a flowchart showing the operation of the cell assembly section in one embodiment, and FIG. 5 is a flowchart showing the operation of the frame transmission section in one embodiment. I...Cell assembly unit, 1...Cell processing unit, 2...VCI management unit, 3...Empty buffer management unit, 4...Buffer , file selection section, 5...buffer memory, 6...transmission queue ■...
...Frame transmitter, M...VCI management memory,
Dl...first data storage section, D2...second data storage section.

Claims (1)

[Scope of Claims] A cell assembly unit that assembles received ATM cells into a frame by sending them to a buffer memory for each VCI;
A cell assembling device comprising: a frame transmitting section that transmits the frame assembled by the cell assembling section to an upper layer; a buffer memory having a capacity sufficient to assemble a plurality of frames; a VCI management unit that manages, for each VCI, whether or not it is already being assembled into a frame, and the buffer to be used during assembly; and the buffer. and an empty buffer management unit that stores empty buffers that are not being used for assembly in the memory, and when the cell processing unit extracts the VCI of the received cell,
The VCI management unit checks whether the VCI is currently being assembled, and if the cell is the first cell of the frame and the VCI is not being assembled,
A cell assembly apparatus characterized in that each time, an empty buffer stored in the empty buffer management section is allocated as a buffer for assembling a frame for that VCI.