JPH03230792A - Brushless motor driving gear - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a brushless motor drive device without position detection means for detecting the position of a rotor of a motor.

BACKGROUND OF THE INVENTION In recent years, brushless motors have been used in drive devices for video and audio equipment, as well as OA equipment such as floppy disks and hard disks. The mainstream of these brushless motors is a two-phase or three-phase half-wave drive system or full-wave drive system, but these types of brushless motors generally have a Hall element or other device that detects the position of the rotor. A position sensing element is required.

In the past, many attempts have been made to eliminate the position detection element, and in Japanese Patent Publication No. 56-33953 (hereinafter referred to as Document 1), the first was to use the output signal of a three-phase multivibrator for self-propulsion. After switching the energization state to each phase winding and rotating the rotor: (Using the power generation waveform that appears in the winding that is not energized among the stator windings of the phase, A drive circuit configured to switch the energization state is shown.

Problems to be Solved by the Invention However, in the device shown in Document 1, current switching to each winding is performed abruptly, and as a result, unnecessary vibrations, noise, and electrical noise due to surge pulses are generated. There is an inconvenience. To solve this problem, capacitors are sometimes connected to each phase winding, but in this case, multiple capacitors of relatively large capacity are required, resulting in inconveniences such as an increase in the number of parts and an increase in the mounting area. do.

In addition, in Japanese Patent Application Laid-open No. 60-226788 (hereinafter referred to as Document 2), one position detection element is used, but the output signal of the logic circuit is sloped by a capacitor, and this is used to apply a slope to each winding. A technique for smoothing current switching is shown, but in the device shown in this document 2, the time of the slope portion of the current to each winding is constant regardless of the rotation speed, but it changes depending on the rotation speed of the motor. Since the electrical angle of the slope portion of the current to each winding changes, there is a disadvantage that the effect of smoothing the current switching to each winding is not constant.

In view of the above-mentioned problems, the present invention has been developed in a brushless motor without a position detection means, by smoothly switching current to each winding at a constant conduction angle regardless of the motor rotation speed, eliminating the need for a large capacitor, and reducing noise. It is an object of the present invention to provide a brushless motor drive device with less vibration.

Means for Solving the Problems A brushless motor drive device of the present invention includes a multi-phase motor drive coil, a plurality of drive transistors connected to the drive coil, and command signal generation means for generating a motor torque command signal. a distribution means for sequentially distributing the output signal of the command signal generation means to the plurality of drive transistors using a distribution signal; and a slope signal generation means for generating a slope signal for smoothing the rise and fall of the distribution signal. , voltage-controlled oscillation means for inputting a signal of an appropriate frequency to the distribution means and the slope signal generation means, and a phase difference between the back electromotive force generated in the drive coil and the distribution signal during the non-energization period of the drive coil. The present invention is characterized by comprising a phase error detection means for detecting the phase error detection means, and an error amplification means for amplifying the output of the phase error detection means and inputting it to the voltage controlled oscillation means.

According to the present invention, the command signal generating means generates a torque command signal for the motor, the distributing means sequentially distributes the output signal of the command signal generating means to the plurality of drive transistors according to the distribution signal, and the slope signal generating means distributes the output signal of the motor. A slope signal that smooths the rise and fall of the signal is generated, the voltage controlled oscillation means inputs a signal of an appropriate frequency to the distribution means and the slope signal generation means, and the phase error detection means detects the period when the drive coil is not energized. The phase difference between the back electromotive force generated in the drive coil and the distribution signal is detected, and the error amplification means amplifies the output of the phase error detection means and inputs it to the voltage controlled oscillation means.

Therefore, the motor can be driven without a position detection means, and the current can be smoothly switched to each winding at a constant energization angle regardless of the motor rotation speed, so from startup to steady rotation. It is possible to constantly reduce noise and vibration.

Examples Examples of the present invention will be described below with reference to the drawings.

FIG. 1 shows a circuit diagram of a brushless motor drive device according to an embodiment of the present invention. Here, as a preferred example of application of the present invention, an example of a three-phase full-wave current-driven brushless motor drive device will be shown. In the figure, l, 2.3 are motor drive coils, 10.11.12, and 13.14.1
Reference numerals 5 and 5 designate a discharge side and a suction generating force transistor, 20 a phase error detector as an example of phase error detection means, 30 an error amplifier as an example of error amplification means, 4
0 is a voltage controlled oscillator as an example of voltage controlled oscillation means,
50 is a logic circuit that synthesizes signals for controlling each block using the signal output from the voltage controlled oscillator 40 as a clock, and 70 is a distribution circuit as an example of distribution means that sequentially distributes the drive signal to the drive transistors from the distribution signal ζ. , 60 is a slope signal generation circuit as an example of a slope signal generation circuit that generates a sub-signal for smoothing the rise and fall of the distribution signal, and 80 is a command signal generation means for generating a torque command signal for the motor. A command signal generation circuit as an example; 100 is a discharge generation power transistor control circuit that generates a signal to drive the discharge generation power transistor; 90 and 91 are amplifiers that respectively provide base currents of the discharge side and suction generation power transistors;
81 is a resistor for current detection.

FIG. 2 is a diagram for explaining the operating principle of the present invention, and shows the phase relationship between the drive coil back electromotive force and the drive coil energization waveform. FIG. 2(a) shows the case where the phase relationship between the back electromotive force (broken line) and the current wave meter (solid line) is in an optimal state, and FIG. 2(b) and (c) show the phase angle ψ The figure shows the case where the condition deviates from the optimum condition. Here, in FIG. 1, the output of voltage controlled oscillator 40 is transmitted to drive coils 1-3 through slope combiner 60, distribution circuit 70, and drive transistors 10-15. Therefore, a certain phase relationship exists between the output of the voltage controlled oscillator 40 and the energization waveforms of the drive coils 1 to 30.

That is, by controlling the oscillation frequency and phase of the voltage controlled oscillator, it is possible to control the phase difference between the drive coil back electromotive voltage and the drive coil energization waveform. Therefore, as shown in Fig. 2 (b) and (C), if a phase angle ψ deviation occurs between the drive coil back electromotive force and the drive coil energization waveform, the phase error ψ is calculated as 1i2 phase error. By providing a phase control loop that detects and amplifies the detection using the detector 20 and the error amplifier 30 and controls the oscillation frequency and phase of the voltage controlled oscillator 40 so that ψ becomes zero, optimal energization as shown in FIG. 2(a) can be achieved. It becomes possible to secure the state and the motor is driven.

A concrete configuration of this phase error detector 20 may be, for example, as shown in FIG. 3.

In FIG. 3, parts having the same functions as those in FIG. 1 are given the same symbols. That is, one end AI of the drive coil l, 2.3,
A2 and A3 are respectively input to the buffer circuit 21.22.23, and the output A of the buffer circuit 21.22.23 is
l [I, A2e, A3θ are each resistance 24.25.2
6, and the common connection point No. is the inverting input terminal of the comparison circuit 100, 120, 140 and the comparison circuit 1.
10.130.150 is connected to the non-inverting input terminal.

The output Al11 of the buffer circuit 21 is connected to the comparison circuit 1.
00 and the inverting input terminal of the comparison circuit 110, and the output A21I of the buffer circuit 22.
is connected to the non-inverting input terminal of the comparator circuit 120 and the inverting input terminal of the comparator circuit 1300, and the buffer circuit 2
The output A3II of No. 3 is connected to the non-inverting input terminal of the comparison circuit 140 and the inverting input terminal of the comparison circuit 150. The comparison circuit 100, 110.120.130.1
Each output of 40.150 is a transistor 101.111
．． 121.131, 141.151, and the transistor 101.11L
The collectors of 12L 131, 141, and 151 are commonly connected to the collector of transistor 161, and form the 1q phase error detector output PD.

The base of the transistor 161 is the transistor 162
It is connected to the base and collector of the transistor 164 and to the collector of the transistor 169 which operates as a constant current source. A stabilized power supply voltage Vreg is applied to the emitter of the transistor 162 via a resistor 163, and the transistors 161 to 16
The stabilized R voltage Vreg is applied to the emitter of 4. The base of the transistor 164 is connected to the resistor 16.
6 and the collector of a transistor 167 whose emitter is grounded through a resistor 165. The base of the transistor 1670 is connected to the output SlI of the logic circuit 60 via a resistor 168. Other outputs of the logic circuit 60 1] 1, Ul
, D2, U2, D3, U3 each have a resistance of 171.17
Transistor 170.172.174.17 with emitter common through 3.175.177.179.181
6.178.180, said transistors 170.172.174.176.17B, 18
0 are connected to the transistors 101 and 1, respectively.
It is connected to each base of 11.121, 131, 141.151.

Regarding the phase error comparator 20 configured as above,
The operation will be explained below.

FIG. 4 is an explanatory diagram of the operation, and shows how a phase error is detected between the back electromotive voltage and the energization waveform with respect to the drive coil l. In Figures 1, 3, and 4,
The drive coil 1 is energized with signals H1 and Ll synchronized with the output f of the voltage controlled oscillator 40 as energization command signals.

Therefore, a period in which neither Hl nor Ll is output is a energization suspension period, and during this period, the drive coil energization waveform AI matches the back electromotive force el. According to Figure 4, the power-off period is Hl.
The period from when Ll becomes LOW level until the rise of Ll corresponds to two clocks of f. Similarly, there is a power-off period in the period from when Ll goes to LOW level until Hl rises, but for the sake of simplicity,
Consider only the former month of viewing.

During the power-off period, the neutral point voltage of each drive coil N8
Comparing the drive coil energization waveform AI and A1, when the phase difference ψ between A1 and the drive coil back electromotive force e1 is zero, N8 and AI are at the center of the energization suspension period, that is, when TI is at the LOW level, f becomes Matches after σ. Also, AI
When delayed by the phase difference ψ, NlI and AI are Hl
If they match before one clock of f after becomes LOW level, and AI advances by phase difference ψ with respect to el, then N
8 and AI match one clock after f after Ll goes to LOW level. Therefore, the phase relationship between A1 and el can be known by comparing AI and Nθ after l clocks of r after Ll becomes LOW level. Therefore, as a method for detecting the phase difference ψ, a phase error detection pulse signal D1 having an appropriate width is generated based on l clocks after I(l becomes LOW level), and only when D1 is generated, NlI By comparing AI with
Da+ can be obtained. In Figure 4, DI is f based on one clock of f after Hl becomes LOW level.
This shows the case where AI advances by a phase angle ψ with respect to el.

As described above, with respect to the energization waveform AI of the drive coil 1, Hl is L
We have explained the operating principle of detecting the phase difference ψ using the energization suspension period from when the OW level is reached until Ll rises. ) until Hl rises, and other drive coil 2.30 energization waveform A2,
A3 can also be detected in the same way, and in this embodiment, by combining all of these, the phase error detector output PD
I am getting .

As described above, a phase error signal between the output of the voltage controlled oscillator 40 and the back electromotive force generated in the motor drive coils 1 to 3 is output, and this phase error signal is sent to the error amplifier 30.
By configuring a loop in which the voltage is amplified and then fed back to the voltage controlled oscillator 40, the phase of the output of the voltage controlled oscillator 40 and the back electromotive force generated in the motor drive coils 1 to 3 can be matched, and the voltage So-called sensorless driving can be performed by controlling the energization of the motor drive coils 1 to 3 from the output of the control oscillator 4o.

Now, in the present invention, the electrical angle of the slope portion of the current supplied to the motor drive coils 1 to 3 is adjusted to This makes it possible to drive the Ohara knob which is constant regardless of the rotational speed of the motor, and this part will be explained below.

FIG. 5 shows waveforms at various parts when the output of the voltage controlled oscillator 4o and the back electromotive force generated in the motor drive coils 1 to 3 are phase synchronized. In the figure, f is the output signal of the voltage controlled oscillator 4o (a), f/2 and f/4 are the signals obtained by dividing the frequency by 1/2.1/4 (b), (c), respectively.
, NSI, NOI, NEl, Psi, poi, PEI are signals (d), (e), (f) synthesized by logic circuits.
, (g), (h), (i) are No. 18 for synthesizing the distribution signal that controls the supply current to the first phase of the motor drive coil, and DI, Ul (j), (k ) is a signal that specifies the period for outputting the phase error at the rise of the back electromotive force of the first phase of motor drive coils 1 to 3, and a signal that also specifies the period for outputting the phase error at the rise. be.

FIG. 6 shows an example of the circuit configuration of the voltage controlled oscillator 40.

In the figure, 431 is a DC power supply, 401 is an error amplifier 3
a voltage-current converter that converts an output voltage EAO of 0 to a current;
400 is a current source for operating the oscillator when there is no output voltage of the error amplifier 30; 402.403.404.
405 is a transistor forming a current mirror that receives the output current of the voltage-current converter; 410 is a capacitor that is charged and discharged by the output current of the current mirror and generates a sawtooth voltage at both ends; Reference voltage source, 428.429 is a resistor and current source that determines the oscillation amplitude,
41B and 419 are transistors forming a comparator. The oscillation frequency is (■f+Irn1n)/(21
v·Rv-C), and as a result, a rectangular wave signal with a frequency proportional to the output voltage EAO of the error amplifier 30 appears at the collector of the transistor 424, and this signal is input to the logic circuit 50 as a clock signal. Furthermore, since the baselines of the transistors 403, 404, and 405 serve as a common baseline for supplying a current that determines the oscillation frequency of the voltage controlled oscillator 40, they are input to a slope signal generation circuit 60, which will be described later.

FIG. 7 is a diagram showing a specific example of the circuit configuration of the slope signal generation circuit 60. In FIG. 7, 40 is a voltage controlled oscillator, 50 is a logic circuit, 237 is a capacitor at both ends of which a slope signal appears, and 240 is an operational amplifier circuit.

A signal A shown in FIG. 5, that is, a rectangular wave having a frequency of 1/40 of the output signal of the voltage controlled oscillator 40, is input to the transistor 231, and when A is H[(, H(7), the capacitor 11237 is charged with the current If. When A is LOWO, it is discharged with a current of 41f.As a result, the capacitor 237 has V as shown in FIG.
A sawtooth waveform like s w (1) appears. Since 240 is an operational amplifier circuit, the voltage Vsw at one end of the resistor 242
The same voltage as in Fig. 7(b) is generated, and l5w1, l5w
2 is a current resulting from voltage-current conversion of Vsw by the operational amplifier circuit 240 and Rsw.

In this way, a slope signal having the same frequency as the output signal of the voltage controlled oscillator 40 is synthesized, and this signal can be used to supply a trapezoidal wave current to the motor.

FIG. 8 shows an example of the circuit configuration of a distribution signal generation circuit that synthesizes distribution signals for this purpose, FIG. 9 shows an example of the circuit configuration of a distribution circuit, and FIG. 10(a) shows a distribution signal generation circuit. FIG. 1(b) is an explanatory diagram of the operation of the distribution circuit.

In FIG. 8, Ipl, Ip2, and Ip3 are distribution signals for controlling the first-phase, second-phase, and third-phase drive transistors, respectively. If the direction of input into the distribution signal generating circuit shown in FIG. There is. The distribution signals 1pl, In2, and In3 are l5 in Fig. 8.
It is synthesized by adding and subtracting w1, l5w2, Iol, and Io2 at the timing controlled by the output signal of the logic circuit. For example, for a positive signal of I I)], Nol is H[
GH period 1o2 is output, and NSI is HI on that signal.
G H period 1 s w 2 is added, NEI is HIG
The period 1 of H is 1, which is synthesized as a result of subtracting 1. Here, the period when NSI is [IIGH and the period when NEI is HIGH are the rising and falling periods of the current of the first phase sink output transistor, respectively, and in this way, the rising and falling edges of the distribution signal are A sloped section is provided at the bottom. Further, a transistor 340 is inserted so that a current in the reverse direction does not flow during a period when Ipl outputs a positive signal. Here, the time when 1 pl occurs is the conduction angle, but the start of the rise is determined by NSI, and the timing of the fall of 0 is determined by Io2 and I
Since this is the timing when s w 1 becomes equal, [o
The relative relationship between the size of 2 and l5w1 is iI! Affects I electric angle. Considering this point, Io2 is a constant current, while 15w1 is Vsw/Rsw, that is, it is proportional to the amplitude of Vsw, whereas Vsw is the charging/discharging current of the voltage controlled oscillator 40, which is inversely proportional to the oscillation frequency of the voltage controlled oscillator 40. The signals A and I! are obtained by dividing the clock by II. Since the signal is synthesized by charging and discharging a capacitor for a period controlled by a signal whose period is inversely proportional to the oscillation frequency of the voltage-controlled oscillator 40, the amplitude is a constant value that does not depend on the oscillation frequency of the voltage-controlled oscillator 40. become. Therefore, by appropriately selecting the values of each resistor, capacitor, and io2 in advance, the time at which tpt occurs, that is, the conduction angle, can be set to a constant value. Also, the negative signal of Ipl is Pol
outputs a HIGH period 1o1, adds a HIGH period 1sw1 of PSl to that signal, and PEI outputs a HIGH period 1o1.
This is a signal synthesized as a result of subtracting the GH period 15w2. Similarly, a transistor 341 is inserted to prevent current from flowing in the reverse direction during a period when Ipl outputs a negative signal. The Ipl waveform synthesized in this way is shown in Figure 5 (
m). Positive and negative distribution signals of In2 and In3 (fifth
Figures (n) and (0)) are also synthesized in a similar process. FIG. 8 shows an example of a circuit configuration for performing the above distribution signal synthesis process. FIG. 10(a) is a timing chart showing the process of the above processing. In FIG. 10(a), No. 1. No. 2 and No. 3 are output signals ((g), (h), (I)) of logic circuits for turning on the output transistors on the suction side of the first, second, and third phases, respectively.
, Pol, Po2, and Po3 are the output signals ((j), (k), (1)) of the logic circuit for turning on the output side output transistors of the first phase, second phase, and third phase, respectively.
N5INS2. NS3 is the output signal ((a), (c) of the logic circuit that specifies the rising period of the current of the first, second, and third phase sink-side output transistors, respectively.
, (e)), PSl, PS2, and PS3 are the first
The output signals ((b), (d), ([)), NEiNE2, and NF2 of the logic circuit specifying the rising period of the current of the output transistor on the output side of the phase, second phase, and third phase are Logic circuit output signals ((C), (e), (a)), PEI, P that specify the fall period of the current of the 1st, 2nd, and 3rd phase sink-side output transistors
E2 and PE3 are output signals ((d), (f), (・b
)).

The distribution signals are synthesized as described above, but the distribution signal 1p
The waveform of LIp2.1p3 has whiskers as shown in FIG. 10(b). FIG. 9 ζ shows an example of the configuration of a distributor that distributes the output current to each phase ζ so that such a whisker does not appear in the output current. In the same figure, 352 and 353.3
54 and 355.356 and 357 are transistors that logarithmically convert the distribution signals 1pl, In2, and In3, which are current signals, and convert them into voltage ζ, and 350.351 is a transistor 352.353.354.355.356゜35
A resistor that provides an appropriate bias voltage to the base of 7, 35
8.360.362 is a signal In which inputs the logarithmically converted voltage to the base and drives the suction generating power transistor.
Transistor that distributes to each phase, 35≦1.361.3
63 is a transistor for distributing the signal ip for driving the discharge generating power transistor to each phase; 71.72 is 'f4. The current amplifier, 10111.12 is an output creation power transistor, and 13.14.15 is a sink creation power transistor.

FIG. 10(b) shows the distribution signal rp1. FIG. 2 is an explanatory diagram of the operation of the distribution circuit when tp2 is positive, and is a diagram showing how the distribution signal is switched from II)1 to ip2.

In Figure 1O(b), (when p2 is zero, I n
== r 358 However, the following equation holds true during switching.

V l) e 353 = (kT/q) * 1 rt(I I) 1/I s
l) (1) Vbe355 = (kT/q) terminal In (i p2/I s l)
(2) Vbe358 = (1<T/(1)*Itt(135B/I s2)
(3) Vbe360 = (kT/q)*In(1360/l52) (4
) where Vbe353, V I) e 355, Vbe
358, Vbe360 are transistors 353.355.
358.360 base-emitter voltage, 1 (is Boltzmann constant, T is absolute temperature, q is electron charge, Isl, [
s2 are the saturation currents of transistor 353.355 and υtransistor 358.360, respectively. Also, since Vbe353-Vbe355'=Vbe35B-VI)e360, from equations (1), (2), (3), and (4), (135B/1360) = (Ipl/Ip2)
holds true, and since 135B+I 360=I n , when the distribution signal switches from Ipl to ip2, in is distributed in the ratio of II) 1 and Ip2,
Furthermore, it can be seen that when a whisker occurs in the distribution signal of a certain phase, the distribution signals of other phases are always zero, so that the influence of the whisker of the distribution signal does not appear on the signal after distribution.

Effects of the Invention As described above, according to the present invention, the motor can be driven without a position detection element by configuring the phase control loop so that the motor drive coil and the distribution signal maintain a constant phase relationship. In addition, current can be smoothly switched to each winding at a constant conduction angle regardless of the motor rotation speed, reducing noise and vibration, and eliminating the need for large-capacity capacitors, which were previously required. Therefore, it is possible to realize a brushless motor drive device with a small number of parts and excellent characteristics.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a brushless motor drive device according to an embodiment of the present invention, Fig. 2 is a diagram explaining the operating principle of the embodiment, and Fig. 3 is a concrete diagram of a phase error detector of the embodiment. The circuit diagram, FIG. 4 is an explanatory diagram of the operation of the same embodiment, and FIG.
6 is a specific circuit diagram of the voltage control excavator of the same embodiment. FIG. 7 is a specific circuit diagram of the slope signal generation circuit of the same embodiment. 9 is a specific circuit diagram of the distribution signal generating circuit of the same embodiment, FIG. 9 is a specific circuit diagram of the distributor of the same embodiment, and FIG. 1θ is an operation explanatory diagram of the circuit of FIG. 9. 1-3... Drive coil, 10-15... Drive transistor, 20... Phase error detection means, 3o... Error amplification means, 40... Voltage controlled oscillation means, 50... Logic means , 60... slope signal generating means, 70...
Distribution means, 80... Command signal generation means, 90-91.
...Amplification means.

Claims (3)

[Claims] (1) A multi-phase motor drive coil, a plurality of drive transistors connected to the drive coil, a command signal generation means for generating a motor torque command signal, and a distribution signal for the output signal of the command signal generation means. a distribution means for sequentially distributing signals to the plurality of drive transistors; a slope signal generation means for generating a slope signal that smooths the rise and fall of the distribution signal; and a slope signal generation means suitable for the distribution means and the slope signal generation means. voltage-controlled oscillation means for inputting a frequency signal; phase error detection means for detecting a phase difference between a back electromotive voltage generated in the drive coil and the distribution signal during a non-energization period of the drive coil; and the phase error detection means. A brushless motor drive device comprising error amplification means for amplifying the output of the means and inputting it to the voltage controlled oscillation means. (2) The brushless motor drive device according to claim 1, wherein the slope signal generating means outputs a signal whose slope portion and frequency are controlled by the voltage controlled oscillation means. (3) The distribution means includes a distribution signal generation means for synthesizing a signal obtained by frequency-dividing the output signal of the voltage controlled oscillation means and the slope signal to obtain a trapezoidal wave-like distribution signal, and a distribution signal generating means for generating a trapezoidal wave-like distribution signal, and converting the distribution signal into a current. a voltage-to-current conversion means to convert; a plurality of diodes each having an anode terminal connected to the output thereof and a common cathode terminal; and a plurality of diodes having anode terminals each connected to a base and emitters commonly connected. 2. The brushless motor drive device according to claim 1, further comprising a plurality of transistors having a plurality of transistors, the output signal of the command signal generating means being input to a common emitter of the plurality of transistors.