JPH03244149A - Lead frame - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame used in manufacturing a semiconductor device that requires high speed and high power consumption, and particularly relates to the structure of an inner lead.

[Conventional technology]

A conventional lead frame of this type will be explained with reference to FIGS. 9 and 10.

FIG. 9 is an enlarged plan view of the inner lead portion of the conventional lead frame, and FIG. 1O is an enlarged plan view of the inner lead portion of the conventional lead frame after wire bonding. In addition, since conventional lead frames are approximately symmetrical about the center part in the width direction,
In FIGS. 9 and 10, only one side of the lead frame is shown. In these figures, ``■'' is a die pad on which a semiconductor element 2 is mounted, and this die pad 1 is connected to an outer frame (not shown) of a lead frame via a suspension lead 3. Reference numeral 4 denotes an inner lead wire-bonded to an electrode pad (not shown) of the semiconductor element 2 via a wire 5. This inner lead 4 is an external lead (
(not shown), and a large number of them are arranged around the dice pad 1. The lead frame with the bottom of the tank is generally integrally formed of Fe--Ni alloy or Cu alloy, and the surface of the inner lead 4 is plated with Ag. Note that 6 is a support tape for fixing the inner lead 4.

Next, a procedure for assembling a semiconductor device using the above-mentioned lead frame will be explained. First, the semiconductor element 2 is fixed onto the die pad 1 with solder or resin. An active circuit is integrated inside this semiconductor element 2, and All,
Mutual wiring is carried out by the following, and electrode pads are provided at the ends of the mutual wiring for exchanging external signals with these circuits. Then, wire bonding is performed between the electrode pad and the inner lead 4 using the wire 5. This wire 5 is made of Au or Cu. In the wire bonding method, first, heat is applied to the wire at the tip of the capillary chip through which the wire is passed to form a metal ball, and the metal ball is pressurized and plastically deformed, and then bonded to All-Au using heat and vibration energy. Alternatively, All-Cu alloy bonding is performed.

Next, the wire is pulled out from the tip of the capillary chip and moved to the inner lead side, and then the Ag-Au
Alternatively, Ag-Cu alloy bonding is performed. After that, the wires are torn off to complete the wiring. After performing wire bonding in this manner, the semiconductor element 2. A semiconductor device is obtained by sealing the inner leads 4, wires 5, etc. with a resin such as epoxy resin, and cutting the external leads (not shown), suspension leads 3, etc. from the outer frame of the lead frame.

[Problem to be solved by the invention]

However, since conventional lead frames are bottomed in this way, especially in integrated circuits such as gate arrays, V
The ratio of cc (power supply voltage) pins and Vss (ground voltage) pins accounts for 20 to 30% of all pins, and as the number of bins increases, the lead width becomes narrower and the lead inductance increases. . As a result, Vcc or Vs
The voltage of s becomes unstable, and a type of power supply noise called bounce occurs, causing malfunction. Also,
Since a phase delay occurs in the signal, it becomes impossible to transmit accurate signals at high speed.

In addition, the power supply system pins of Vcc and Vss are connected to the semiconductor element 2.
These cannot be combined because they are arranged at positions corresponding to the electrode pads. Therefore, in order to fit into a package with a standardized number of lead bins, it may be necessary to use a slightly larger package (with a large number of bins). In such cases, the number of bins may not match and the NC This was uneconomical as pins were generated.

Furthermore, due to the support tape 6 that suppresses the flapping of the inner leads 4, deterioration of electrical characteristics such as crosstalk due to leakage and deterioration of moisture resistance are likely to occur, resulting in lower reliability.

Furthermore, in semiconductor devices formed using conventional lead frames, due to increased power consumption due to higher speeds and higher integration, the semiconductor element 2 becomes hot during operation, causing malfunctions. It was unreliable because it caused a lot of problems. Therefore, it was necessary to create a package structure with high heat dissipation.

[Means to solve the problem]

The lead frame according to the first aspect of the present invention is formed wide along the side of the die pad between the die pad and the inner lead, and is integrally provided at the tip of the inner lead of the power supply system among the inner leads. A power source electrode of a semiconductor element is wire-bonded to one of the power source wire pad and the die pad, and a ground electrode is wire-bonded to the other.

The lead frame according to the second aspect of the present invention has a power supply wire pad formed wide along the side of the gusset between the die pad and the inner lead. , a power wire pad that is integrally provided at the tip of the inner lead for power supply among the inner leads and wire-bonded to the power supply electrode of the semiconductor element, and a wire pad for power supply that is integrally provided at the tip of the inner lead for grounding among the inner leads. and a grounding wire pad that is wire-bonded to the grounding electrode of the semiconductor element, and these are arranged inside and outside.

[For production]

In the lead frame according to the present invention, all the power supply system electrode pads of the semiconductor element are wire-bonded to the power supply system wire pads, and the power supply inner lead and the grounding inner lead can be respectively aggregated by the power supply system wire pad 7. can. Therefore, the total number of pins of the package can be reduced, and the inductance can be reduced because the pad area of the power supply wire pad is wide.

Also, since the wire connected to the signal inner lead passes over the grounding wire pad, after resin sealing, the relationship between this wire and the grounding wire pad is effectively changed as the space between the two is filled with sealing resin. It has a stripline structure. This allows impedance matching and reduces inductance. Furthermore, by forming the die pad in the lead frame according to the first aspect of the invention to be sufficiently wider than the semiconductor element, it is possible to improve heat dissipation.

〔Example〕

Hereinafter, the first invention according to the present invention will be explained in FIGS. 1 to 3 (
This will be explained in detail using examples shown in a) and (b).

1 is a plan view showing an enlarged main part of a lead frame according to a first aspect of the present invention; FIG. 2 is a plan view showing a state in which wire bonding has been performed on the lead frame shown in FIG. 1; 3(a) and 3(b) are diagrams showing the wire bonding state, where (a) is a sectional view taken along the line A-A in FIG. 2, and FIG. FIG. Note that since the lead frame according to the present invention is approximately symmetrical about its widthwise central portion, only one side of the lead frame is shown in FIGS. 1 and 2.

In these figures, the same or equivalent members as those explained in FIGS. 9 and 10 are given the same reference numerals, and detailed explanations will be omitted. In these figures, 1■
indicates a power supply system wire pad, and in this embodiment, an example in which this wire pad 11 is used particularly as a power supply voltage wire pad (hereinafter simply referred to as a Vcc wire pad) will be described. This Vcc wire pad 11 is
They are formed wide along the sides of the die pad 1, and are arranged between the die pad 1 and the inner leads 4 on four sides of the die pad 1. Further, this Vcc wire pad 11 is integrally provided at the tip of a power supply inner lead 4a of the inner lead 4, and is supported by this power supply inner lead (hereinafter referred to as Vcc inner lead) 4a. It is composed of In this embodiment, the number of Vcc inner leads 4a supporting the Vcc wire pad 11 is three when placed on the long side of the die pad 1, and two when placed on the short side of the die pad 1. It is said that Also,
Although this embodiment shows an example in which a plurality of signal inner leads 4 are arranged between the Vcc inner leads 4a, it is also possible to form the Vcc inner leads 4a wide and consolidate them into one lead.

Note that 4b indicates a grounding inner lead (hereinafter, this 0 is referred to as a Vss inner lead). The die pad 1 used in this embodiment is set so that its width and length are sufficiently larger than those of the semiconductor element 2.

Reference numeral 12 denotes a groove for preventing the die bonding brazing material for mounting the semiconductor element 2 on the die pad 1 from flowing out of the necessary range.
It is formed by half-etching the semiconductor element mounting surface along the outer circumferential shape of the semiconductor element 2 in a rectangular shape in plan view.

In the lead frame bottomed in this manner, the plurality of Vcc (power supply voltage) electrode pads of the semiconductor element 2 and the Vcc
C-wire pad 11 is wire-bonded with the wire 5, and the plurality of Vss (ground voltage) electrode bands of the semiconductor element 2 and the die pad 1 are wire-bonded with the wire 5. 4b is also wire-bonded by the wire 5. That is, the Vcc electrode pad is electrically connected to the Vcc inner lead 4a via the wire 5 and the Vcc wire pad 11, as shown in FIG. 3(a). In addition, the Vss electrode band is
As shown in FIG. 3(b), the wire 5. Dice pad 1
and the Vss inner lead 4b via the wire 5 in sequence.
will be electrically connected to. Note that when the Vss inner lead 4b is placed near the suspension lead 3 that supports the die pad 1, the suspension lead 3 and the Vss inner lead 4b are wire bonded to each other as shown in FIG. It is also possible to conduct.

In the lead frame bottomed in this way, Vc
A power supply system wire pad is connected to the bottom of the tank by the c wire pad 11 and the die pad l. Then, by wire-bonding the plurality of Vcc electrode bands of the semiconductor element 2 to the nearest VCC wire pads 11, and wire-bonding the plurality of Vss electrode bands of the semiconductor element 2 to the die pad 1, the Vcc inner lead 4
a, Vss inner lead 4b can be aggregated, and Vss
Compared to the number of cc electrode pads and Vss electrode pads, Vcc
The number of inner leads 4a and Vss inner leads 4b can be reduced.

Therefore, the total number of pins of the package can be reduced, and the pad area of the power supply wire pad (Vcc wire pad 11, die pad 1) can be widened, so that inductance can be reduced. Moreover, the wire 5 connected to the signal inner lead 4 is
Since it passes over the die pad 1 which has the same potential as the Vss electrode pad, after resin sealing, the relationship between the wire 5 and the die pad 1 is that the space between the two is filled with a sealing resin such as epoxy resin, and the relationship between the wire 5 and the die pad 1 is essentially It has a stripline structure. For this reason,
Impedance matching is enabled and inductance is reduced. Furthermore, since the die pad 1 is formed to be sufficiently wider than the semiconductor element 2, the heat generated by the semiconductor element 2 can be easily dissipated, and furthermore, since the inner leads 4 are shortened, the support that was conventionally required can be reduced. No need to use tape.

In the above embodiment, the die pad 1 has a concave groove 1 in order to prevent die bonding brazing material from flowing out on the die pad 1.
Although the example in which slits 2 are provided has been shown, a structure in which slits are provided in the die pad 1 may be adopted as shown in FIG.

FIG. 4 is a plan view showing another embodiment of the die pad in the lead frame of the first invention. In the same figure, the same or equivalent members as those explained in FIG. Detailed explanation will be omitted. In FIG. 4, 13 is a slit for suppressing the outflow of die bonding brazing material, and this slit 13 is formed at a portion of the die pad 1 corresponding to the four sides of the semiconductor element 2.
The portion surrounded by the slit 13 (semiconductor element mounting portion) is connected to the outer portion by an inner hanging pin 14.

Further, in this embodiment, when the Vss inner lead 4b is placed near the die pad hanging lead 3, the hanging lead 3 and the Vss inner lead 4b are wire bonded. is the fifth
As shown in the figure, the hanging wire 314-de and the Vss inner lead can also be formed integrally.

FIG. 5 is a plan view showing another embodiment of the suspension lead in the lead frame of the first invention, in which the same or equivalent members as those explained in FIG. 1 are given the same reference numerals and details. Further explanation will be omitted. In Figure 5,
Reference numeral 15 denotes a suspension lead for supporting the die pad 1 by connecting the die pad 1 to the outer frame of the lead, and the suspension lead 15 is formed so that the portion corresponding to the inner lead 4 is wider than the other portion. . And this hanging lead 1
In No. 5, the wide portion is set to substantially become the SS inner lead.

Even in this case, the same effect as that of this embodiment can be obtained.

Furthermore, in this embodiment, the Vcc wire pad 11, which is a power supply system wire pad, is set to the same potential as the Vcc electrode pad, and the die pad 1 is set to the same potential as the VSS electrode pad. However, depending on the device, the potential of the element substrate may vary. Since there is also a Vcc type, when using such a device, the die pad 1 can be set to the cc potential, and the Vcc wire pad 11 can be set to the Vss potential.

Next, the second invention according to the present invention is shown in FIGS. 6 to 8 (
This will be explained in detail using examples shown in a) and (b).

FIG. 6 is a plan view showing an enlarged main part of a lead frame according to the second aspect of the present invention, and FIG. 7 is a plan view showing a state in which wire bonding has been performed on the lead frame shown in FIG. be. Figure 8(a).

(b) is a diagram showing the wire bonding state;
) is a sectional view taken along the line A-A in Figure 7, and the same figure (b) is a cross-sectional view taken along line A-A in Figure 7.
It is a sectional view taken along the line BB in the figure. Note that the lead frame according to the present invention is approximately symmetrical about its widthwise central portion, so only one side of the lead frame is shown in FIGS. 6 and 7. In these figures, the same or equivalent members as those explained in FIGS. 1 to 5 are given the same reference numerals, and detailed explanations will be omitted.

In these figures, 21 is a Vss wire pad as a grounding wire pad 5 6 , and 22 is a Vcc wire pad as a power supply wire pad. The VSS wire pad 21 and the Vcc wire pad 22 are each formed wide along the side of the die pad 1, and are arranged between the die pad 1 and the inner lead 4 on four sides of the die pad L. There is. In this embodiment, Vss
A wire pad 21 is placed on the die pad 1 side, and Vc
A c wire pad 22 is placed outside this Vss wire pad 21. In addition, the Vss wire pad 2
A Vss inner lead 4b and a Vcc inner lead 4a are integrally provided on both sides of each of the Vss wire pads 1 and 22 by extending the side portions toward the outer frame side of the lead frame. 4b, and is supported by the outer frame by the Vcc inner lead 4a.

In the lead frame configured in this way, the seventh
As shown in the figure, the plurality of Vss electrode pads of the semiconductor element 2 and the Vss wire pad 21 are wire-bonded by the wire 5, and the plurality of Vcc electrode pads of the semiconductor element 2 and the Vcc wire pad 22 are bonded by the wire 5 to the Vss wire pad 21. Wire bonding is performed past the pad 21. That is, the Vss electrode band is as shown in FIG.
As shown in >, wire 5 and Vss wire pad 2
1 to the Vss inner lead 4b. In addition, the Vcc electrode pad is shown in Fig. 8 (
As shown in b), it is electrically connected to the Vcc inner lead 4a via the wire 5 and the Vcc wire pad 22.

In the lead frame configured in this way, the plurality of Vss electrode bands of the semiconductor element 2 are wire-bonded to the nearest Vss wire pads 21, and the plurality of Vcc electrode bands of the semiconductor element 2 are wire-bonded to the Vcc wire pads 22, respectively. By bonding, Vss inner lead 4b and Vcc inner lead 4
a can be aggregated, and compared to the number of Vss electrode pads and Vcc electrode pads, Vss inner lead 4b and Vcc
The number of inner leads 4a can be reduced.

7 8 Therefore, the total number of package bins can be reduced, and the power supply wire pad (Vss wire pad 21.V
Since the pad area of the cc wire pad 22) can be made wider, inductance can be reduced. Also, since the wire 5 connected to the signal inner lead 4 passes over the Vss wire pad 21, the relationship between the wire 5 and the Vss wire pad 21 after resin sealing is such that the wire 5 and the Vss wire pad 21 are sealed with epoxy resin or the like between them. It is filled with a sealing resin and becomes a substantial stripline structure. This allows impedance matching and reduces inductance. Furthermore, since the inner leads 4 are shortened, there is no need to use the support tape that was conventionally required.

Although this embodiment shows an example in which the Vss wire pad 21 is arranged on the die pad 1 side and the Vcc wire pad 22 is arranged outside the Vss wire pad 21, the present invention is not limited to such limitations. , can also be arranged in the opposite way to that described above.

〔Effect of the invention〕

As explained above, in the lead frame according to the first aspect of the present invention, the width is formed between the die pad and the inner lead along the side part of the die pad, and the inner lead for the power supply system is formed between the die pad and the inner lead. A power supply wire pad integrally provided at the tip is arranged, and a power supply electrode of a semiconductor element is wire-bonded to one of the power supply wire pad and the die pad, and a grounding electrode is wire-bonded to the other. Further, the lead frame according to the second aspect of the present invention has a power supply wire pad formed wide along the side of the die pad arranged between the die pad and the inner lead. ,
This power supply wire pad is integrally provided at the tip of the inner lead for power supply among the inner leads, and is wire-bonded to the power supply electrode of the semiconductor element, and the inner lead for grounding among the inner leads. It is formed by a grounding wire pad that is integrally provided at the tip of the semiconductor element and is wire-bonded to the grounding electrode of the semiconductor element. The hand is wire bonded to the power supply wire pad,
The inner lead for power supply and the inner lead for grounding can be integrated by the power supply wire pad. Therefore, pa.

The total number of pins of the cage can be reduced, and the pad area of the power supply wire pad can be expanded. Therefore, inductance can be reduced, and in a semiconductor device assembled using the lead frame according to the present invention, occurrence of bounce can be reliably suppressed and reliability can be improved. Also, since the wire connected to the signal inner lead passes over the grounding wire pad, after resin sealing, the relationship between this wire and the grounding wire pad is effectively changed as the space between the two is filled with sealing resin. It has a stripline structure. Therefore, impedance matching becomes possible, inductance is reduced, and signal delay time can be shortened.

Furthermore, in the lead frame according to the present invention, since the inner leads for signals can be shortened, there is no need to use the support tape for fixing the inner leads that was conventionally required. Not only can the process be eliminated, but it also eliminates the possibility of deterioration in reliability of electrical characteristics due to the use of support tape.Furthermore, in the lead frame according to the first invention, the die pad is made sufficiently wider than the semiconductor element. When formed in this way, heat dissipation can be improved, and reliability can also be improved thereby.

[Brief explanation of drawings]

1 is a plan view showing an enlarged main part of a lead frame according to a first aspect of the present invention; FIG. 2 is a plan view showing a state in which wire bonding has been performed on the lead frame shown in FIG. 1; FIGS. 3(a) and 3(b)- are diagrams showing the wire bonding state, and FIG. 3(a) is A-A in FIG.
2. Line sectional view, the same figure (b) is a BB line sectional view in FIG. FIG. 4 is a plan view showing another embodiment of the die pad in the lead frame of the first invention, and FIG.
FIG. 2 is a plan view showing another embodiment of the suspension lead in the lead frame of the invention. FIG. 6 is a plan view showing an enlarged main part of a lead frame according to the second aspect of the present invention, FIG. 7 is a plan view showing a state in which wire bonding has been performed on the lead frame shown in FIG. 6, FIGS. 8(a) and 8(b) are diagrams showing the wire bonding state, and FIG. 8(a) shows the seventh wire bonding state.
The figure is a sectional view taken along the line A-A, and FIG. 7B is a cross-sectional view taken along the line B-B in FIG. FIG. 9 is an enlarged plan view of the inner lead portion of a conventional lead frame, and FIG. 10 is an enlarged plan view of the inner lead portion of the conventional lead frame after wire bonding. 1...Dice pad, 2...Semiconductor element, 4...
...Inner lead, 4a...Vcc inner lead, 4b...Vss inner lead, 5...
Wire, 11.22...Vcc wire pad, 21
...Vss wire pad.

Claims (2)

[Claims] (1) In a lead frame including a die pad on which a semiconductor element is mounted, and an inner lead wire-bonded to the semiconductor element is arranged around the die pad, between the die pad and the inner lead,
A power supply wire pad is formed wide along the side of the die pad and is integrally provided at the tip of the inner lead of the power supply system among the inner leads, and the power supply wire pad and the die pad are connected to each other. A lead frame characterized in that a power supply electrode of a semiconductor element is wire-bonded to one side, and a grounding electrode is wire-bonded to the other side. (2) In a lead frame including a die pad on which a semiconductor element is mounted, and an inner lead wire-bonded to the semiconductor element is arranged around the die pad, between the die pad and the inner lead,
A wide power supply wire pad is arranged along the side of the die pad.
A power supply wire pad is integrally provided at the tip of the inner lead for power supply among the inner leads and wire-bonded to the power supply electrode of the semiconductor element, and a wire pad for power supply is integrally provided at the tip of the inner lead for grounding among the inner leads. A lead frame is formed by a grounding wire pad wire-bonded to a grounding electrode of a semiconductor element, and these are arranged inside and outside.