JPH0324723U - - Google Patents
Info
- Publication number
- JPH0324723U JPH0324723U JP11705089U JP11705089U JPH0324723U JP H0324723 U JPH0324723 U JP H0324723U JP 11705089 U JP11705089 U JP 11705089U JP 11705089 U JP11705089 U JP 11705089U JP H0324723 U JPH0324723 U JP H0324723U
- Authority
- JP
- Japan
- Prior art keywords
- integrating
- circuit
- square wave
- output signals
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000295 complement effect Effects 0.000 claims 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Manipulation Of Pulses (AREA)
- Pulse Circuits (AREA)
Description
第１図は本考案による方形波信号発生回路のブ
ロツク図、第２図は第１図の回路の各部波形図で
ある。
FIG. 1 is a block diagram of a square wave signal generating circuit according to the present invention, and FIG. 2 is a waveform diagram of each part of the circuit of FIG.
Claims (1)
出力信号と帰還信号とを受信して相補的な２個の
方形波出力信号を発生する比較器と、前記２個の
出力信号をそれぞれ積分する積分回路と、前記２
個の積分回路の出力信号を受信して前記帰還信号
を発生する誤差増幅器とより成る方形波信号発生
回路。 a circuit for integrating an input square wave signal; a comparator for receiving an output signal of said circuit and a feedback signal to generate two complementary square wave output signals; and a comparator for respectively integrating said two output signals. Integrating circuit and the above 2
a square wave signal generation circuit comprising an error amplifier that receives the output signals of the two integrating circuits and generates the feedback signal.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US25384088A | 1988-10-05 | 1988-10-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0324723U true JPH0324723U (en) | 1991-03-14 |
Family
ID=31715376
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11705089U Pending JPH0324723U (en) | 1988-10-05 | 1989-10-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0324723U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115149906A (en) * | 2022-07-11 | 2022-10-04 | 杭州岸达科技有限公司 | Frequency Doubler with Duty Cycle Correction Based on Analog Feedback |
| CN115603710A (en) * | 2022-10-25 | 2023-01-13 | 四川和芯微电子股份有限公司（Cn） | Duty Cycle Correction Circuit |
-
1989
- 1989-10-04 JP JP11705089U patent/JPH0324723U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115149906A (en) * | 2022-07-11 | 2022-10-04 | 杭州岸达科技有限公司 | Frequency Doubler with Duty Cycle Correction Based on Analog Feedback |
| CN115603710A (en) * | 2022-10-25 | 2023-01-13 | 四川和芯微电子股份有限公司（Cn） | Duty Cycle Correction Circuit |
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