JPH0325039B2 - - Google Patents

Info

Publication number
JPH0325039B2
JPH0325039B2 JP58235039A JP23503983A JPH0325039B2 JP H0325039 B2 JPH0325039 B2 JP H0325039B2 JP 58235039 A JP58235039 A JP 58235039A JP 23503983 A JP23503983 A JP 23503983A JP H0325039 B2 JPH0325039 B2 JP H0325039B2
Authority
JP
Japan
Prior art keywords
conductor
solder
round
adhesive
preliminary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58235039A
Other languages
Japanese (ja)
Other versions
JPS60127792A (en
Inventor
Giichiro Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Group Corp
Original Assignee
Aiwa Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aiwa Co Ltd filed Critical Aiwa Co Ltd
Priority to JP23503983A priority Critical patent/JPS60127792A/en
Publication of JPS60127792A publication Critical patent/JPS60127792A/en
Publication of JPH0325039B2 publication Critical patent/JPH0325039B2/ja
Granted legal-status Critical Current

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は電子部品をプリント基板上に実装する
方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for mounting electronic components on a printed circuit board.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来、電子部品を半田付けするプリント基板上
の導体ラウンドに予備半田を供給し、リフローソ
ルダリングを行う実装方法において、基板の両面
に処理を施す場合は、片面毎のリフローを繰り返
していたため、先に実装する面の部品が2回高温
に曝され、部品の特性が劣化してしまう等の欠点
があつた。
Conventionally, in the mounting method of supplying preliminary solder to the conductor rounds on the printed circuit board to which electronic components are soldered, and then performing reflow soldering, when processing both sides of the board, reflow was repeated for each side. There were drawbacks such as the parts on the surface to be mounted were exposed to high temperatures twice, resulting in deterioration of the characteristics of the parts.

また、第1図のように電子部品1を接着剤2で
プリント基板3の下面に仮固定し、基板3の上面
には電子部品4を搭載し、同時に導体ラウンド5
上の半田ペースト6を溶融させ、いわゆる両面同
時のリフローソルリングを行う際には、下面側電
子部品1の半田付不良の問題を解決しなければな
らない。
Further, as shown in Fig. 1, the electronic component 1 is temporarily fixed to the lower surface of the printed circuit board 3 with adhesive 2, the electronic component 4 is mounted on the upper surface of the circuit board 3, and at the same time, the conductor round 5
When melting the upper solder paste 6 and performing so-called simultaneous reflow soldering on both sides, the problem of poor soldering of the lower electronic component 1 must be solved.

即ち予備半田として使用される半田ペースト6
が溶融時にその体積を著しく減少する一方、接着
剤2によつてペースト厚に対応した高さhに、電
子部品1が支持されたままであるため、半田付欠
陥が発生し易い。
That is, solder paste 6 used as preliminary solder
While the adhesive 2 significantly reduces its volume when melted, the electronic component 1 remains supported by the adhesive 2 at a height h corresponding to the thickness of the paste, so soldering defects are likely to occur.

〔発明の目的〕[Purpose of the invention]

本発明は、かかる問題点を解決し、基板の両面
に実装される電子部品を同時にリフローして高密
度に部品を実装する方法の提供を、その目的とす
る。
SUMMARY OF THE INVENTION An object of the present invention is to solve such problems and provide a method for simultaneously reflowing electronic components mounted on both sides of a board and mounting the components at a high density.

〔発明の概要〕[Summary of the invention]

本発明は、電子部品が接着剤で仮固定されるべ
き面側の導体ラウンドを、上記接着剤が塗布され
る領域を介して相対向する辺を実質的に切欠した
形状となし、且つ電子部品の装着前に、あらかじ
め該導体ラウンド上の予備半田フイレツトを圧潰
せしめるプレス処理を施すことを特徴とする、リ
フローソルダリングを行つて回路を形成する実装
方法である。
The present invention provides a conductor round on the side to which an electronic component is to be temporarily fixed with an adhesive, in a shape in which sides facing each other across the area to which the adhesive is applied are substantially cut out, and This is a mounting method for forming a circuit by performing reflow soldering, which is characterized by performing a pressing process to crush the preliminary solder fillet on the conductor round before mounting the conductor round.

〔発明の実施例〕[Embodiments of the invention]

第2図〜第4図を用いて本発明の一実施例を説
明する。
An embodiment of the present invention will be described with reference to FIGS. 2 to 4.

なお、前述より明らかであるが、両面同時リフ
ロー処理を前提にした場合、少なくとも下面側の
基板面では部品落下防止用として仮固定する接着
剤が必要であり、下面側に位置する基板面につい
て以下平面図を供して説明する。
As is clear from the above, when assuming simultaneous reflow processing on both sides, adhesive is required to temporarily fix the parts on the bottom side of the board at least to prevent parts from falling. This will be explained with reference to a plan view.

第2図における導体ラウンド10は、絶縁基板
上にプリントされた導体のうち、導体層自体の形
状、あるいは導体周囲にソルダーレジストを被覆
することによつて、半田付可能な導体箇所をラウ
ンドとして確保したものであり、電子部品の電極
に対応した位置に設けられている。
The conductor round 10 in Fig. 2 is a conductor printed on an insulating substrate, and the conductor part that can be soldered is secured as a round by the shape of the conductor layer itself or by covering the conductor with solder resist. It is provided at a position corresponding to the electrode of the electronic component.

また該導体ラウンド10は、その相対向する辺
にラウンド面積を小ならしめた部分を略対称的に
備えており、換言すれば実質的に半田が付着する
箇所を部分的に切欠した形状を呈している。
Further, the conductor round 10 has substantially symmetrical portions with smaller round areas on opposite sides, in other words, it has a shape in which the portion to which solder is attached is partially cut out. ing.

次いで導体ラウンド10には予備半田が供給さ
れる。(第2図) 但し予備半田、即ち同図中13の半田は溶融時
の表面張力によつて盛り上がつてフイレツト形状
を呈しており、導体ラウンド10上への半田供給
は、半田槽へのデイツプ、あるいは半田ペースト
印刷後に一旦溶融させる等で行われる。
The conductor round 10 is then supplied with preliminary solder. (Figure 2) However, the preliminary solder, that is, the solder 13 in the figure, swells up due to the surface tension during melting and takes on a fillet shape, and the supply of solder onto the conductor round 10 is limited to the solder tank. This is done by printing a dip or solder paste and then melting it.

次に、半田の弾性限度を越えた塑性をして変形
させる周知の加工技術により、導体ラウンド10
上の半田13フイレツトを圧潰せしめ、基板上で
延展されて一様に平坦面を呈す予備半田を得るべ
くプレス処理が施される。
Next, a conductor round 10
A pressing process is performed to crush the fillet of solder 13 on top and obtain preliminary solder that is spread on the substrate and exhibits a uniformly flat surface.

そのため導体ラウンド10上の半田13は、第
4図の如くラウンドよりはみ出して周囲に拡かる
が、切欠11付近は半田が乗つていないので、そ
の方向への拡がりは抑御されることになる。
Therefore, the solder 13 on the conductor round 10 protrudes from the round and spreads to the surrounding area as shown in Figure 4, but since there is no solder on the vicinity of the notch 11, the spread in that direction is suppressed. .

次に熱硬化性樹脂、あるいは紫外線硬化樹脂等
を組成主成分とする接着剤14をマイクロデイス
ペンサ等によつて塗布し、また該塗布領域は、図
示の如く前述ラウンドの相対向する辺間に介在す
るように位置している。
Next, an adhesive 14 whose main component is a thermosetting resin or an ultraviolet curable resin is applied using a microdispenser or the like, and the application area is applied between the opposite sides of the round as shown in the figure. It is located to intervene.

その後装着された電子部品15は、キユア処理
を施した接着剤14によつて仮固定された状態で
リフローソルダリングをして導体ラウンド10へ
半田付される。(第5図) 即ち本実施例については、 予備半田が半田ペースト(半田粉末と有機溶剤
の混練物)ではないため、溶融凝集による体積変
化は小さく、またプレス処理が施してあるので、
該予備半田厚は半田供給量の割に低く、即ち半田
付欠陥の要因である電子部品の電極と導体ラウン
ド間の間隙がきわめて小さくなるため、不良発生
は未然に防止されることになる。
Thereafter, the mounted electronic component 15 is soldered to the conductor round 10 by reflow soldering while being temporarily fixed with the cured adhesive 14. (Figure 5) That is, in this example, since the preliminary solder is not a solder paste (a mixture of solder powder and an organic solvent), the volume change due to melt aggregation is small, and since it has been subjected to a press treatment,
The thickness of the preliminary solder is low relative to the amount of solder supplied, that is, the gap between the electrode of the electronic component and the conductor round, which is a cause of soldering defects, becomes extremely small, thereby preventing the occurrence of defects.

該プレス処理については単に電子部品(本実施
例ではリードレス部品であるが)を搭載するため
に平坦面を得ることにあらず、その予備半田厚を
最小限に抑えることを目的としている。
The purpose of the pressing process is not simply to obtain a flat surface for mounting electronic components (leadless components in this embodiment), but to minimize the preliminary solder thickness.

このため結果的に半田が基板上で大きく拡がつ
てしまうので、切欠部はその際に仮固定用接着剤
の塗布領域を実装密度に拘らず確保するためにあ
る。
As a result, the solder spreads greatly on the board, so the cutout is provided to ensure an area for applying the temporary fixing adhesive regardless of the mounting density.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明の電子部品の実装方法
は、電子部品を半田付けするプリント基板上の導
体ラウンドに予備半田を供給し、リフローソルダ
リングを行つて回路を形成する実装方法であつ
て、電子部品が接着剤で仮固定されるべき面側の
導体ラウンドを、上記接着剤が塗布される領域を
介して相対向する辺を実質的に切欠した形状とな
し、且つ電子部品の装着前に、あらかじめ該導体
ラウンド上の予備半田フイレツトを圧潰せしめる
プレス処理を施すことを特徴としており、半田付
欠陥を防止して基板の両面に部品を実装してのリ
フローが可能である。
As described above, the electronic component mounting method of the present invention is a mounting method in which preliminary solder is supplied to conductor rounds on a printed circuit board to which electronic components are soldered, and a circuit is formed by performing reflow soldering. The conductor round on the side to which electronic components are to be temporarily fixed with adhesive has a shape in which sides facing each other across the area to which the adhesive is applied are substantially cut out, and before the electronic components are attached, The method is characterized in that a press treatment is applied in advance to crush the preliminary solder fillet on the conductor round, thereby preventing soldering defects and allowing reflow to be performed with components mounted on both sides of the board.

特にリードレス部品のように小型部品を高密度
に実装する場合、プレスされた延べ半田が接着剤
塗布領域を覆つてしまうことがないので好適であ
る。
In particular, when small components such as leadless components are mounted at high density, the pressed solder paste does not cover the adhesive application area, which is suitable.

本発明は上記し且つ図示した実施例に限定され
ず、本発明の要旨を逸脱しない範囲での設計変更
が可能である。
The present invention is not limited to the embodiments described above and illustrated, and design changes can be made without departing from the gist of the present invention.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の説明図、第2図〜第5図は本
発明の実施例工程を示す平面図である。 符号の説明、1,4,15……電子部品、5,
10……導体ラウンド、11……切欠、13……
半田、14……接着剤。
FIG. 1 is an explanatory diagram of a conventional example, and FIGS. 2 to 5 are plan views showing steps of an embodiment of the present invention. Explanation of symbols, 1, 4, 15...Electronic parts, 5,
10... Conductor round, 11... Notch, 13...
Solder, 14...Adhesive.

Claims (1)

【特許請求の範囲】[Claims] 1 プリント基板上の導体ラウンドに予備半田を
行うとともに、該予備半田に対応する位置に電子
部品を接着剤にて仮固定した後、リフローソルダ
リング法により前記電子部品を前記基板に実装す
るようにした電子部品の実装方法において、上記
導体ラウンドは上記接着剤が塗布される領域を介
して相対向する辺を切欠した形状となすと共に、
上記予備半田は各々の導体ラウンド上に印刷され
た半田ペーストを一旦溶融状態とし該溶融状態か
ら冷却固形化された後、プレス処理が施され前記
導体ラウンド周囲にまで押し広げられた状態にて
形成されてなることを特徴とする電子部品の実装
方法。
1 Preliminary soldering is performed on the conductor rounds on the printed circuit board, and electronic components are temporarily fixed with adhesive at positions corresponding to the preliminary soldering, and then the electronic components are mounted on the substrate using a reflow soldering method. In the electronic component mounting method, the conductor round has a shape in which sides facing each other across the area to which the adhesive is applied are notched, and
The above-mentioned preliminary solder is formed by first melting the solder paste printed on each conductor round, solidifying it by cooling from the melted state, and then applying a press treatment to spread it around the conductor round. A method for mounting an electronic component, characterized in that:
JP23503983A 1983-12-15 1983-12-15 Method of attaching electronic part Granted JPS60127792A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23503983A JPS60127792A (en) 1983-12-15 1983-12-15 Method of attaching electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23503983A JPS60127792A (en) 1983-12-15 1983-12-15 Method of attaching electronic part

Publications (2)

Publication Number Publication Date
JPS60127792A JPS60127792A (en) 1985-07-08
JPH0325039B2 true JPH0325039B2 (en) 1991-04-04

Family

ID=16980175

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23503983A Granted JPS60127792A (en) 1983-12-15 1983-12-15 Method of attaching electronic part

Country Status (1)

Country Link
JP (1) JPS60127792A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5613370B2 (en) * 2008-10-29 2014-10-22 日本電波工業株式会社 Mounting method of surface mount crystal oscillator on set substrate

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187767A (en) * 1975-01-31 1976-07-31 Hitachi Ltd HANDASOKEISEIHOHO
JPS5612378U (en) * 1979-07-05 1981-02-02

Also Published As

Publication number Publication date
JPS60127792A (en) 1985-07-08

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