JPH03250785A - Multilayer printed circuit board and marking method - Google Patents
Multilayer printed circuit board and marking methodInfo
- Publication number
- JPH03250785A JPH03250785A JP4863390A JP4863390A JPH03250785A JP H03250785 A JPH03250785 A JP H03250785A JP 4863390 A JP4863390 A JP 4863390A JP 4863390 A JP4863390 A JP 4863390A JP H03250785 A JPH03250785 A JP H03250785A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- circuit
- marking
- multilayer printed
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims description 10
- 239000010410 layer Substances 0.000 claims abstract description 42
- 239000002344 surface layer Substances 0.000 claims abstract description 17
- 239000011229 interlayer Substances 0.000 claims 1
- 238000003475 lamination Methods 0.000 abstract 2
- 238000010521 absorption reaction Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 230000002950 deficient Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000009527 percussion Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
Landscapes
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は主として多層印刷配線板（以下ＰＷＢと称する
）に製品管理情報を記すための方法に関し、特に製造後
の製造履歴番号または品番をレーザ叩射を利用して記し
た多層印刷配線板と、多層印刷配線板のマーキング方法
に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention mainly relates to a method for recording product management information on a multilayer printed wiring board (hereinafter referred to as PWB). The present invention relates to a multilayer printed wiring board marked using percussion and a method for marking the multilayer printed wiring board.
従来、この種のＮｃｌＹＡＧレーザ照射によるマーキン
グは第５図、第６図に示すように、ｐｗＢｌの表層面６
に設けられた製品管理情報マーキング用余白部７に、線
幅５０ミクロン程度、出力５０Ｗ以上のＮｄ−ＹＡＧレ
ーレー射光３の吸収焦点をＩ） Ｗ ８表層面６に対し
て０，１節程度の精度で合わせて文字記号等を記してい
た。Conventionally, marking by this type of NclYAG laser irradiation was performed on the surface layer 6 of pwBl, as shown in FIGS. 5 and 6.
In the blank area 7 for product management information marking provided in Letters and symbols were written with precision.
上述した従来のマーキングは、ＰＷＢ １の表層面６に
Ｎｄ−ＹＡＧレーザ照射光３を吸収させて熱交換し、そ
の発熱で、ＰＷＢｌの表層面の一部を焼け焦がすことに
よって文字記号等を記すため、ＰＷＢの使用環境か劣化
しやすく、またＰＷＢ １の表層面の材質か、Ｎｄ−Ｙ
ＡＧレーザ光を吸収しにくい性質となっている場合、安
定したマーキングを得るためのＮｄ−ＹＡＧレーザ照射
光の吸収焦点の制御が困難であり、また、記された文字
記号等が判読しにくいという欠点があった。In the above-mentioned conventional marking, the surface layer 6 of the PWB 1 absorbs the Nd-YAG laser irradiation light 3 and exchanges heat, and the generated heat burns a part of the surface layer of the PWB 1 to write characters and symbols. Therefore, the environment in which the PWB is used is likely to deteriorate, and the material of the surface layer of PWB 1, Nd-Y
If the property is such that it is difficult to absorb AG laser light, it is difficult to control the absorption focus of the Nd-YAG laser irradiation light to obtain stable markings, and written characters and symbols are difficult to read. There were drawbacks.
本発明の目的は、前記課題を解決した多層印刷配線板お
よびマーキング方法を提供することにある。An object of the present invention is to provide a multilayer printed wiring board and a marking method that solve the above problems.
前記目的を達成するため、本発明に係る多層印刷配線板
においては、多層に積層形成された回路と、該回路を含
む多層積層体の表面を被覆した表面層とからなる多層印
刷配線板であって、製品管理情報等を示すマーキングは
、内層回路表面とその内層回路表面に密着している中間
層との間に形成されているものである。In order to achieve the above object, the multilayer printed wiring board according to the present invention is a multilayer printed wiring board consisting of a multilayered circuit and a surface layer covering the surface of a multilayer laminate including the circuit. The markings indicating product management information and the like are formed between the inner layer circuit surface and the intermediate layer that is in close contact with the inner layer circuit surface.
また、本発明に係る多層印刷配線板のマーキング方法に
おいては、多層に積層形成された回路と、該回路を含む
多層積層体の表面を被覆した表面層とからなる多層印刷
配線板に、製品管理情報等を示すマーキングを施こず方
法であって、レーザ光を多層印刷配線板の表面層を透過
させるように照射し、そのレーザ光を次層あるいは次層
以降の内層回路の表面に吸収させて熱交換し、その発熱
で内層回路表面とその内層回路表面に密着している中間
層との間を焼け焦がすことにより、文字記号等に対応し
た微量の空間を形成し、該微量の空間形状によりマーキ
ングを施こすものである。In addition, in the marking method for a multilayer printed wiring board according to the present invention, product management This is a method that does not apply markings that indicate information, etc., and irradiates a laser beam so as to pass through the surface layer of a multilayer printed wiring board, and the laser beam is absorbed by the surface of the next layer or the inner layer circuit after the next layer. By exchanging heat and using the generated heat to scorch the space between the inner layer circuit surface and the intermediate layer that is in close contact with the inner layer circuit surface, a minute amount of space corresponding to a character symbol, etc. is formed, and the shape of this minute amount of space is Marking is done by
以下、本発明の実施例を図により説明する。 Embodiments of the present invention will be described below with reference to the drawings.
（実施例１）
第１図は本発明の実施例１を示す斜視図、第２図は第１
図の主要部拡大図である。(Example 1) Figure 1 is a perspective view showing Example 1 of the present invention, and Figure 2 is a perspective view showing Example 1 of the present invention.
It is an enlarged view of the main part of the figure.
図において、本発明に係る多層印刷配線板１は、多層に
積層形成された回路と、該回路を含む多層積層体の表面
を被覆した表面層とからなるものであり、製品管理情報
等を示すマーキング２は、次層回ｎ １ ａの表面とそ
の次層回ＦＲ１１ａの表面に密着している中間層（実施
例ではガラスエポキシ樹脂層１ｃ）との間に形成したも
のである。In the figure, a multilayer printed wiring board 1 according to the present invention is composed of a multilayered circuit and a surface layer covering the surface of a multilayer laminate including the circuit, and shows product management information, etc. The marking 2 is formed between the surface of the next layer n 1 a and the intermediate layer (glass epoxy resin layer 1c in the example) that is in close contact with the surface of the next layer FR11a.
次に本発明に係る多層印刷配線板１のマーキング方法に
ついて説明する。Next, a method for marking the multilayer printed wiring board 1 according to the present invention will be explained.
製造履歴番号等を表わすマーキング２に対応する線幅２
０ミクロン程度、出力１０Ｗ程度のＮｄ−ＹＡＧレーザ
照射光３をＰＷＢ表層面６を透過させ、レーザ照射光３
をＰＷＢｌの次層回ＩＩ＠ １ ａ上に存在させた余白
部１ｂにＰＷＢ表層面６に対して１．０Ｍ程度に合わせ
て照射させて、次層回ｖ＠１ ａの表面とそこに密着し
ているガラスエポキシ樹脂層１ｃの間を発熱させて焼け
焦がし、微量の空間２ａを形成し、該微量の空間２ａの
形状によりマーキング２を施こず。Line width 2 corresponding to marking 2 representing manufacturing history number etc.
Nd-YAG laser irradiation light 3 with a diameter of about 0 micron and an output of about 10W is transmitted through the PWB surface layer 6, and the laser irradiation light 3
The margin part 1b existing on the next layer time II@1a of the PWBl is irradiated at a distance of about 1.0M to the PWB surface layer 6, and the surface of the next layer time v@1a is closely attached thereto. The space between the glass epoxy resin layers 1c is generated and scorched to form a small amount of space 2a, and the marking 2 is not applied due to the shape of the small amount of space 2a.
（実施例２）
第３図は本発明の実施例２を示す斜視図、第４図は第３
図の主要部拡大図である。(Embodiment 2) Fig. 3 is a perspective view showing Embodiment 2 of the present invention, and Fig. 4 is a perspective view showing Embodiment 2 of the present invention.
It is an enlarged view of the main part of the figure.
本実施例では永久的な不良内容（カイロフリヨウ）のマ
ーキング５に対応する線幅２０ミクロン程度、出力１０
Ｗ程度のＮｄ−ＹＡＧレーザ光をｐｗＢ表層面６を透過
させ、該レーザ光をＰＷＢ製造工程で発見された不良Ｐ
ＷＢ４の次層にＰＷＢ表層面６に対して１．０ｎｎ程度
に合わせて照射することによりマーキング５を施したも
のである。その他の構成は実施例１と同じである。In this example, the line width is about 20 microns and the output is 10, which corresponds to marking 5 of permanent defect contents (cairo frills).
A Nd-YAG laser beam of approximately W is transmitted through the pwB surface layer 6, and the laser beam is used to remove defective P found in the PWB manufacturing process.
The marking 5 is applied to the next layer of the WB 4 by irradiating the PWB surface layer 6 with an intensity of about 1.0 nn. The other configurations are the same as in the first embodiment.
以上説明したように本発明はレーザ照射光を、ＰＷＢ表
層面を透過させ次層あるいは次層以降の回路表面に吸収
させて熱変換し、その発熱で回路表面とその回路表面に
密着している中間層の間に文字記号等に対応した微量の
空間を焼け焦がすため、コントラストが大きく判読性が
高く、しかもＰＷＢ表層面ではなく、次層あるいは次層
以降の回路表面にマーキングされているためにＰＷＢの
使用環境では劣化しにくい、さらに、レーザ照射光を吸
収しやすい回路表面に照射するため、レーザ照射光の吸
収焦点の制御が容易であり、しかも、不良内容をマーキ
ングすることで、不良内容等の解析に利用することがで
きるという効果がある。As explained above, the present invention transmits laser irradiation light through the PWB surface layer, absorbs it into the next layer or the circuit surface of the next layer and converts it into heat, and the heat generated brings the laser irradiation light into close contact with the circuit surface. Because it burns a small amount of space between the intermediate layers that corresponds to characters and symbols, the contrast is large and legibility is high, and the markings are not on the surface of the PWB but on the next layer or the circuit surface of the next layer. Since the laser irradiation light is irradiated onto the circuit surface, which does not easily deteriorate in the PWB usage environment and is easy to absorb, it is easy to control the absorption focus of the laser irradiation light.Moreover, by marking the defect content, it is possible to easily control the absorption focus of the laser irradiation light. This has the advantage that it can be used for analysis such as
第１図は本発明の実施例１を示す斜視図、第２図は第１
図の主要部拡大図、第３図は本発明の実施例２を示す斜
視図、第４図は第３図の主要部拡大図、第５図は従来例
を示す斜視図、第６図は第５図の主要部拡大図である。
１・・・ＰＷＢ １ ａ・・・次層回路１
ｂ・・・次層回路の余白部
ＩＣ・・・ガラスエポキシ樹脂層
２・・・マーキング ２ａ・・・微量の空間３・
・・Ｎｄ−ＹＡＧレーザ照射光
４・・・不良ＰＷＢ
５・・・不良内容のマーキング
６・・・ＰＷＢ表層面FIG. 1 is a perspective view showing the first embodiment of the present invention, and FIG. 2 is a perspective view showing the first embodiment of the present invention.
3 is a perspective view showing the second embodiment of the present invention, FIG. 4 is an enlarged view of the main part of FIG. 3, FIG. 5 is a perspective view of the conventional example, and FIG. It is an enlarged view of the main part of FIG. 5. 1...PWB 1 a...Next layer circuit 1
b...Margin area of next layer circuit IC...Glass epoxy resin layer 2...Marking 2a...Small amount of space 3.
... Nd-YAG laser irradiation light 4 ... Defective PWB 5 ... Marking of defect details 6 ... PWB surface
Claims (2)
積層体の表面を被覆した表面層とからなる多層印刷配線
板であつて、 製品管理情報等を示すマーキングは、内層回路表面とそ
の内層回路表面に密着している中間層との間に形成され
ていることを特徴とする多層印刷配線板。(1) A multilayer printed wiring board consisting of a multilayered circuit and a surface layer covering the surface of the multilayer laminate containing the circuit, and markings indicating product management information, etc. are on the surface of the inner layer circuit. A multilayer printed wiring board characterized in that it is formed between the inner layer circuit surface and an intermediate layer that is in close contact with the inner layer circuit surface.
積層体の表面を被覆した表面層とからなる多層印刷配線
板に、製品管理情報等を示すマーキングを施こす方法で
あつて、 レーザ光を多層印刷配線板の表面層を透過させるように
照射し、そのレーザ光を次層あるいは次層以降の内層回
路の表面に吸収させて熱交換し、その発熱で内層回路表
面とその内層回路表面に密着している中間層との間を焼
け焦がすことにより、文字記号等に対応した微量の空間
を形成し、該微量の空間形状によりマーキングを施こす
ことを特徴とする多層印刷配線板のマーキング方法。(2) A method for marking a multilayer printed wiring board comprising a multilayered circuit and a surface layer covering the surface of a multilayer laminate including the circuit, the method comprising: A laser beam is irradiated so as to pass through the surface layer of the multilayer printed wiring board, and the laser beam is absorbed by the surface of the inner layer circuit in the next layer or after the next layer, exchanging heat, and the heat generated causes the inner layer circuit surface and its inner layer to A multilayer printed wiring board characterized in that a minute amount of space corresponding to a character symbol, etc. is formed by scorching the space between the interlayer and the intermediate layer that is in close contact with the circuit surface, and marking is performed using the shape of the minute amount of space. marking method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2048633A JP2582452B2 (en) | 1990-02-28 | 1990-02-28 | Multilayer printed wiring board and marking method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2048633A JP2582452B2 (en) | 1990-02-28 | 1990-02-28 | Multilayer printed wiring board and marking method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03250785A true JPH03250785A (en) | 1991-11-08 |
| JP2582452B2 JP2582452B2 (en) | 1997-02-19 |
Family
ID=12808781
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2048633A Expired - Fee Related JP2582452B2 (en) | 1990-02-28 | 1990-02-28 | Multilayer printed wiring board and marking method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2582452B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014123682A (en) * | 2012-12-21 | 2014-07-03 | Ngk Spark Plug Co Ltd | Method for manufacturing substrate |
| CN107041063A (en) * | 2017-06-09 | 2017-08-11 | 东莞市威力固电路板设备有限公司 | A kind of processing method of multilayer PCB and multilayer PCB |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5658882U (en) * | 1979-10-12 | 1981-05-20 | ||
| JPS59127272U (en) * | 1983-02-16 | 1984-08-27 | 三菱電機株式会社 | printed wiring board |
-
1990
- 1990-02-28 JP JP2048633A patent/JP2582452B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5658882U (en) * | 1979-10-12 | 1981-05-20 | ||
| JPS59127272U (en) * | 1983-02-16 | 1984-08-27 | 三菱電機株式会社 | printed wiring board |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014123682A (en) * | 2012-12-21 | 2014-07-03 | Ngk Spark Plug Co Ltd | Method for manufacturing substrate |
| CN107041063A (en) * | 2017-06-09 | 2017-08-11 | 东莞市威力固电路板设备有限公司 | A kind of processing method of multilayer PCB and multilayer PCB |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2582452B2 (en) | 1997-02-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |