JPH0325087B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a waveform equalizer for digital information signals that are multiplexed with television signals and transmitted.

2. Description of the Related Art In recent years, services have begun to be launched in which digital information signals such as text multiplex signals and facsimile signals are multiplexed and transmitted on television signals. Along with this, the influence of deterioration of amplitude frequency characteristics, group delay distortion, etc. occurring in the transmission path on errors during data reproduction has become a problem. For this reason, it is necessary to introduce a waveform equalizer to remove waveform distortion.

A conventional waveform equalizer will be described below with reference to the drawings. FIG. 6 is a circuit diagram of a conventional waveform equalizer. 1 is an A/D converter.
2, 3, 4 are multipliers, 5, 6 are adders, 7, 8,
9 is a delay circuit, and the transversal filter 101 is configured as described above. 10 is a tap coefficient control circuit.

The operation will be explained below. Transmission speed Fs b・
The digital information signal transmitted in p.s.
The signal is input to the D converter 1 and sampled at a sampling frequency Fs (Hz) equal to the transmission speed. The sampling data is input to the multipliers 2, 3, and 4, and at the same time is input to the tap coefficient control circuit 10. The output of the multiplier is supplied to a delay circuit 7 which delays the signal applied to the adders 5 and 6 by one clock.
It is added to the outputs of 8 and 9. The output of the waveform equalizer is input to a tap coefficient control circuit 10. The tap coefficient control circuit 10 optimally controls the coefficients of the multipliers 2, 3, and 4 in a direction that reduces waveform distortion from the outputs of the A/D converter 1 and the waveform equalizer. (For example, Broadcasting Technology P-225 to P-231-, published in 1982) Problems to be Solved by the Invention However, in the above configuration, the delay time of the delay circuit is fixed at the sampling interval of 1/Fs (seconds). There is. Figure 2 shows this situation.
An example of a tap coefficient sequence of a transversal filter 101 constituting this waveform equalizer is shown. The horizontal axis represents time, and the vertical axis represents the tap coefficient of the transversal filter, indicating that taps exist discretely at 1/Fs (second) intervals on the time axis.

However, when performing waveform equalization, there may be cases where a coefficient is required in the middle of the tap. If there is an infinite number of taps, it is possible to deal with such waveform distortion. However, in reality, it becomes a finite value due to hardware constraints, etc., and the amplitude frequency characteristic deteriorates in the high range. For this reason, conventional configurations have had the problem that waveform equalization cannot be performed sufficiently for the waveform distortion that occurs in such cases.

The present invention provides a waveform equalizer that can equalize waveforms even for waveform distortions that require coefficients in the middle of the taps.

Means for Solving the Problems In order to solve the above problems, the waveform equalizer of the present invention uses an A/D that samples an input digital information signal at a frequency twice the transmission rate of this digital information signal. a converter, (K+1) multipliers that multiply the output of the A/D converter by a constant, a first delay device that delays the output of the first multiplier, and an M-th (where 2< an adder that adds the M<K)-th multiplier output to the (M-1)-th delay device output; a K-th delay device that delays the (K-1)-th adder output; a digital filter having an adder that adds the output of the K delay device and the output of the (K+1)th multiplier; a tap coefficient control circuit that varies a delay time, and each of the delay devices includes a first delay circuit having the same delay time as the sampling time and a second delay circuit having twice the delay time. The first and second delay circuits are configured to be switched by the tap coefficient control circuit.

Effect The present invention has the above-described configuration, and the transmission speed Fs of the digital information signal is determined by the A/D converter.
Sampling is performed at a frequency of 2Fs (Hz), which is twice b・p・s. Further, the tap coefficient control circuit controls and switches whether the delay time of the delay circuit is equal to the sampling interval or twice the sampling interval. Then, for waveform distortion that requires a coefficient in the middle of the tap, waveform equalization is performed by setting the delay time of the delay circuit to 1/(2Fs) seconds, which is equal to the sampling interval.
For other waveform distortions, waveform equalization is performed at 1/Fs (seconds), which is twice the sampling interval.

Embodiment A waveform equalizer according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention. In FIG. 1, 11 is an A/D converter. 12, 13, 14 are multipliers, 15, 16 are adders, 17, 18, 19, 20, 21, 22,
23, 24, 25 are delay circuits, 26, 27, 28
is a switch, and the above constitutes a transversal filter 100. 29 is a tap coefficient control circuit.

The operation will be explained below. Transmission speed Fs b・
For example, a digital information signal transmitted in p.s.
The digital information signal multiplexed with the television signal and transmitted is input to the A/D converter 11 and is converted to a sampling frequency of 2Fs (Hz), which is twice the transmission speed.
The signal is sampled and input to multipliers 12, 13, and 14. The output of the first stage multiplier 12 is the delay circuit 1
7 and 18, and by switching the switch 26, the output of the delay circuit 17 or 19 is input to the adder 1.
5 is input. The outputs of multipliers 13 and 14 other than those described above are input to adders 15 and 16, and are added to the outputs of the delay circuits at the previous stage, respectively. The tap coefficient control circuit 29 detects waveform distortion from the outputs of the A/D converter 11 and the waveform equalizer, and
It controls coefficients 3 and 14 and switches 26, 27 and 28. FIG. 2 shows a tap coefficient sequence when all switches are changed so that the tap interval of the transversal filter constructed above is 1/Fs (seconds), which is twice the sampling interval. Figure 3 shows
Similarly, this is the tap coefficient sequence when all switches are changed so that the sampling interval is 1/2Fs (seconds). In Figures 2 and 3, the horizontal axis represents time and the vertical axis represents tap coefficients, M ₀ ,...,
M _j-2 , M _j-1 , M _j , M _j+1 ,..., N,..., N _2j-3 ,
N _2j-2 , N _2j-1 , N _2j , N _2j+1 , ... indicate the values of the coefficients. In the case of waveform distortion that requires a coefficient in the middle of the taps, the tap interval should be reduced by 1/2 as shown in Figure 3.
Select Fs (seconds) and perform waveform equalization. Also, the time range in which waveform equalization is possible at this time is K/(2Fs) (seconds)
It is becoming. However, for waveform distortion that does not require a very large coefficient in the middle of the taps, but rather requires a coefficient at a position with a long delay time due to factors such as ghosting, tap intervals can be adjusted as shown in Figure 2. Waveform equalization is performed by switching to 1/Fs (seconds). This expands the time range in which waveform equalization is possible to a maximum of K/Fs (seconds).

Figure 4 shows the tap interval in 1/Fs (seconds).
This shows the simulated eye pattern when set to 1/2Fs (seconds). In FIG. 4, a is an input waveform, which is assumed to be a ghost signal with a delay of 1.5/Fs (seconds) and a level of 0.5. However, the number of quantization bits of the A/D converter of the waveform equalizer is
9bits, the number of operation bits of the transversal filter is 9bits, and the number of taps is 6Taps (front tap 5Taps, rear 10Taps). b is the tap interval 1/Fs,
(c) shows the eye pattern after waveform equalization at 1/2Fs. In Fig. 4 a, b, c, point A,
B and C indicate ideal sampling points, respectively. In FIG. 4b, the widest point of the eye pattern is shifted from point B, indicating that waveform equalization is insufficient. At point C, the point where the eye pattern is widest coincides with point C, indicating that the waveform equalization is sufficient.

As described above, according to this embodiment, the tap interval of the transversal filter is set to 1/Fs (seconds) and 1/2
By switching to Fs (seconds), waveform distortion that requires a coefficient in the middle of the tap is more important than the size of the time range that can be equalized, and vice versa. It is possible to perform waveform equalization that is sufficient even for distortions (ghosts, etc.).

FIG. 5 is a circuit configuration diagram showing another example of the configuration of the switch and delay circuit. 30 and 31 are delay circuits;
32 is a switch. Delay circuits 30 and 31 each delay the signal by one clock. switch 3
When 2 is set to the D side, the signal is delayed by 1 clock, and when set to the E side, the signal is delayed by 2 clocks.

In the above description, a digital transversal filter has been described as a device that performs waveform equalization, but the present invention is not limited to this. A digital filter of any configuration may be used. Furthermore, the configurations of the delay circuit and switch are not limited to the configurations described herein, and may be any configuration that can switch the delay time between a one-clock delay and a two-clock delay.

Effects of the Invention As described above, the present invention provides tap coefficient control for the first delay circuit having the same delay time as the sampling time of the input digital information signal and the second delay circuit having twice the delay time. By switching using a circuit, optimum waveform equalization without waveform distortion can be realized.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram of a waveform equalizer according to an embodiment of the present invention, FIGS. 2 and 3 are characteristic diagrams showing tap coefficient sequences of a transversal filter of the waveform equalizer of this embodiment, FIG. 4 is a waveform diagram showing an eye pattern, FIG. 5 is a circuit configuration diagram showing the configuration of a delay circuit and a switch, and FIG. 6 is a circuit configuration diagram of a conventional waveform equalizer. 11...A/D converter, 12, 13, 14
... Multiplier, 15, 16 ... Adder, 17, 1
8, 19, 20, 21, 22, 23, 24, 2
5, 30, 31...Delay circuit, 26, 27, 2
8, 32...Switch, 29...Tap coefficient control circuit, 100...Transversal filter.

Claims (1)

[Scope of Claims] 1. An A/D converter that samples an input digital information signal at a frequency twice the transmission speed of the digital information signal; and a device that multiplies the output of the A/D converter by a constant ( K
+1) multipliers, a first delay device that delays the output of the first multiplier, and an M-th (where 2<M
<K)-th multiplier output to be added to the (M-1)-th delay device output; a K-th delay device to delay the (K-1)-th adder output;
a digital filter having an adder that adds the output of the delay device and the output of the (K+1)th multiplier; and the delay of each of the delay devices based on the outputs of the A/D converter and the digital filter. a tap coefficient control circuit that varies time, each of the delay devices comprising a first delay circuit having the same delay time as the sampling time and a second delay circuit having twice the delay time. A waveform equalizer characterized in that said first and second delay circuits are switched by said tap coefficient control circuit. 2. The waveform equalizer according to claim 1, wherein the tap coefficient control circuit controls the delay time of each delay circuit. 3. The waveform equalizer according to claim 1, wherein the tap coefficient control circuit controls delay times of all delay circuits simultaneously. 4. The waveform equalizer according to claim 1, wherein the digital information signal is a digital information signal that is multiplexed with a television signal and transmitted.