JPH03257545A - Program working confirmation system - Google Patents

Abstract

PURPOSE:To facilitate the confirmation of the program working state by providing a ROM connected to a CPU via the address and data buses and a RAM having the same address constitution as the ROM, storing the programs read out of the ROM into the CPU and the RAM, and reading out these programs to compare them with each original program after the end of a test. CONSTITUTION:A CPU 1 is provided together with a ROM 2, an address bus 3, a data bus 4, a gate circuit 9, a selection circuit 11, and a RAM 14. The ROM 2 and the RAM 14 having the same address constitution are connected in multiple to the CPU 1 in parallel with each other via both buses 3 and 4. Thus the CPU 1 stores simultaneously the programs read out of the ROM 2 into the RAM 14 in various working tests. Then the CPU 1 reads out these program after the end of the working tests and compares successively the programs with each original one. Thus the normal working of each program is confirmed based on a fact whether the data are identical with each other or not in each address. In such a constitution, the program working state can be easily confirmed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a program operation confirmation method, and particularly to a program operation confirmation method when a microcomputer is used.

[Conventional technology]

Conventionally, the method of checking the normality of the operating state of a program when using a microcomputer is to conduct tests regarding normal processing and abnormal processing, and if the operation is normal, it is determined that normality has been confirmed. was.

FIG. 2 is a block diagram showing the configuration of a conventional program confirmation system. A CPU I and a ROM 2 are connected by an address bus 3 and a data bus 4. The ROM 2 stores a program, and the CPU 1 selects a program according to the content of the program in the ROM 2. Controls the 110 (input/output device). Read signal 5
A write signal 6 is a signal for writing to and reading from the ROM2. With such a configuration, tests regarding normal processing and abnormal processing are conducted to confirm the normality of the operating state of the program.

[Problem to be solved by the invention]

The above-mentioned conventional method for checking program operation status can be used to check if the entire program is actually working if there is a mismatch between the functional specifications of the microcomputer and the test contents, or if a combination test of different types is missed. The drawback is that it is not possible to determine whether or not there are any.

[Means to solve the problem]

In the program operation confirmation method of the present invention, a RAM having the same address configuration as a ROM that stores a program and is connected to the CPU via an address bus and a data bus is connected in parallel to the ROM via the address bus and data bus. Multi-connected, the CP in various operation tests
The program that U reads from the ROM is simultaneously stored in the RAM, and after performing the operation test, the program is sequentially read and compared with the original program, and the normality of the program operation is determined by whether the data at each address is the same. The system shall be configured with a means to confirm the

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the program operation confirmation method of the present invention.

In FIG. 1, 1 is a CPU, 2 is a ROM, 3 is an address bus, 4 is a data bus, 5 is a read signal, 6 is a write signal, 7 is a gate signal, 8 is a selection signal, 9 is a gate circuit, and 10 is a ROM read signal, 11 is selection circuit, 12 is R
AM write signal, 13 is RAM read signal, 14 is RA
It is M.

In FIG. 1, the same elements as in FIG. 2 are given the same numbers.

Next, the operation of the embodiment shown in FIG. 1 will be explained.

When the CPU is started, it outputs a gate signal 7, and also outputs a selection signal 8 that selects either the read signal 5 or the write signal 6, and when it starts, it outputs the write signal 6 from the CPU 1 as a RAM write signal 12. and supplies it to RAM14,
The read signal 5 is supplied from the gate circuit 9 to the ROM 2 as a ROM read signal 10 in response to the gate signal 7 .

The CPUI performs control etc. for each 110 minutes according to the program stored in the ROM2.

The program read from the ROM 2 by the CPU by the ROM read signal 10 is sent to the CPU via the data bus 4.
The data is input to I and also stored in the RAM 14 at the same time.

After carrying out various tests to confirm the operation of the program, the gate signal 7 is cut off, the selection signal 8 is output, and the CPU
The read signal 5 from I is used as the RAM read signal 13
Supply to AM14. Thereby, the program stored in the RAM 14 is read out and sequentially compared with the original program. If the data at the addresses of this comparison are the same, it means that the program is operating correctly; if the data are different, it can be seen that the program is not operating.

When the check is completed, the selection signal 8 is output and the CPU
The write signal 6 from RA is connected to the RAM write signal 12.
Initialize M14.

〔Effect of the invention〕

As explained above, the present invention provides a RAM with the same address configuration as the ROM connected to the CPU via an address bus and a data bus, stores a program to be read from the ROM in the RAM together with the CPU, and reads the program after the test is completed. This has the effect of making it easy to check the operating status of the program by comparing it with the original program.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a program operation confirmation method according to the present invention, and FIG. 2 is a block diagram showing an example of a conventional program operation confirmation method. 1... CPU, 2... ROM, 3... address bus, 4... data bus, 5... read signal, 6...
・Write signal, 7... Gate signal, 8... Selection signal, 9... Gate circuit, 10... ROM read signal,
11... Selection circuit, 12... RAM write signal, 1
3...RAM read signal, 14...ROM.

Claims (1)

[Claims] Multiple RAMs that store programs and have the same address structure as the ROM that is connected to the CPU via an address bus and a data bus are connected in parallel with the ROM via the address bus and data bus, and various types of operation tests are carried out. The program read by the CPU from the ROM is simultaneously stored in the RAM, and after the operation test is performed, the program is sequentially read and compared with the original program, and the normal operation of the program is determined by checking whether the data at each address is the same. A program operation confirmation method characterized by comprising a means for confirming the validity of a program.