JPH03257648A - Vxi bus line selector - Google Patents

Abstract

PURPOSE:To secure a high transfer rate per module by executing the selection of one line out of the full double serial data transfer buses of four lines and the control of inputting/outputting signals in the selected line by a software based on a control bit. CONSTITUTION:Eight TTLTRIG lines are respectively paired by two lines such as 0 and 1, 2 and 3, 4 and 5 and 6 and 7, and the full double serial data transfer buses of four lines are constructed. Then, the control bit of 4 bits such as ENABLE, SEL0, SEL1 and SEL2 in a control register 3 executes the selection of these lines (paired lines) and the control of inputting/outputting signals in the selected line. On the other hand, when no line is used, all outputs are disabled by setting the ENABLE bit at 0. Thus, even when efficiency is increased for utilizing the bus, the high transfer rate per module can be secured.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention is applicable to VX I (VMEbus Extensions), which is attracting attention as a new standard bus for measuring instruments.
For more information regarding the line selection device for In5trus+entatlon) buses, please refer to TTLTRI.
Regarding selection of bare line by G line software.

<Prior art> Regarding the VXI bus, for example, the magazine "Electronics J" published by Ohmsha, January 1990 issue 56
Pages 63 to 63 and pages 46 to 56 of the February issue of the same magazine provide an explanation of the development history, outline of the standard, recent trends, etc.

In other words, the VXI bus conforms to the international standard VME (Ver.
It is a standard that is based on the Sabus Modular Europe (Modular Europe) bus and adds essential functions for measuring instruments, such as miniaturization of the measurement system, high-speed data transfer between modules and between the measurement system and the host computer, and The open architecture allows measurement modules from multiple manufacturers to be installed within the same frame.

By inserting and mounting various measurement modules based on the VXI standard into the same main frame, one host computer screen can be transformed into various measurement instruments.

By the way, in general-purpose bus systems such as the VME bus, high-speed data transfer is generally achieved by parallel data transfer.

<Problems to be Solved by the Invention> However, in such a general-purpose bus, since a large number of modules use the same bus, a plurality of modules cannot transfer data at the same time.

For this reason, when a large number of modules are installed and bus utilization efficiency increases, there is a problem in that the transfer rate per module decreases.

Note that the transfer rate is expressed by the following formula.

Transfer rate - (amount of data transferred) / (time from when transfer is required until transfer is completed) The present invention was made with attention to these points, and its purpose is to
In the I bus, it is possible to ensure a high transfer rate per module even if the bus utilization efficiency is increased, and the accompanying selection of the TTLTRIG line pair line and control of signal input/output on the selected line are performed by software. The object of the present invention is to provide a VXI/<< line selection device.

Means for Solving the Problems> The present invention for solving the above problems is constructed by: a bus driver connected to each TTLTRIG line of the VXI bus; and dividing the TTLTRIG line of the vXI bus into two lines each. Control bits for selecting one line from the four-line full-duplex serial data transfer bus and controlling input/output of signals of the selected line or a register input from the VME bus, and control by the output signal of the register. and a multiplexer for selecting one line from the four lines.

According to the VXI bus line selection device of the present invention, TTLT
Selection of one line from a four-line full-duplex serial data transfer bus constructed by dividing the RIG line by two lines and control of signal input/output on the selected line are applied via the VME path. This is done by software based on control bits.

<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

First, in the VXI bus standard, the trigger bus consists of eight T
TL line (TTLTRIG) and 6 ECL lines (
ECLTRIG).

Here, electrical specifications are defined for the TTLTRIG line, but how to use them is: 1) 8 lines are used as a set of 1, 2 or 4 lines 2) Only 1 line is used 3) When using 2 lines as a set, pair 0 and 1°, 2 and 3, 4 and 5, and 6 and 7. 4) Use 4 lines as a set. In this case, it is only stipulated that O to 4 and 5 to 7 be paired.

Therefore, in the present invention, eight TTLTRIG lines are used as two line sets to construct four sets of full-duplex serial data transfer buses. The configuration is such that selection of a pair of TTLTRIG lines and control of signal input/output on the selected line can be performed by software.

FIG. 1 is a block diagram showing the concept of the present invention.

In the figure, a 4-bit control register 3 is connected to a VME bus 1 via a VME bus interface 2. Each TTLTRIG line 0 of VXI Hass 4
7 are connected to a bus driver 5, and the bus driver 5
A multiplexer 6 is connected to select a pair of TTLTRIG lines and control input/output of signals on the selected line. Four control bits are added to the multiplexer 6 from the control register 3, and a communication circuit in the card (not shown) is connected thereto. Here, the VME bus interface 2 and control register 3 may be configured arbitrarily depending on the application, or the bus driver 5 and multiplexer 6 may be configured as a second circuit common to all applications.
It is configured as shown in the figure.

In FIG. 2, terminals on the multiplexer 6 side of the bus driver 5 are connected to output terminals 0 to 7 of a 1 to 8 demultiplexer 7 with output enable control that constitutes the multiplexer 6, and terminals on the VXI bus side constitute the multiplexer 6. It is connected to input terminals 0 to 7 of an 8tol multiflexor 8. The input terminal of the demultiplexer 7 is connected to a TTLTRI GIN terminal of a communication circuit in a card (not shown), and the output terminal of the multiplexer 8 is connected to a TTLTRI GOUT terminal of a communication circuit in a card (not shown). The control terminals of the demultiplexer 7 are connected to the control register 3's ENABLE, 5ELO,
Four control bits 5ELI and 5EL2 are added to the control terminal of the multiplexer 8, and three control bits 5ELO, 5ELI and 5EL2 of the control register 3 are added to the control terminal of the multiplexer 8.

The operation of the device configured in this way will be explained.

First, 8 TTLTRIG lines are connected to 2 lines 0 and 1.
2, 3.4, 5.6, and 7 are combined to construct a 4-line full-duplex serial data transfer bus.

Then, selection of these lines (pair lines) and control of input/output of signals on the selected lines are controlled by ENABLE and 5ELO of control registers 3.

This is done using 4 control bits 5ELI and 5EL2. Also, if you do not use the line with
By setting the BLE bit to “0”, all outputs are disabled (all O, C, and outputs of the bus driver 5 are set to “0”).
HI”).

Figure 3 shows ENA output from control register 3.
BLE, 5ELO, 5ELI, 5EL2 4-bit control bit level “0” “11” and 8 TTLs
FIG. 7 is an explanatory diagram of the selection relationship of TRIG lines 0 to 7; Here, "H" means that the O, C, and outputs of the bus driver 5 are "HI".
” state, “OUT” is a state in which TTLTRIGOUT and the 0.C1 input of the corresponding bus driver 5 are connected, and “IN” is a state in which the corresponding TTLTRIGG line signal is inverted and connected to TTLTRIG IN. Note that in the case of "IN", the O, C, and outputs of the corresponding bus driver 5 become "Hl".

With this configuration, the selection and selection of a 4-line full-duplex serial data transfer bus constructed by combining 2 lines 0 and 1, 2 and 3, 4 and 5, and 6 and 7 of the eight TTLTRIG lines. Signal input/output on the selected line can be controlled by software, allowing line management to be performed easily and reliably.

<Effects of the Invention> As described in detail above, according to the present invention, in the VXI bus, a high transfer rate per module can be ensured even if the bus utilization efficiency increases, and the accompanying TTLTRIG line It is possible to provide a VXI bus line selection device that can select a pair line and control input/output of signals on the selected line using software.

[Brief explanation of drawings]

Figure 1 is a block diagram showing the concept of the present invention, and Figure 2 is a block diagram showing the concept of the present invention.
A block diagram of the main part of the figure, FIG. 3 is an explanatory diagram of the relationship between the control bits output from the control register and the selection of the TTLTRIG line. 1...VME bus 2...VME bus interface 3...Control register 4...VXI bus 5.Has driver 6...Multiplexer 7...1 to8 demultiplexer 8...8tol multiplexer

Claims (1)

[Claims] A bus driver connected to each TTLTRIG line of the VXI bus, and one line from a four-line full-duplex serial data transfer bus constructed by dividing the TTLTRIG line of the VXI bus into two lines each. a register into which control bits are input from the VME bus for selecting the line and controlling the input/output of signals of the selected line; and a multiplexer that is controlled by the output signal of the register and selects one line from the four lines. A VXI bus line selection device comprising: