JPH0326683Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Technical field This invention relates to a control circuit for power supply voltage supplied to a timer used in control equipment, etc., and in particular, power supply voltage control using a full-wave rectified output of AC power supply voltage as the power supply voltage. Regarding circuit improvement.

(b) Prior art and its drawbacks When supplying power supply voltage to a timer driven by an external power supply, it is necessary to prevent the timer from malfunctioning when the power is supplied, even if the rise of the power supply voltage is unstable. It needs to be steep. However, in conventional control circuits, the rise signal is obtained by a CR time constant circuit, so if the rise of the power supply voltage is unstable, it is not possible to obtain a clear rise signal.
The signal for initializing the internal circuit becomes uncertain, making it impossible to expect the timer to operate correctly. In order to eliminate this inconvenience, as shown in FIG.
Furthermore, by connecting a Zener diode D1 between the anode and gate of this thyristor Q, even if the rise of the power supply voltage is unstable, the
The rise of the voltage applied to a point can be made steep. However, if an AC power source is used as the power source as shown in Figure 2, and the voltage is full-wave rectified by the bridge rectifier circuit BR before being applied to the thyristor Q1, full-wave rectification will occur as shown in Figure 3. When the voltage reaches approximately 0V, the thyristor Q1 turns off, resulting in a certain rest period, which reduces the average value of the current supplied to the timer, and the timer may not operate properly.

(c) Purpose of the invention This invention eliminates the above drawbacks, and even if the rise of the power supply voltage is unstable, the rise of the voltage supplied to the power supply voltage supply terminal of the timer becomes a steep voltage, and the power supply voltage An object of the present invention is to provide a power supply voltage control circuit for a timer that can ensure the operation of the timer even when using a full-wave rectified voltage.

(d) Structure and effects of the invention This invention connects a thyristor to the power supply voltage supply terminal, and connects the thyristor's anode to
A Zener diode is connected between the gates, and a charging circuit is connected between the anode and cathode of the thyristor. When the power supply voltage exceeds the Zener voltage, the thyristor becomes conductive, thereby making the rise of the power supply voltage steeper and reducing the total wave rectified voltage
By discharging the charge in the charging circuit when the voltage reaches 0V, the current flowing through the thyristor is always greater than the holding current.

According to this invention, since the thyristor does not conduct when the power supply voltage does not exceed the Zener voltage, no power supply voltage is supplied to the timer when the power supply voltage is below the Zener voltage, and when the power supply voltage exceeds the Zener voltage, the thyristor does not conduct. Since the power supply voltage is supplied to the timer for the first time, even if the rise of the power supply voltage is very unstable, a voltage with a steep rise is reliably supplied to the power supply voltage supply terminal. Therefore, there is an advantage that operational reliability can be greatly improved. In addition, a charging circuit is connected between the anode and cathode of the thyristor, and even when the full-wave rectified voltage reaches 0V, the thyristor is always kept in an on state by discharging the charge in the charging circuit. Therefore, current is always supplied to the timer, and its operation can be ensured.

(e) Embodiment Figure 4 is a circuit diagram of a timer circuit that is an embodiment of this invention, and Figures 5A and B are waveform diagrams of full-wave rectified voltage, respectively, and voltage waveforms applied to the power supply voltage supply terminal of the timer. It is a diagram.

The difference in configuration from the timer circuit shown in FIG. 2 is that a charging circuit CHG consisting of a resistor R2 and a capacitor C1 is connected between the anode and cathode of the thyristor Q1. Note that the Zener voltage of the Zener diode D1 is determined by the timer T.
is set to the lowest operating voltage required for proper operation.

In the above timer circuit, when an AC power supply voltage AC is now applied between terminals a and b, it is full-wave rectified by the bridge rectifier circuit BR. As shown in FIG. 5A, when the rise of the full-wave rectified output by the fringe BR is relatively slow, the thyristor Q1 does not conduct until the voltage exceeds the Zener voltage of the Zener diode D1. When the full-wave rectified output voltage exceeds the Zener voltage VZ, the Zener diode D1 is turned on and the thyristor Q1 is also turned on. At the same time, the full-wave rectified output voltage at that time is applied to the power supply voltage supply terminal c of the timer T. As a result, a steep voltage is applied to the timer T even if the rise of the full-wave rectified output voltage is unstable.

At the same time as the thyristor Q1 becomes conductive, charging progresses to the capacitor C1 via the resistor R2, and at the same time the power supply voltage is supplied to the timer T, the charging circuit
CHG is charged. Then, when the rectified output voltage becomes lower than the charging voltage of the capacitor C1, the charge charged in the capacitor C1 starts discharging. This discharge continues even when the rectified output voltage becomes completely 0V, and the discharge current i maintains the on state of the thyristor Q1. Therefore, the next time the full-wave rectified output voltage rises, the rising voltage is directly applied to the terminal c because the thyristor Q1 is in the on state. Therefore, as shown in FIG. 5B, the rectified output voltage is applied almost as is to the power supply voltage supply terminal c of the timer T after time t has elapsed, and as shown in FIG. 3B, There are no downtime periods. Therefore,
A larger current is supplied to the timer T compared to the circuit shown in FIG. 2, and the operation of the timer T can be ensured.

FIG. 6 is a more detailed circuit diagram of the timer circuit.

Timer T is a keep relay set coil XS,
Reset coil XR, timer control circuit TIC,
Constant voltage circuit consisting of Zener diode D2 and transistor Tr1, and timer control circuit TIC
Power supply capacitor C3 and reset coil XR
It is composed of a control transistor Tr2 and other elements.

When the power supply AC is turned on, the bridge rectifier circuit BR
The full-wave rectified output is applied to thyristor Q1. When the rectified output voltage is lower than the Zener voltage of the Zener diode D1, the thyristor Q1 is off, so the subsequent circuits do not operate. When the rectified output voltage becomes higher than the above Zener voltage,
Thyristor Q1 turns on and applies a steeply rising voltage to the subsequent circuits. The steep rising voltage flows through the keep relay's set coil XS, diode D3, and capacitor C4, operating the keep relay to the set side. It also passes through the diode D4, supplies voltage to the timer control circuit TIC, and charges the power supply capacitor C3 of that circuit. After that, when the power supply voltage is turned off, the voltage at the SET terminal of the timer control circuit TIC decreases, and the timer starts measuring time. Timer control circuit between
The power supply voltage necessary for TIC operation is supplied from capacitor C3. When the set time has elapsed, the timer control circuit TIC outputs an output to the OUT terminal.
Turn on transistor Tr2. At this time, the charge stored in capacitor C4 is transferred to the reset coil.
Discharge through XR and operate the keep relay to the reset side. Diode D5 has a power supply voltage of
If the voltage does not reach 0V and remains, the holding current of thyristor Q1 is cut off, the charge in capacitor C4 is completely discharged, and the set coil is turned on the next time the power is turned on.
It is attached to allow sufficient current to flow through the XS.
Also, the reset input terminal of the timer control circuit TIC.
A reset switch RSW is connected to RESET, and when this switch is operated, the keep relay is forced to operate to the reset side. That is, when the reset switch RSW is turned on, the constant voltage transistor is connected via the diode D8.
The base voltage of Tr1 is lowered, thereby causing the timer control circuit TIC to output an OUT output, causing a discharge current to flow through the reset coil XR, and operating the keep relay to the reset side.

The operations of the capacitor C1 and the resistor R2 are exactly the same as those described with reference to FIG. 4 above, and the waveform of the voltage applied to the timer is the waveform shown in FIG. 5B.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of the timer power supply voltage control circuit that is the premise of this invention, and Figure 2 is a circuit diagram of the power supply voltage control circuit when a full-wave rectifier circuit is further connected.
FIGS. 3A and 3B are a waveform diagram at the rise of the full-wave rectified output voltage and a waveform diagram of the voltage applied to the timer, respectively. FIG. 4 is a circuit diagram of a power supply voltage control circuit according to an embodiment of the present invention, and FIGS. 5A and 5B are a waveform diagram at the rise of the full-wave rectified output voltage and a waveform diagram of the voltage applied to the timer, respectively. Furthermore, FIG. 6 is a more detailed circuit diagram than the circuit shown in FIG. BR... Bridge rectifier circuit, Q1... Thyristor, D1... Zener diode, CHG... Charging circuit.

Claims (1)

[Scope of Claim for Utility Model Registration] (1) In a circuit that full-wave rectifies AC power supply voltage and supplies it to a timer, a thyristor is connected to the power supply voltage supply terminal of the timer in the forward direction with respect to the current inflow direction, and A Zener diode is connected between the anode and gate of this thyristor so that its anode is on the gate side of the thyristor, and a charging circuit is connected between the anode and cathode of the thyristor to supply full-wave rectified voltage to the timer. A power supply voltage control circuit for a timer. (2) The power supply voltage control circuit for a timer according to claim 1, wherein the Zener voltage of the Zener diode is set to the minimum operating voltage of the timer.