JPH0326860B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a microprogram control device used in a data processing device.

(Prior Art) The reading, interpretation, and execution of software instructions in a data processing device are classified into dozens of basic operation combinations, such as information transfer between registers, operation commands to main memory, digit shifting, and addition. can.
Software instructions are executed by sequentially executing several to several dozen basic operations, and instructions specifying these basic operations are called microinstructions.

The reading, interpretation, and execution of software instructions can be described in the form of a program (microprogram) consisting of a combination of microinstructions. A control memory for storing this microprogram, an address generation circuit for generating a control memory address, and an instruction decoding conversion unit for decoding microinstructions included in the read program and converting them into hardware control signals. By providing a circuit, control of software instructions can be realized. This means is called a microprogram control system, and has the following advantages: complex control can be clearly described, flexibility in function expansion, and change is easy. Furthermore, it is well known that a diagnostic method (microdiagnosis) written at the microprogram level can achieve a high detection rate and high resolution for failures.
Furthermore, microdiagnosis has the advantage that diagnosis can be realized with small hardware.

(Problems to be Solved by the Invention) When diagnosing functional blocks composed of RAM such as cache memory and scratchpad memory using this microdiagnosis method in a microprogram control device, a large amount of diagnosis is required. Data is needed. Although it is possible to generate this type of data by operating an arithmetic circuit under the control of a microprogram, this has the drawback of increasing the amount of hardware, so a method of generating data from a control memory is more desirable. On the other hand, in conventional control memory, many constant fields that can be used as data fields also serve as branch address fields, and are about 2 bytes wide at most. Therefore, in this kind of control memory
The drawback of running a diagnostic on a block containing RAM is that it requires a huge number of steps.
Also, some types of microprogram controllers
A so-called n-way branching method is adopted in which a plurality of conditions are referenced at once and, depending on the result, only one condition is selected from a large number of branch destinations and branched.
In this type of branching operation, a combination of conditions may lead to a branch selection that does not logically branch. The locations in the control memory indicated by the branch destination addresses corresponding to this selection branch exist discretely, and this has the disadvantage of resulting in wasted hardware that cannot be used during execution of the microprogram.

An object of the present invention is to perform control so that a wide range of data placed at an address different from the address of a microinstruction that instructs a constant read operation within a control memory can be read, and to control a large amount of data. The above-mentioned disadvantages are eliminated by making it possible to arrange it discretely, reducing the number of diagnostic microprogram steps that require a large amount of data inside the RAM, and making it possible to effectively use unused control memory locations. The object of the present invention is to provide a microprogram control device with the following features.

(Means for Solving the Problems) A microprogram control device according to the present invention includes a control memory, a read register, an address generation means, a decoder, a detection means, and a hardware control circuit. It is.

Control memory is for storing microinstruction words.

The read register is for reading the contents of the control memory.

The address generation means is for generating a read address for control storage.

The decoder is for decoding the control field of the microinstruction word read and stored in the read register.

The detection means is for detecting the end of work due to execution of the microinstruction word.

The hardware control circuit is activated by the output of the decoder, controls the address generating means to select the branch destination address field of the read register as the read address, reads the microinstruction word from the control memory to the read register, and reads the microinstruction word from the control memory to the read register. This is to suppress the decoding operation, transfer the data in the control field to the outside, and continue the above operation using the address field of the newly read microinstruction word until the termination event of the activated operation occurs. It is.

(Example) Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of a microprogram control device according to the present invention. 1st
In the figure, 1 is a control memory, 2 is a read register, 3 is an address switch, 4 is an address adder, 5 is a micro address register, 6 is a first decoder, 7 is a second decoder, 12 is a working memory, 20 is a hardware control circuit, 21 is a working address register, and 23 is a detection circuit.

In FIG. 1, the microinstruction word read from the control memory 1 is stored in the read register 2, and the read address of the control memory 1 is set by the address switch 3.
Selected by This address is incremented by 1 in the address adder 4 and held in the microaddress register 5 as the control storage address to be read in the next machine cycle.

FIG. 2 is a diagram showing an example of the microinstruction word format in this embodiment. When this type of microprogram is stored in the read register 2, the contents of the first CMD field (CMD1) are decoded by the first decoder 6 and control signals for the peripheral circuits of the control memory 1 are generated. For example, the first
If the contents of the CMD field specify execution of a microinstruction at a subsequent address in the next machine cycle, the address switch 3
The output of the first decoder controls the output of the first decoder to select the output of the microaddress register 5. on the other hand,
If the contents of the first CMD field specify a branch operation, the first decoder 6
1, the address switch 3 is controlled to select the output of the ARG field of the read register 2. The second decoder 7 decodes the contents of the second CMD field and creates a control signal for the arithmetic circuit system.

In FIG. 1, only the working memory 12 is shown as an arithmetic circuit, and the others are omitted. The write address of the working memory 12 is supplied from the working address register 21. The work address register 21 increments the value held by the control signal from the first decoder 6 by 1 and performs an addition operation, or
or perform a load operation on the ARG field.

Next, the diagnostic data load 2 (MDL2) microinstruction will be explained. This type of microinstruction is the first CMD of the microinstruction word shown in Figure 2.
Specified by field. The ARG field of the microinstruction word indicates the storage address of the first word of the diagnostic data. FIG. 3 is a diagram showing that each word of the data is composed of an address field and a data field. The address part specifies the address where subsequent data is stored. FIG. 4 is a diagram illustrating the relationship between the microinstruction words. In Figure 4, the microinstruction word containing the MDL2 microinstruction stored at address A and the diagnostic data words arranged discretely are shown.
It is shown that they are linked by the address stored in the ARG field. Therefore,
a ₀ according to the address specified by the ARG field,
By reading the microinstructions in the order of a ₁ , a ₂ , . . . , the discretely arranged diagnostic data can be linked and used as continuous data d ₀ , d ₁ , d ₂ , .

In FIG. 1, the write start address of the working memory 12 is loaded from the ARG field of the read register 2 into the working address register 21 by the decode signal of the first CMD field. When the MDL2 microinstruction is loaded into the read register 2, the microinstruction is decoded by the first decoder and the hardware control circuit 2
0 is activated. At the same time, the address switching circuit 3 selects the ARG field (address a ₀ ) of the read register 2 via the control signal line 31.
control. As a result, a ₁ ,
_d0 data is read. A decoding inhibition instruction is sent to the first and second decoders 6 and 7 via the signal line 32 so that the read data is not decoded as a microinstruction until a series of diagnostic operations are completed. The hardware control circuit 20 is connected to the signal line 3
3 to the working memory 12, and writes the data _d0 present in the read register 2 to the address B designated by the working address register 21. In parallel with this, as a preparation work for the subsequent operation, the hardware control circuit 20 sends the read register 2 to the address switch 3 via the signal line 34.
Select ARG field a ₁ and from control memory 1
Read the contents a ₂ and d ₁ of address a ₁ . At the same time, the value set in the working address register 21 via the signal line 35 is incremented by 1 to create the address (B+1) to be written next. Similarly below,
Data read from the control memory 1 and concatenated can be written successively to the working memory 12. The output of the working address register 21 is also sent to a detection circuit 23, and when the detection circuit 23 detects a certain value, it sends a detection signal to the hardware control circuit 20 via a signal line 36. The hardware control circuit 20 writes data to the work memory 12 and writes the data to the work address register 21 in response to the arrival of the above signal.
The update of the contents of is canceled and a restart operation controlled by the microprogram is executed. That is, an instruction is sent to the address switching circuit 3 via the signal line 34 to select the next address (A+1) of the MDL2 microinstruction word held in the microaddress register 5, and (A+1) of the control memory 1 is sent. When the data at the address is loaded into the read register 2, the decoding inhibit signal sent via the signal line 32 is released. At this point, the operation of the MDL2 microinstruction is completed and microinstruction control is activated.

(Effects of the Invention) As explained above, the present invention has a feature that makes it possible to read a wide range of data placed in a control memory at an address different from the address of a microinstruction that instructs a constant read operation. This has the effect of reducing the number of execution steps in block diagnosis and reducing unnecessary hardware by allowing a large amount of data to be placed discretely.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of a microprogram control device according to the present invention. Second
The figure is an explanatory diagram illustrating the microinstruction word format according to the present invention. FIG. 3 is an explanatory diagram showing the data word format to be processed by the MDL2 instruction. FIG. 4 is a conceptual diagram showing the operation of the MDL2 instruction. 1...Control memory, 2...Read register, 3...
...Address switcher, 4...Address adder, 5
... Micro address register, 6, 7 ... Decoder, 12 ... Working memory, 20 ... Hardware control circuit, 21 ... Working address register, 2
3...Detection circuit, 31-36...Signal line.

Claims (1)

[Claims] 1. A control memory for storing a microinstruction word, a read register for reading the contents of the control memory, an address generating means for generating a read address for the control memory, and a read register for reading the contents of the control memory. a decoder for decoding the control field of the microinstruction word stored in the microinstruction word, a detection means for detecting the end of work due to execution of the microinstruction word; controls the address generating means to select a branch destination address field of as a read address, reads a microinstruction word from the control memory to the read register, inhibits the decoding operation of the decoder, and selects the branch destination address field of the control field as the read address; to the outside,
and a control circuit for continuing the operation using an address field of a newly read microinstruction word until an end event of the activated operation occurs. Device.