JPH03270331A - Signal interrupt detection system - Google Patents

Signal interrupt detection system

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Publication number
JPH03270331A
JPH03270331A JP2069128A JP6912890A JPH03270331A JP H03270331 A JPH03270331 A JP H03270331A JP 2069128 A JP2069128 A JP 2069128A JP 6912890 A JP6912890 A JP 6912890A JP H03270331 A JPH03270331 A JP H03270331A
Authority
JP
Japan
Prior art keywords
signal
interruption
filter
output
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2069128A
Other languages
Japanese (ja)
Inventor
Hiroo Kitasagami
北相模 博夫
Takashi Tsuda
津田 高至
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2069128A priority Critical patent/JPH03270331A/en
Publication of JPH03270331A publication Critical patent/JPH03270331A/en
Pending legal-status Critical Current

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  • Dc Digital Transmission (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To easily detect interruption of a reception signal by detecting a signal interruption due to increase in noise caused by the interrupt of the reception signal. CONSTITUTION:A reception amplifier reaches a maximum gain at interruption of a reception signal and lots of frequency components are included in a noise signal wave. In this case, only a clock frequency component of a transmission line goes to a 0 level and other frequency component signal remains, then the signal is outputted from a delay/adder means 110 as a signal amplitude. An output of the delay/adder means 110 is fed to a signal interruption detection means 130 to detect signal interruption as a difference between a 0 level at normal state and a noise component at interruption of the reception signal. Thus, the interruption of the reception signal is easily detected.

Description

【発明の詳細な説明】 (概 要〕 光デイジタル信号伝送の受信回路における信号断検出方
式に関し、 容易に受信信号の断の検出ができる信号断検出方式を提
供することを目的とし、 受信信号を増幅した後伝送路クロック周波数成分を抽出
して出力するフィルタを有し、フィルタの出力からクロ
ック信号を得る受信回路において、フィルタに接続され
、フィルタの出力と、フィルタの出力の位相を1/2周
期ずらした信号とを加算する遅延/加算手段と、遅延/
加算手段乙こ接続され、受信信号の断時に政断による雑
音の増加により信号断を検出する信号断検出手段とを設
けて構成する。
[Detailed Description of the Invention] (Summary) Regarding a signal disconnection detection method in a receiving circuit for optical digital signal transmission, an object of the present invention is to provide a signal disconnection detection method that can easily detect disconnection of a received signal. In a receiving circuit that has a filter that extracts and outputs a transmission line clock frequency component after amplification and obtains a clock signal from the output of the filter, it is connected to the filter and the phase of the output of the filter and the output of the filter are halved. delay/addition means for adding signals with shifted periods;
A signal interruption detection means is connected to the addition means and is configured to detect a signal interruption due to an increase in noise caused by a political decision when the received signal is interrupted.

〔産業上の利用分野〕[Industrial application field]

本発明は、光デイジタル信号伝送の受信回路における信
号断検出方式の改良に関するものである。
The present invention relates to an improvement in a signal disconnection detection method in a receiving circuit for optical digital signal transmission.

光信号の送信側のレーザダイオードの故障又は(云送路
と1−での光ファイバの断等により、光受信回路の信号
の断が生しることがある。この場合、後段の回路−の悪
影響を避は信頼性の低下を防ぐためにも、受信信号の断
の検出が行われる。その際、容易に受信信号の断の検出
ができる信号断検出方式が要望されている。
The signal in the optical receiving circuit may be interrupted due to a failure of the laser diode on the transmitting side of the optical signal or a break in the optical fiber at the transmission line and 1-. In order to avoid adverse effects and reduce reliability, detection of a disconnection of a received signal is performed.At this time, there is a need for a signal disconnection detection method that can easily detect a disconnection of a received signal.

〔従来の技術〕[Conventional technology]

第4図は一例の光信号受信回路の構成を示すブロック図
である。
FIG. 4 is a block diagram showing the configuration of an example optical signal receiving circuit.

第5図は第4図に示す回路の動作を示すタイムチャート
である。
FIG. 5 is a time chart showing the operation of the circuit shown in FIG. 4.

第6図は従来例の信号断検出回路の構成を示すブロック
図である。
FIG. 6 is a block diagram showing the configuration of a conventional signal disconnection detection circuit.

第4図は光デイジタル信号の受信回路を示すが、同図に
おいて、光ファイバ等の伝送路から受信した光信号は、
例えばアバランシェ・ホトダイオードC以下APDと称
する)IL:より第5図のに示すような電気信号に変換
され、出力がアンプ2を介して増幅された後識別回路5
及びSAWフィルタ3に加えられる(第5図■及び■゛
参照AWフィルタ3は伝送路のクロック周波数成分を通
すバンドパスフィルタであり、第5図■に示ずようなS
A−フィルタ3を通った所定周波数の正弦波信号は、リ
ミッタアンプ4に加えられる。
FIG. 4 shows a receiving circuit for optical digital signals. In the figure, the optical signals received from the transmission line such as optical fiber are
For example, an avalanche photodiode C (hereinafter referred to as APD) IL: is converted into an electrical signal as shown in FIG.
and added to the SAW filter 3 (see Figure 5 ■ and ■) The AW filter 3 is a bandpass filter that passes the clock frequency component of the transmission path, and the SAW filter 3 as shown in
A sine wave signal of a predetermined frequency that has passed through the A-filter 3 is applied to a limiter amplifier 4.

リミッタアンプ4において、入力信号の上下がカットさ
れて第5図■に示ずような所定周波数のクロック信号を
出力する。識別回路5において、上記リミッタアンプ4
の出力のクロック信号のタイミングにより、前述したよ
うにアンプ2の出力を人力した信号の“1”と“0”の
識別を行い、第5図■に示ずような矩形波の信号を出力
していた。
The limiter amplifier 4 cuts the upper and lower parts of the input signal and outputs a clock signal of a predetermined frequency as shown in FIG. In the identification circuit 5, the limiter amplifier 4
According to the timing of the clock signal output from the amplifier 2, the output of the amplifier 2 is discriminated between "1" and "0" as described above, and a rectangular wave signal as shown in Figure 5 (■) is output. was.

今、APD 1への入力信号が断になったとすると1、
第6図に示すように、リミッタアンプ4内のリニアアン
プ6を介した後ピーク検出回路7でピーク検出を行い、
検出ピーク値を比較器8に出力する。
Now, if the input signal to APD 1 is cut off, 1,
As shown in FIG. 6, peak detection is performed in the peak detection circuit 7 after passing through the linear amplifier 6 in the limiter amplifier 4.
The detected peak value is output to the comparator 8.

比較器8番こおいて上記検出ピーク値と予め設定した基
準値VreLとの比較を行い、信号振幅レベルの正常時
と信号断時の差により受信信号の断を検出していた。
Comparator No. 8 compares the detected peak value with a preset reference value VreL, and detects the interruption of the received signal based on the difference between the normal signal amplitude level and the signal interruption.

[発明が解決し7ようとする課題] しかしながら上述の回路乙、二おいては、受信信号の断
時にはAPD 1はノイズを発住し、一方、アンプ2は
最大利得の状態にあるため、ノイズが増幅されSAWフ
ィルタの出力の信号レベル差を検出するのは容易ではな
いという問題点があった。
[Problems to be Solved by the Invention] However, in the above circuits B and B, when the received signal is interrupted, APD 1 generates noise, while amplifier 2 is in the maximum gain state, so noise is generated. There is a problem in that it is not easy to detect the difference in signal level between the outputs of the SAW filters.

1−たがって本発明の目的は、容易に受信信号の断の検
出ができる信号断検出方式を提供することにある。
1- Therefore, it is an object of the present invention to provide a signal disconnection detection method that can easily detect disconnection of a received signal.

〔課題を解決するための手段] 上記問題点は第1図に示す回路の構成によって解決され
る。
[Means for Solving the Problems] The above problems are solved by the circuit configuration shown in FIG.

即ち第1図において、受信信号を増幅しまた後伝送路り
ロンク周波数成分を抽出して出力するフィルタ300を
有し、該フィルタ300の出力からクロック信号を得る
受信回路において、 110はフィルタ300に接続され、フィルタ300の
出力と、フィルタ300の出力の位相を1/2周期ずら
した信号とを加算する遅延/加算手段である。
That is, in FIG. 1, in a receiving circuit that has a filter 300 that amplifies a received signal and extracts and outputs a long frequency component on the post-transmission path, and obtains a clock signal from the output of the filter 300, 110 is a circuit that is connected to the filter 300. It is a delay/adding means that is connected to the filter 300 and adds the output of the filter 300 and a signal obtained by shifting the phase of the output of the filter 300 by 1/2 period.

130は遅延/加算手段110に接続され、受信信8の
断時に信ぢ断を検出する信号断検出手段である。
Reference numeral 130 denotes signal interruption detection means that is connected to the delay/addition means 110 and detects a signal interruption when the received signal 8 is interrupted.

〔作 用] 第1図において、遅延/加算手段110 Lこおいてフ
ィルタの出力と、フィルタ300の出力の位相(これは
伝送路のクロンク周波数に等しい周波数を有する信号の
位相)を1/2周期ずらした信Bどの加算を行う。この
結果、正常時にはその位相が互いに打ち消され、遅延/
加算手段110の出力は“0” レヘルとなる。
[Function] In FIG. 1, the phase of the output of the filter and the output of the filter 300 (this is the phase of a signal having a frequency equal to the clock frequency of the transmission line) is halved by the delay/addition means 110L. Addition of signal B whose period has been shifted is performed. As a result, under normal conditions, their phases cancel each other out, causing delay/
The output of the adding means 110 becomes "0" level.

一方、受信信号の断時には、受信アンプは最大利得とな
り、雑音による信号波には多くの周波数成分が含まれる
。この場合、伝送路のクロック周波数成分のみ0″ レ
ヘルとなるが、他の周波数成分の信号が残るため信号振
幅として、遅延/加算手段110から出力されることに
なる。
On the other hand, when the received signal is interrupted, the receiving amplifier has the maximum gain, and the signal wave due to noise contains many frequency components. In this case, only the clock frequency component of the transmission path becomes 0'' level, but since signals of other frequency components remain, they are output from the delay/addition means 110 as signal amplitudes.

この遅延/加算1段110の出力を信号断検出手段13
0に加えることにより、正常時の“0”レベルと、受信
信号の断時の雑音成分との差として信号断を検出するこ
とが可能となる。
The output of this delay/addition stage 110 is detected by the signal disconnection detection means 13.
By adding it to 0, it becomes possible to detect a signal interruption as the difference between the normal "0" level and the noise component when the received signal is interrupted.

〔実施例] 第2図は本発明の実施例の回路の構成を示す図である。〔Example] FIG. 2 is a diagram showing the configuration of a circuit according to an embodiment of the present invention.

第3図は実施例の動作を説明する図である。FIG. 3 is a diagram illustrating the operation of the embodiment.

全図を通じて同一符号は同一対象物を示す。The same reference numerals indicate the same objects throughout the figures.

第2図において、トランジスタ(以下Trと称する)1
0のベースに、第4図に示すSA−フィルタ3の出力を
加える。T rlOはいわゆるエミッタホロア形Tr回
路であり、エミッタ出力に整合用の抵抗Ro  (例え
ば75Ω)が接続されている。そして抵抗ROの他端に
コンデンサC0を介して、例えば他端をオープンにした
同軸線(その特性インピーダンスZoを例えば75Ωと
する)からなる遅延線11の一端を接続する。そしてこ
の遅延線11の遅延量を1/4Toに設定する。ここに
TOはT□=l/fo、foは伝送路のクロック周波数
であり、SA−フィルタ3の出力周波数でもある。
In FIG. 2, a transistor (hereinafter referred to as Tr) 1
The output of the SA-filter 3 shown in FIG. 4 is added to the base of 0. T rlO is a so-called emitter follower type Tr circuit, and a matching resistor Ro (for example, 75Ω) is connected to the emitter output. One end of a delay line 11 made of, for example, a coaxial line (its characteristic impedance Zo is 75Ω, for example) with the other end open is connected to the other end of the resistor RO via a capacitor C0. Then, the delay amount of this delay line 11 is set to 1/4To. Here, TO is T□=l/fo, and fo is the clock frequency of the transmission line and is also the output frequency of the SA-filter 3.

T rloの出力は遅延線11の人力部で分岐され、一
方は遅延線11で全反射されて、遅延線11の入力部で
元の信号と加算される。その結果、正常時には反射波の
位相が元の信号の位相と1/2周期ずれているため、第
3図(a)に示すように合成液は“0” レベルとなる
。
The output of T rlo is branched at the input section of the delay line 11, one side is totally reflected at the delay line 11, and added to the original signal at the input section of the delay line 11. As a result, under normal conditions, the phase of the reflected wave is out of phase with the original signal by 1/2 period, so the synthetic liquid becomes at the "0" level as shown in FIG. 3(a).

一方、受信信号の断時には、アンプ2の利得は最大とな
り、APD 1もノイズを発生するため、雑音も正常時
に比べて多くなる。この雑音による信号波には多くの周
波数成分が含まれる。第3図(b)に示すように遅延線
11の入力部における合成液は、上述したfOの周波数
成分のみが“0”レベルとなるが、他の周波数成分が残
るため信号振幅として現れる。この出力をT r12を
介して、T r12のエミッタに接続されたコンデンサ
C3と比較回路13に加えることにより、コンデンサC
3と比較回路13に含まれる抵抗(図示しない)により
ピーク検出される。
On the other hand, when the received signal is interrupted, the gain of the amplifier 2 is maximum, and the APD 1 also generates noise, so the noise is also greater than in normal times. The signal wave due to this noise includes many frequency components. As shown in FIG. 3(b), in the synthetic liquid at the input part of the delay line 11, only the above-mentioned fO frequency component is at the "0" level, but other frequency components remain and appear as signal amplitude. By applying this output to the capacitor C3 connected to the emitter of T r12 and the comparison circuit 13 via T r12, the capacitor C
3 and a resistor (not shown) included in the comparison circuit 13, the peak is detected.

比較回路13において、このピーク値と予め設定した基
準値Vrefzとを比較することにより、受信信号の断
時に信号の断の検出を行う。
In the comparison circuit 13, by comparing this peak value with a preset reference value Vrefz, signal interruption is detected when the received signal is interrupted.

正常時には、遅延線11にまり合成液が“0”レベルと
なっているため、正常時と信号断時の識別を容易に行う
ことができる。
During normal operation, the synthetic liquid trapped in the delay line 11 is at the "0" level, so that it is easy to distinguish between normal operation and signal interruption.

図において 110は遅延/加算手段、 130は信号断検出手段 を示す。In the figure 110 is a delay/addition means; 130 is a signal disconnection detection means shows.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、容易に受信信号の
断の検出を行うことができる。
As explained above, according to the present invention, it is possible to easily detect a disconnection of a received signal.

【図面の簡単な説明】 第1図は本発明の原理図、 第2図は本発明の実施例の回路の構成を示す図、第3図
は実施例の動作を説明する図、 第4図は一例の光信号受信回路の構成を示すブロック図
、 第5図は第4図に示す回路の動作を示すタイムチャート
、 第6図は従来例の信号断検出回路の構成を示すブロック
図である。 本発明の原理図 晃1 図 本発明の実施例の回路の掻戊家示=を図案 2 図 一例の尤イLす受信回粘・の構成に示すブロック間第 
4 図 従来Pj0)信号断検出回鞘の構成文示プブlコック悶
第 6 図 正常時 (a) (b) 実施例の動作2譚明テる図 ■ ■ 第4図ヒホj−回躇の剥乍F示J−タイZ\千−X− 第 図
[Brief Description of the Drawings] Fig. 1 is a diagram showing the principle of the present invention, Fig. 2 is a diagram showing the circuit configuration of an embodiment of the present invention, Fig. 3 is a diagram explaining the operation of the embodiment, Fig. 4 is a block diagram showing the configuration of an example optical signal receiving circuit, FIG. 5 is a time chart showing the operation of the circuit shown in FIG. 4, and FIG. 6 is a block diagram showing the configuration of a conventional signal disconnection detection circuit. . The principles of the present invention are as follows: Figure 1: An illustration of the circuit of the embodiment of the present invention;
4 Figure 4 shows the structure of the conventional Pj0) Signal disconnection detection circuit. 6 Figure 2 shows the operation of the embodiment during normal operation (a) (b). ■ ■ Figure 4. Peeling of F

Claims (1)

【特許請求の範囲】  受信信号を増幅した後伝送路クロック周波数成分を抽
出して出力するフィルタ(300)を有し、該フィルタ
(300)の出力からクロック信号を得る受信回路にお
いて、 該フィルタ(300)に接続され、該フィルタ(300
)の出力と、該フィルタ(300)の出力の位相を1/
2周期ずらした信号とを加算する遅延/加算手段(11
0)と、 該遅延/加算手段(110)に接続され、該受信信号の
断時に該断による雑音の増加により信号断を検出する信
号断検出手段(130)とを設けたことを特徴とする信
号断検出方式。
[Claims] A receiving circuit that includes a filter (300) that extracts and outputs a transmission line clock frequency component after amplifying a received signal, and that obtains a clock signal from the output of the filter (300), 300) and the filter (300
) and the output of the filter (300) by 1/
Delay/addition means (11
0), and signal interruption detection means (130) connected to the delay/addition means (110) and detecting a signal interruption by an increase in noise due to the interruption when the reception signal is interrupted. Signal disconnection detection method.
JP2069128A 1990-03-19 1990-03-19 Signal interrupt detection system Pending JPH03270331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2069128A JPH03270331A (en) 1990-03-19 1990-03-19 Signal interrupt detection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2069128A JPH03270331A (en) 1990-03-19 1990-03-19 Signal interrupt detection system

Publications (1)

Publication Number Publication Date
JPH03270331A true JPH03270331A (en) 1991-12-02

Family

ID=13393694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2069128A Pending JPH03270331A (en) 1990-03-19 1990-03-19 Signal interrupt detection system

Country Status (1)

Country Link
JP (1) JPH03270331A (en)

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