JPH03273621A - Manufacture of semiconductor memory - Google Patents

Abstract

PURPOSE:To manufacture a semiconductor memory having the large area with out using a large laser device by forming a plurality of first regions wherein memory cells are arranged and a second region wherein memory cells are not arranged in a memory cell array part, projecting laser light on each first region, and performing annealing. CONSTITUTION:For example, when a laminated CMOS-type SRAM of 4-M bits is manufactured, memories of every 2-M bits are arranged in each of first regions 14 and 15. The width of second region 16 is set at, e.g. 50mum or more. Polycrystalline Si thin films for forming thin film pMOS transistors are formed on the first regions 14 and 15. Excimer laser light is sequentially projected on each of the first and second regions 14 and 15, and the polycrystalline Si thin films are annealed. Thus the required treatments are performed, and the memory cell is completed. At this time, even if there is an error in position alignment of illuminated region as 11 and 12, a non-illuminated region 17 is formed in the second region 16 so that the illuminated regions are not over lapped. Wirings are formed in the second region of Al films and the like and brought into contact with the polycrystalline Si thin film within the first regions.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method of manufacturing a semiconductor memory in which annealing with laser light is performed when forming a memory cell.

[Summary of the invention]

The present invention provides a semiconductor memory manufacturing method as described above, in which a first region in which memory cells are arranged and a second region in between in which memory cells are not arranged are formed in a memory cell array section, and the first region By performing annealing by irradiating the semiconductor memory with laser light, it is possible to manufacture a large-area semiconductor memory without using a large laser device.

[Conventional technology]

In SRAM, which is a type of semiconductor memory, as density increases, the structure of the memory cell array section is shifting from a resistive load type to a stacked OMO3 type. This laminated 0MO3
type, thin film pMO3 on bulk nMO5 transistor
1-The transistors are stacked.

Annealing using excimer laser light is expected to improve the performance of the polycrystalline Si thin film for forming the thin film pMO31-transistor and to anneal the main parts of the source and drain.

This is because excimer laser light can anneal only the polycrystalline 5ill film without thermally affecting the underlying layer, making it possible to form a good thin film 9MOS transistor without destroying the bulk nMOS transistor. This is because it can be done.

[Problem to be solved by the invention]

Incidentally, excimer lasers are surface lasers, but there is a limit to their ability to produce large outputs, and at present, the maximum output of excimer lasers is about 500 mJ.

Then, about 30% is lost due to an optical homogenizer, a reflecting mirror, etc. for converting the intensity distribution of the laser light from a Gaussian distribution to a uniform distribution, and when the laser light reaches the semiconductor wafer surface, it becomes about 350 mJ.

On the other hand, for example, if the chip area of a 16M pin SRAM is 11
X19#20Lw", and the energy density required for effective annealing of the polycrystalline 5iIl film is 250 m J cs-2.
Then, 250 x 2.09 = 522.5 mJ of energy is required. Therefore, the current excimer laser devices mentioned above are energy deficient.

To solve this problem, it is conceivable to divide the chip into a plurality of regions and irradiate each of these regions with laser light. However, there is an error in the alignment of the laser beam irradiation area, and unirradiated areas or overlapping irradiation areas may occur.

Naturally, annealing is not performed in the unirradiated area, and the characteristics of the polycrystalline Si thin film also become discontinuous at the edges of the unirradiated area. Also,
As shown in FIG. 2, the characteristics also become discontinuous at the edge of the overlapping irradiation area 13 where the irradiation areas 11 and 12 overlap.

If these unirradiated regions, overlapping irradiated regions 13, or discontinuous portions are located in the active layer portion, that is, the main channel portion of the thin film 9MO51 transistor, the characteristics of the transistor will vary, which will cause a problem in terms of yield.

Note that although the above explanation is about a stacked 0MO3 type SRAM, the above-mentioned problems related to annealing may occur in other semiconductor memories as well.

[Means to solve the problem]

In the semiconductor memory manufacturing method according to the present invention, a plurality of first regions 14.15 in which memory cells are arranged and a second region 16 in which memory cells are not arranged between the plurality of first regions 14.15. are formed in the memory cell array section, and each of the plurality of first regions 14 and 15 is irradiated with laser light to perform annealing.

[Effect]

In the method for manufacturing a semiconductor memory according to the present invention, a plurality of first
Since the annealing is performed by irradiating each of the regions 14 and 15 with laser light, even if the area of the entire memory cell array section is large or the energy of the laser light is small, the first region 14.degree. 15 can be irradiated with laser light having an energy density necessary for annealing.

Moreover, there is a second region between the plurality of first regions 14,15.
Since a region 16 is provided and memory cells are not arranged in the second region 16, the laser beam irradiation regions 11 and 12 may be separated or overlapped in the second region 16. Therefore, alignment errors in the laser beam irradiation areas 11 and 12 can be absorbed by the second area 16, and even if the alignment accuracy of the laser beam irradiation areas 11 and 12 is not high, the first area 14 .15 can be reliably irradiated with laser light to perform annealing.

〔Example〕

Hereinafter, an embodiment of the present invention applied to the manufacture of a stacked 0MO3 type SRAM will be described with reference to FIG.

In this embodiment, as shown in FIG.
4.15 and the second one where memory cells are not arranged
A region 16 is formed in the memory cell array section.

For example, in a 4M bit stacked CMO5 type SRAM, the first
The width of the second region 16 is, for example, 50.
Make it more than μm.

Then, with a polycrystalline Si thin film for forming a thin film pMO3) transistor formed in the first region 14.15, excimer laser light is sequentially irradiated onto each of these first regions 14.15. Then, the polycrystalline 5III film is annealed.

Furthermore, by performing other necessary processing,
A total of 4 Mbit memory cells are completed in the first region 14.15.

In this case, as described above, the width of the second region 16 is set to 50 μm or more, so even if there is an error in the alignment of the irradiation regions 11.12, the width of the second region 16 is set to 50 μm or more.
An unirradiated area 17 is generated in the area 16 of the irradiated area 1.
1.12 can be prevented from overlapping each other.

In this way, even if an unirradiated area 17 is generated in the second area 16 and annealing is not performed in the second area 16, since memory cells are not originally arranged in this second area 16, the memory cell There is no problem.

Incidentally, it is common to also form a power supply line using a polycrystalline 5iyi film for forming a thin film pMO3) transistor. This power supply line is also wired to the second region 16.

Therefore, the portion of the power line wired in the unirradiated area 17 is not annealed, and the power line is substantially disconnected at this portion. However, there is no problem if wiring is formed in the second region 16 using an AI film or the like and brought into contact with the polycrystalline 5iil film within the first region 14°15.

On the other hand, annealing with excimer laser light
Since this is performed only on the polycrystalline Si thin film for forming the transistor, the other layers may be wired in the second region 16 as usual.

Note that, as is clear from FIG. 1, the chip area according to this embodiment is increased only by the second region 16. and,
The area of this second region 16 can also be made narrower with improved alignment accuracy of the irradiation region 11.12.

Furthermore, since memory cells are not originally arranged in the second region 16, there is no problem even if the irradiation regions 11 and 12 overlap each other as long as they are within the second region 16. Therefore, in this case, the area of the second region 16 can be further reduced.

〔Effect of the invention〕

In the semiconductor memory manufacturing method according to the present invention, even if the area of the entire memory cell array section is large or the energy of the laser beam is small, the laser beam with the energy density necessary for annealing is applied to each of the first regions. Furthermore, even if the positioning accuracy of the laser beam irradiation area is not high, each of the first areas can be reliably irradiated with the laser beam and annealed.

Therefore, a large area semiconductor memory can be manufactured without using a large laser device.

-1--・−・−−−−−−−・−・−・・・・・−1st
Area of −・−−−1−−−・−−−−1−−−−−・−
・−・−First area −1−−−・−−1−−−・・−
---------This is the second area.

Claims (1)

[Scope of Claims] A plurality of first regions in which memory cells are arranged and a second region in which memory cells are not arranged between the plurality of first regions are formed in a memory cell array portion, A method of manufacturing a semiconductor memory in which each of the first regions is annealed by irradiating a laser beam.