JPH03280557A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH03280557A
JPH03280557A JP2082713A JP8271390A JPH03280557A JP H03280557 A JPH03280557 A JP H03280557A JP 2082713 A JP2082713 A JP 2082713A JP 8271390 A JP8271390 A JP 8271390A JP H03280557 A JPH03280557 A JP H03280557A
Authority
JP
Japan
Prior art keywords
aging
semiconductor chip
temperature
semiconductor
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2082713A
Other languages
Japanese (ja)
Inventor
Isao Ichimura
功 市村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2082713A priority Critical patent/JPH03280557A/en
Publication of JPH03280557A publication Critical patent/JPH03280557A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/286External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2862Chambers or ovens; Tanks

Landscapes

  • Engineering & Computer Science (AREA)
  • Environmental & Geological Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To control temperature rise from the outside, increase aging effect even in an atmosphere at a normal temperature, and enable simultaneous aging of various kinds of devices even in the same thermostatic chamber, by equipping a semiconductor case part with a heating element. CONSTITUTION:When temperature rise is not sufficient by power consumption in a semiconductor chip L, the temperature of the semiconductor chip L is increased by applying electric power to a heating resistor R. Thereby aging effect can be increased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置、特にニージンクを容易化する半
導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device that facilitates knee jerking.

〔従来の技術〕[Conventional technology]

従来の半導体装置のエージングは、恒温槽内に被試験物
を入れ通電し、その消費電力及び熱抵抗より恒温槽の雰
囲気の温度を設定し、半導体装置の加速エージングを実
施している。
Conventionally, semiconductor devices are aged by placing a test object in a thermostatic chamber, energizing it, setting the temperature of the atmosphere in the thermostatic chamber based on its power consumption and thermal resistance, and performing accelerated aging of the semiconductor device.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の半導体装置は、エージングの実施におい
て、各品種毎の消費電力及び熱抵抗の差で、同一恒温槽
にて一度に出来なくなる場合があり、エージング設備の
効率が低下する欠点がある。
The above-mentioned conventional semiconductor devices have the disadvantage that when performing aging, it may not be possible to perform aging in the same constant temperature bath due to the difference in power consumption and thermal resistance of each type, resulting in a decrease in the efficiency of the aging equipment.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は上述の欠点を無くする為、半導体装置ケース部
に発熱体を設ける。
In order to eliminate the above-mentioned drawbacks, the present invention provides a heating element in the semiconductor device case.

[実施例〕 次に本発明について図面を参照して説明する。[Example〕 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の断面図である。FIG. 1 is a sectional view of one embodiment of the present invention.

Lは半導体チップであり、Cは半導体ケースであり、R
は発熱抵抗体である。1.2はこの発熱抵抗体への電力
供給用の入力端子である。
L is a semiconductor chip, C is a semiconductor case, and R
is a heating resistor. 1.2 is an input terminal for supplying power to this heating resistor.

ついで動作を説明する。Next, the operation will be explained.

半導体チップしての消費電力では温度上昇が十分でない
時、発熱抵抗体Rに電力を加える事により、半導体チッ
プLの温度を上昇させる事によりエージング効果を上げ
る事が可能となる。
When the power consumption of the semiconductor chip is not enough to raise the temperature, it is possible to increase the aging effect by increasing the temperature of the semiconductor chip L by applying power to the heating resistor R.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の様に外部より温度上昇を制
御することが出来る為に、常温雰囲気に於いてもエージ
ング効果を高める事が可能であり、同一恒温槽内でも各
種デバイスを一度にエージングが可能となる。
As explained above, since the temperature rise can be controlled externally like in the present invention, it is possible to enhance the aging effect even in a room temperature atmosphere, and it is possible to age various devices at the same time even in the same thermostatic chamber. becomes possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す断面図である。 1.2・・・発熱抵抗体入力端子、 R・・・発熱抵抗体、L・・・半導体チップ、C・・・
半導体ケース。
FIG. 1 is a sectional view showing one embodiment of the present invention. 1.2...Heating resistor input terminal, R...Heating resistor, L...Semiconductor chip, C...
semiconductor case.

Claims (1)

【特許請求の範囲】[Claims]  ケース部に発熱抵抗体を備える事を特徴とする半導体
装置。
A semiconductor device characterized by having a heat generating resistor in a case portion.
JP2082713A 1990-03-29 1990-03-29 Semiconductor device Pending JPH03280557A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2082713A JPH03280557A (en) 1990-03-29 1990-03-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2082713A JPH03280557A (en) 1990-03-29 1990-03-29 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH03280557A true JPH03280557A (en) 1991-12-11

Family

ID=13782053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2082713A Pending JPH03280557A (en) 1990-03-29 1990-03-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH03280557A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003027695A1 (en) * 2001-09-27 2003-04-03 Advanced Micro Devices, Inc. Thermal head for maintaining a constant temperature of a dut
CN108508353A (en) * 2018-05-22 2018-09-07 杭州博日科技有限公司 The driver circuit plate high temperature accelerated test aging equipment of PCR instrument

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003027695A1 (en) * 2001-09-27 2003-04-03 Advanced Micro Devices, Inc. Thermal head for maintaining a constant temperature of a dut
CN108508353A (en) * 2018-05-22 2018-09-07 杭州博日科技有限公司 The driver circuit plate high temperature accelerated test aging equipment of PCR instrument
CN108508353B (en) * 2018-05-22 2023-08-08 杭州博日科技股份有限公司 High-temperature accelerated test aging device for driving circuit board of PCR instrument

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