JPH03280597A - Chip carrier for semiconductor devices - Google Patents

Abstract

PURPOSE:To prevent floating of a chip carrier due to adhesive by externally escaping adhesive poured between a board and a first surface from the adhered surface along a bay. CONSTITUTION:After paste or solder for adhering a chip carrier 1 to a printed circuit board 6 is applied to a region 10 to be adhered with a printed circuit board 6 in an adherable state, the carrier 1 is pressed to the board 6. In the case of pressing, paste, etc., between the bottom 2 of the carrier 1 and the region 10 of the board 6 is fed into a groove 5 in response to the pressing, escaped from cut ports 5a, 5b. Even if the carrier 1 is inserted fixedly into a narrow region, the bottom 2 of the carrier 1 is brought into contact with the region 10, and not floated.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to semiconductor device chip carriers.

[Conventional technology]

When installing a semiconductor element chip on a hybrid substrate, the semiconductor element chip is mounted on a chip carrier,
This chip carrier is fixed onto the hybrid board with solder/paste or the like. The conventional chip carrier has a substantially rectangular parallelepiped shape, and the bottom surface that contacts the hybrid substrate is completely flat.

[Problem to be solved by the invention]

However, since conventional chip carriers have a flat bottom surface, when inserting and fixing them into a narrow area using solder, etc., for example, an area surrounded by other devices, the applied solder etc. There was a problem in that the chip carrier would float up.

An object of the present invention is to provide a chip carrier for semiconductor elements that can solve the above problems.

[Means to solve the problem]

A chip carrier for a semiconductor device according to the present invention includes a substantially flat bottom surface that is fixed on a substrate, and a surface other than the bottom surface for mounting a semiconductor device chip, and at least one side of the bottom surface is formed on this bottom surface. Features [Function] The chip carrier for semiconductor elements of the present invention is configured as described above, so that when fixing the chip carrier on the substrate, The adhesive injected between the substrate and the first surface escapes from the adhesive surface to the outside along the groove, thereby preventing the chip carrier from being scraped by the adhesive.

〔Example〕

Embodiments according to the present invention will be described below with reference to the drawings.

Elements with the same reference numerals have the same functions, so duplicate explanations will be omitted.

FIG. 1 shows a perspective external appearance of a chi-knob carrier for semiconductor devices according to the present invention.

As shown in FIG. 1, the chip carrier 1 for semiconductor elements in the embodiment has a substantially rectangular parallelepiped shape. The bottom surface 2 includes a substantially flat bottom surface 2 to be bonded and a mounting surface 3 for mounting a semiconductor element.The bottom surface 2 has a substantially flat bottom surface 2 to be bonded and a mounting surface 3 for mounting a semiconductor element. Conductive turn 2
a and 2b are formed. On the other hand, on the mounting surface 3, a semiconductor element chip (not shown) is die-bonded thereon, and the mounting surface 3 has a structure for electrically connecting with an electrode provided on the back side of the semiconductor element chip with respect to the element forming surface. A conductive turn 3b is formed which is electrically connected to the conductive pattern 3a and an electrode notch formed on the element forming surface of the semiconductor element chip by wire bonding. The conductive patterns 2a, 2b provided on the bottom surface 2 and the conductive patterns 3a, 3b provided on the mounting surface 3ζ are electrically connected by wiring patterns 4a, 4b, respectively.

Furthermore, a groove 5 is formed in the second bottom surface 2 so as to cross the surface. The groove 5 may have any shape other than the shape 1. Also, when this chip carrier is bonded onto a printed wiring board using paste/%render adhesive, the second adhesive easily flows into this groove, and the bottom surface 2
It is preferable that the shape is such that it can easily escape from the cut portions 5a, 5b provided on each side 2c, 2d+.

Next, using FIG. 2, we will explain how to adhesively mount the semiconductor element carrier chip 1 of the above embodiment onto the printed wiring board 6. Specifically, as shown in FIG. A method for mounting the chip carrier 1 between the components 7, 8, 9, etc., which are mounted thereon, will be described.

First, for bonding the chip carrier 1 to the printed wiring board 6, a paste or ) 1 solder is applied to the area 10 of the printed wiring board 6 to be bonded to make it bondable. The chip carrier 1 is pressed against the printed wiring board 6 from the direction shown in FIG. During this pressing,
The paste between the bottom surface 2 of the chip carrier 1 and the area 10 of the printed wiring board 6 flows into the groove 5 in response to the pressure and escapes from the cut portions 5a and 5b.
Even when the chip carrier 1 is inserted and fixed in a narrow area as shown in FIG. 2, the bottom surface 2 of the chip carrier 1 is in close contact with the area 10 and will not rise.

In contrast, in conventional chip carriers, the surface that is bonded to the printed wiring board is completely flat.

Therefore, when attempting to insert and fix such a chip carrier in a narrow area, there is no way for paste or the like applied between the bottom surface and the substrate to escape. Therefore, paste or the like may accumulate between the bottom surface of the chip carrier and the printed wiring board, push up the chip carrier, and fix the chip carrier in an inclined state. In such a state, alignment becomes extremely difficult, especially when an optical semiconductor element or the like is mounted and the optical axis is aligned with another optical element, such as an optical fiber. However, in the chip carrier according to the present invention, an escape route is provided for the paste, etc., so that the bottom surface of the chip carrier reliably contacts the top surface of the printed wiring board, so that the semiconductor element mounted thereon is held and fixed in the desired state. be able to. Therefore, it is particularly effective in the case of a chip carrier on which an optical semiconductor element is mounted.

The present invention is not limited to the above embodiments, and various modifications may be made.

Specifically, in the above embodiment, the shape of the chip carrier is approximately a rectangular parallelepiped, but the shape is not limited to this, and the surface to be bonded to the printed wiring board is a substantially flat surface, and there are grooves on that surface. Any shape may be used as long as it has a surface on which a semiconductor element is mounted and a surface on which a semiconductor element is mounted.

Further, in the above embodiment, the groove is provided so as to cross the substantially flat surface, but instead of such a groove, it is possible to use a groove that communicates with at least one side of the substantially flat surface, as shown in FIG. It is sufficient to function properly.

〔Effect of the invention〕

As described above, in the chip carrier for a semiconductor element of the present invention, when the chip carrier is adhesively fixed onto a printed wiring board, the chip carrier can be adhesively fixed without coming up. This enables high-density and precise mounting,
It can contribute to the miniaturization of devices.

[Brief explanation of the drawing]

FIG. 1 is a perspective external view of a chip carrier for semiconductor devices according to an embodiment of the present invention, FIG. 2 is a diagram illustrating a method for mounting the chip carrier for semiconductor devices shown in FIG. 1 on a printed wiring board, and FIG. FIG. 3 is a diagram showing a modification according to the present invention. 1... Chip carrier for semiconductor element, 2... Bottom surface, 3
...Mounting surface, 2 a s 2 b s 3 a %
3 b... Conductive pattern, 4a, 4b... Wiring pattern, 5... Groove, 6... Printed wiring board, 7.8
．． 9...Other parts.

Claims (1)

[Scope of Claims] A substantially flat first surface for contacting a substrate, and a second surface different from the first surface for mounting a semiconductor element chip; A chip carrier for semiconductor devices, in which a groove communicating with at least one side of the surface is formed.