JPH0328065B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] It is an element having a single quantum well (SQW) as a channel structure in a field effect transistor, and the channel formed by a doped layer in the well is formed by a heterostructure of the SQW. Two-dimensionality is created by combining. Thereby, short channel effects are reduced, linearity of device characteristics is improved, subthreshold characteristics are improved, and fluctuations in threshold values due to temperature are reduced.

[Industrial application field]

The present invention relates to a field effect transistor, and more particularly to an element having a single quantum well (SQW) as a channel structure, and in which a channel formed within the well is given two-dimensionality by hetero-coupling of the SQW.

[Conventional technology]

Conventionally, various attempts have been made to improve the characteristics of field effect transistors, such as increasing mutual conductance (g _n ) and reducing short channel effects.

Figure 3 shows a conventional GaAs MESFET. In the figure, 31 is a semi-insulating GaAs substrate, 32 is an n
-GaAs layer, 33 and 34 are n ⁺ layers for source and drain contacts, 36 and 37 are source,
35 is a drain electrode and a gate electrode. By controlling the channel with the depletion layer 38 extending by applying a bias voltage to the gate electrode 35.
FET operation is performed, but when the channel length is shortened, the short channel effect shown in FIG. 5 becomes a problem. As shown in Figure 5, the channel length is 1 μm.
When the voltage decreases to a certain level or lower, the threshold value Vth of the field effect transistor changes as shown in the figure. This variation becomes much smaller as the impurity concentration N of the active layer of the channel decreases. Therefore, conventionally, the active layer has been highly doped in order to reduce the short channel effect. Also, if the active layer is highly doped, the fourth
As shown in the figure, the depletion layer 41
becomes thinner, the number of modulated carriers 42 (the amount of charge that can be induced for a unit gate bias change) increases, and g _n can be improved.

[Problem that the invention seeks to solve]

However, conventional devices still have problems such as a decrease in device breakdown voltage or a decrease in mobility due to highly doped active layers. The present invention aims to solve these problems and provide an element with excellent characteristics.

[Means for solving problems]

In the present invention, a doped layer is formed in a single quantum well (SQW), the quantum well layer is used as a channel, and the channel is given two-dimensionality by a heterojunction of the single quantum well (SQW). That's what I do.

The present invention will be explained using the energy band diagram of the device according to the embodiment of the present invention shown in FIG. 2. In the figure, a single quantum well (SQW) is formed between i-AlGaAs6 and i-AlGaAs2. A planar doped or highly doped layer d is formed within the single quantum well (SQW), and the electron gas e supplied from this layer is confined by a heterojunction to give it two-dimensionality. The width of the single quantum well (SQW) is preferably about 100 Å or less in order to provide two-dimensionality.

[Effect]

According to the above-mentioned configuration of the invention, not only the doping concentration of the channel is high, but also the electrons are confined by the SQW heterojunction, resulting in a narrow channel, and the short channel effect can be prevented more than the conventional improved MESFET, and the short channel effect can be significantly reduced. reduction is possible.

Furthermore, since the electronic system is confined by the relatively high barrier of the heterojunction with the lower i-AlGaAs2, the subthreshold characteristics are very good even in the vicinity of pinch-off. In contrast, conventional
MESFETs are homojunctions or have low barriers, and as shown in Figure 6, the characteristic diagram of gate voltage Vgs and drain current Id does not have the characteristics shown in b, but has poor closure as shown in a, and the subthreshold is low. will occur.

Further, for the same reason and because the gate capacitance is constant, the linearity of the device characteristics is improved and equal g _n can be achieved.

Further, since the doped layer is made of GaAs with a relatively shallow donor level, and channel electrons are supplied from this layer, there is little variation in the amount of electrons supplied due to temperature, and the variation of the threshold value with respect to temperature is reduced.

In contrast, in conventional HEMTs (high electron mobility transistors), the donor level is deep and
Since the electron supply layer is made of AlGaAs containing a DX center, the amount of electron supply changes easily depending on the temperature, and the threshold value changes greatly depending on the temperature.

〔Example〕

FIG. 1 shows the main parts of a device according to an embodiment of the present invention. In the figure, a semi-insulating (Sl) GaAs substrate 1
On top, undoped i-AlGaAs layer 2, single quantum well (SQW), i-AlGaAs6, i-
Each layer of GaAs7 is formed. The molar ratio x of Al in the i-AlGaAs layers 2 and 6 is 0.2 to 1.0, and in this example is 0.2 to 0.3.

The single quantum well (SQW) layer is i-GaAs3, n-
It is formed from GaAs4 and i-GaAs5. The four layers of single quantum well (SQW) doping layers are planar doped or highly doped.

Examples of each of the above layers are shown below.

2, 6: i-AlGaAs layer, undoped, several hundred Å thick
(Thickness at which carriers cannot tunnel) 3.5: i-GaAs layer Undoped, film thickness several tens of angstroms 4: N-GaAs layer Planar doped (atomic planar,
Doping: Si or Se atomic layer is interposed between i-GaAs layers. ) for doping concentration 10 ¹⁹ cm ^-3
In the case of a film thickness of several tens of Å and high doping, the doping concentration is about 10 ¹⁸ cm ^-3 . n- of the doping layer
Undoped i-GaAs3,5 on both sides of GaAs4
The reason for this is that the dopant is i due to diffusion.
- This is to prevent diffusion into the GaAlAs layers 2 and 6. Furthermore, it consists of 3, 4, and 5 layers.
The thickness of the SQW is 100 Å or less to ensure two-dimensionality. 7: i-GaAs layer Undoped, film thickness several hundred angstroms In addition, in Fig. 1, 8 and 9 are n ⁺ regions (10 ¹⁷ to 10 ¹⁸ cm ^-3 ) formed by Si ⁺ ion implantation, and 10 , 11 are source and drain electrodes (AuGe/Au), and 12 is a gate electrode (Al).

〔Effect of the invention〕

As is clear from the above description, the following effects can be obtained according to the present invention.

According to the above-mentioned configuration of the invention, the doping concentration of the channel is high and electrons are further confined by the SQW heterojunction, resulting in a narrow channel, which can prevent the short channel effect more than the conventional improved MESFET and significantly reduce the short channel effect. It becomes possible to reduce the

The relatively high barrier of the lower heterojunction confines the electronic system, resulting in very good subthreshold characteristics even near pinch-off.

For the same reason and because the gate capacitance is constant, the linearity of the device characteristics becomes good and equal g _n can be achieved.

Doping layer has a relatively shallow donor level
Since the channel electrons are supplied from GaAs, there is little variation in the amount of electrons supplied due to temperature, and the variation with respect to the threshold temperature is reduced.

In contrast, in conventional HEMTs (high electron mobility transistors), the donor level is deep.
Since AlGaAs is used as the electron supply layer, the amount of electron supply changes easily depending on the temperature, and the threshold value changes greatly depending on the temperature.

Because the channel has two-dimensionality and the impurity doping is limited to a portion of the single quantum well (SQW) that makes up the channel, carrier mobility is improved compared to conventional MESFETs.

Since the gate electrode can be formed on a high resistance layer such as an i-GaAs layer, there is no deterioration in breakdown voltage.

[Brief explanation of the drawing]

Fig. 1 is a sectional view of the main part of an embodiment of the present invention, Fig. 2 is an energy band diagram of an embodiment of the invention, Fig. 3 is a sectional view showing an outline of a conventional MESFET, and Fig. 4 is a sectional view of a conventional MESFET. MESFET energy band diagram, 5th
The figure is an explanatory diagram of the short channel effect, and FIG. 6 is a diagram showing the subthreshold. Main code: 1...Semi-insulating (SI) GaAs substrate,
2...i-AlGaAs layer, 3...i-GaAs layer, 4
...n-GaAs layer, 5...i-GaAs layer, 6...
i-GaAlAs layer, 7... i-GaAs layer, 8, 9...
...n ⁺ region, 10, 11...source, drain electrode, 12...gate electrode.

Claims (1)

[Scope of Claims] 1. First and second semiconductor layers provided on a semiconductor substrate, and a third semiconductor layer provided between the two semiconductor layers and having a narrower bandgap forming a single quantum well (SQW).
a semiconductor layer, source and drain regions connected to one end and the other end of the third semiconductor layer, and a gate electrode provided on the second semiconductor layer; A doping layer is formed, and barrier heights of the first and second semiconductor layers with respect to the third semiconductor layer are set so that carriers generated in the third semiconductor layer do not diffuse outside. Furthermore, the single quantum well (SQW)
A field effect transistor, wherein the amount of carriers reaching the drain region from the source region through the channel is controlled by the gate electrode. 2. The semiconductor substrate is made of semi-insulating GaAs, the first and second semiconductor layers are made of AlGaAs, the third semiconductor layer is made of GaAs, and the doped layer is a planar doped or highly doped layer. 2. The field effect transistor according to claim 1, wherein undoped GaAs layers are interposed on both sides of the field effect transistor.