JPH03280677A - Dc transmission quantity setting circuit for multi-video display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a DC transmission amount setting circuit for a multi-video display device that connects small screens to form a single large screen.

(Prior art) Conventionally, multiple image projection devices (video projectors) are used, each video projector displays a part of the screen (small screen), and the small screens are connected to form a single large screen. A multi-video display device has been developed.

FIG. 8 is an explanatory diagram showing such a multi-video display device, and FIG. 9 is an explanatory diagram showing the display on the screen.

As shown in FIG. 9, the large screen 2 displayed on the screen 1 is made up of three small screens PL, PC, and PR connected together. As shown in Figure 8, each small screen PL, PC
, PR are video projectors 31, 3C, 3, respectively.
Displayed by R.

The video projectors 31, 3C, and 3R are arranged in a row in the horizontal direction, with projection tubes 4a, 4b for R, G, and B,
4c projects the R, G, and B image lights emitted onto the screen 1. Note that adjacent small screens PL, PC, and PR may be displayed slightly overlapping.

By the way, each video projector-31, 3C.

When 3R small screens PL, PC, and PR are connected to form a single large screen 2, each video projector 31, 3C, and 3R is used for contrast adjustment, brightness adjustment, etc.
It is necessary to exercise and control the 3Rs. However, even if the same DC regeneration circuit (not shown) is used for each video projector 31, 3C, 3R and set under the same conditions, each video projector 31, 3C, 3R
Since the images displayed by the video projectors 31, 3C, and 3R are different from each other, the black level (pedestal level) is different between the video projectors 31, 3C, and 3R.

The DC reproducing circuit of each video projector 31, 3C, and 3R operates so that the pedestal level becomes approximately a predetermined value regardless of fluctuations in the average video level (hereinafter referred to as APL). However, if 100% of the DC component is transmitted, the regeneration rate of the DC component is normally set to about 80% because of the risk of overloading the high voltage system when displaying bright images. There is. Therefore, the black level will vary slightly depending on the picture. This is not a particular problem when a single video is displayed by only one video projector, but if multiple video projectors 31, 3C,
When displaying a single large screen by 3H, each video projector-3[.

If the APL of the video signals input to 3C and 3R is different,
The amount of variation in black level differs for each of the video projectors 31, 3C, and 3R, resulting in deterioration of gradation expression.

For example, if the APL of the video signal input to the video projectors 31 and 3R is low and the APL of the video signal input to the video projector 30 is low, the black level of the video projector 30 will be lower than that of the other projectors. 3L
, the level will be lower than 3R. In other words, the pattern of the small screen PC in the center of screen 2 is different from that of the other small screens PL and PR.
It becomes darker than the picture in the image, and the correct gradation is not expressed on the entire screen 2. In particular, the greater the difference in APL of the video signals input to each of the video projectors 31, 3C, and 3R, the more noticeable the deterioration of gradation expression becomes.

(Problem to be Solved by the Invention) As described above, in conventional multi-video display devices, since the average video level of the video signal input to each video projector is different, the small There was a problem in that the amount of variation in the black level of the screen was different, making accurate gradation expression impossible.

The present invention has been made in view of such problems, and includes:
It is an object of the present invention to provide a DC transmission amount setting circuit for a multi-video display device that can make the black level of both small surfaces displayed by each video projector uniform and accurately express gradation.

[Structure of the Invention] (Means for Solving the Problems) A DC transmission amount setting circuit for a multi-image display device according to the present invention controls image light for displaying a small screen that is a part of a single large screen. a plurality of video projection devices that emit light; an average video level detection circuit that detects the average video level of the video signals for the small screen inputted to each of the video projection devices; and an average video of the video signals for the small screens. The apparatus includes an averaging circuit that calculates the average level and outputs an averaged signal, and a common brightness control circuit that commonly controls the brightness levels of the plurality of image projection devices based on the averaged signal.

(Function) In the present invention, 1. The average video level of the video signal for each small screen is detected by the average video level detection circuit.

The averaging circuit averages these average video levels and outputs an averaged signal that corresponds to the average video level of a single large screen. The brightness level of each video projection device is commonly controlled based on the common Ii mark sub-control circuit averaging signal, and the black level of each small screen is the average of the entire large screen, regardless of the average video level of its video signal. It is based on the video level, and the gradation expression on the entire large screen is good.

(Example) Hereinafter, an example of the present invention will be described in detail based on the drawings. FIG. 1 is a block diagram showing an embodiment of a DC transmission amount setting circuit for a multi-video display device according to the present invention.

The video projectors 101, 10C, and IOR are arranged, for example, in a horizontal line, and each has a projection tube (not shown) to display a small screen on a part of the screen (not shown). Video projector-101, 10
C and 10R have terminals 11L, respectively.

A video signal is input via 11C and 11R. Video projector - 1OL, 10C, IOR are each AP
It has L detection circuits 12L, 12C, and 12R.

The APL detection circuits 12L, 12C, and 12R have the same configuration, and detect the APL of the input video signal to determine the APL.
The detected voltage is output to an averaging circuit 13.

The averaging circuit 13 includes each APL detection circuit 12L, 12C.
.

The average value of the APL detection voltages from 12R is calculated and an averaged signal Vavc is output. Now, each APL detection circuit 12L
, APL detection voltages from 12C and 12R are set to VL, respectively.
, VC, and VR, the averaging circuit 13 calculates the averaged signal V avc by the calculation shown in equation (1) below.

Vavc = (VL +VC+VR) /N
- (1) Note that N indicates the number of video projectors, and in this embodiment, N=3.

The averaged signal V avc is given to the common brightness control circuit 14 . The common brightness control circuit 14 uses this averaged signal y av
c, each video projector-10.

The brightness levels of 10C and 10R (DC transmission 9) are commonly controlled.

FIG. 2 is a circuit diagram showing a specific configuration of the APL detection circuit in FIG. 1.

A video signal is input to the input terminal 15. Input terminal 15
is connected to the collector of transistor Q1 via coupling capacitor C1. The collector of the transistor Q1 is connected to the power supply terminal 16 via a resistor R1, and is also connected to a reference potential point via a resistor R2 to provide a bias. The base of the transistor Q1 is connected to the terminal 17 via a resistor R3, and a gate pulse is applied to the base of the transistor Q1.

The gate pulse is at a high level (hereinafter referred to as ′′) during the pedestal period.
Transistor Q1
The emitter of is connected to the base of transistor Q2.

The collector of transistor Q2 is connected to the power supply terminal 16, and the emitter is connected to transistor Q3 via diode D1.
The base of the transistor Q3 is connected to the reference potential point via a parallel circuit of a resistor R4 and a capacitor C2. These diode D1, resistor R4, and capacitor 02 constitute a time constant circuit. The collector of the transistor Q3 is connected to the power supply terminal 16, and the emitter is connected to the reference potential point via the resistor R5 and also to the output terminal 18.

Next, the operation of the APL detection circuit configured as described above will be explained with reference to the timing charts of FIGS. 3 and 4. Fig. 3 shows the case where a positive polarity video signal with relatively low APL is input, Fig. 3(a) shows the gate pulse, Fig. 3<b> shows the input video signal, and Fig. 3(a) shows the input video signal.
C) shows the pulse that is flattened at the emitter of the transistor Q1, and FIG. 3(d) shows the APL detection voltage. Furthermore, Fig. 4 shows the case where a positive polarity video signal with a relatively high APL is input, and Fig. 4 (a) to (d) correspond to Fig. 3 (a) to (CI), respectively. .

The positive polarity video signal input via the input terminal 15 is
It is applied to the collector of transistor Q1 via coupling capacitor C1. A gate pulse shown in FIG. 3<a> and FIG. 4(a) is applied to the base of the transistor Q1 from the terminal 17, and the transistor Q1 is turned on during the pedestal period when the gate pulse becomes H''. As a result, a pulse at a level corresponding to the pedestal level appears at the emitter of the transistor Q1, as shown in FIGS. 3(b) and 4(c) and 4(b) and (c).

Since the input video signal is applied to the collector of the transistor Q1 via the coupling capacitor C1, the level of this pulse is inversely proportional to APL (or proportional depending on the polarity of the video signal). For this reason, the level of the pulse at the emitter of transistor Q1 is used as the level corresponding to APL.

This pulse is given to the time constant circuit via the buffer 7 transistor Q2, subjected to peak rectification, and held. In this way, the APL detection voltage shown in FIG. 3(d) and FIG. 4(d) is changed from the buffer voltage made up of the transistor Q3 and the resistor R5. The signal is output from the output terminal 18 via. As shown in FIGS. 3 and 4, when a video signal with a low APL is input, a high level APL detection voltage is output, and the APL
When a video signal with a high level is input, a low level APL detection voltage is output.

FIG. 5 is a circuit diagram showing a specific configuration of the averaging circuit 13 and the common brightness control circuit 14.

Each APL detection circuit 12L is connected to the input terminal 19, 20, 21.
.

12C, 12R color (7) A P L detection voltage VL,
V.C.

VR is input. The input terminals 19, 20, 21 are connected via resistors R6, R7 and R8, respectively, to the emitter of transistor Q4, which is also connected to the reference potential point via resistor R9. The base of the transistor Q4 is connected to the power supply terminal 22 via a resistor R10, and is also connected to a reference potential point via a parallel circuit of a resistor R11 and a capacitor C3, and operates as a common base amplifier. The collector of the transistor Q4 is connected to the wire terminal 22 via the resistor R12, and is also connected to the base of the transistor Q5. The collector of the transistor Q5 is connected to the power supply terminal 22, and the emitter is connected to the reference potential point via the resistor R13.
A buffer is configured by transistor 05 and resistor R13. The emitter of transistor Q5 is also connected to terminal 23.

According to the averaging circuit 13 configured in this way, the APL detection voltage V[
VR to VR are applied to the emitter of transistor Q4 via resistors R6 to R8, respectively. A combined output of the APL detection voltage V[ to VR appears at the collector of the transistor Q4. This combined output is output to terminal 23 as an averaged signal yavc via a buffer consisting of transistor Q5 and resistor R13.

The gain of each APL detection voltage VL to VR is determined by resistors R6 and R
7. It is determined by the resistance ratio between R8 and resistor R9. Therefore, by setting the resistance values of the resistors R6 to R8 to 1/3 of the resistance value of the resistor R9, the averaged signal V avc shown in the above equation (1) can be obtained.

This averaged signal y avc is applied to the common brightness control circuit 14 via the terminal 23 . The common brightness control circuit 14 includes resistors R14 to R17, a variable resistor VR1, and a voltage distribution circuit 24. That is, the terminal 23 is connected to the input end of the voltage distribution circuit 24 via the resistor R14. A resistor R15 is connected between the power supply terminal 22 and the reference potential point.
A series circuit of a variable resistor VR1 and a resistor R16 is connected, and the sliding end of the variable resistor VRI is connected to the input end of the voltage distribution circuit 24 via a resistor R17. Voltage distribution circuit 2
4, the input voltage to each video projector-1OL
, IOC, and 10R to set the pedestal level of the video signal.

According to the common brightness control circuit 14 configured in this way,
A predetermined DC voltage is applied to the averaged signal V avc inputted through the terminal 23 by a series circuit of a resistor R15, a variable resistor VR1, and a resistor R16.

The voltage distribution circuit 24 distributes the input voltage to each video projector to set a pedestal level.
Give to 1OL, 10C, 10R. Averaged signal ya
VC is each video projector-101, IOC.

It is the average value of APL of the video signal input to 10R,
It corresponds to a large-screen APL displayed on a screen. That is, each video projector-10.

The pedestal levels of 10C and 10R will vary slightly depending on the brightness of the entire large screen.

For example, when the APL of the entire large screen is low, the level of the averaged signal Vavc becomes high;
If L is high, the level of the averaged signal V avc will be low. The setting of the change point of this averaged signal V avc can be adjusted by the variable resistor VRI, and the variable resistor VR1
By appropriately setting , the optimum amount of DC transmission is determined.

Next, the operation of the DC transmission amount setting circuit of the multi-video display device configured as described above will be explained with reference to FIG. FIG. 6 is a waveform diagram showing video signals input to each video projector.

Waveform 81. SC and SR are each video projector-10
1, 10C, and 10H are shown. The APL of each video signal SL, SC, and SR is VL, respectively.
VC, VR. APL detection circuit 12L, 12C
, 12R are video projectors-1OL and 10, respectively.
C, the level corresponding to the APL of the small screen video signal input to the IOH is detected. The detected APL detection voltage is input to the averaging circuit 13 and averaged, and an averaged signal vavC shown in FIG. 6 is obtained. This averaged signal V av
c is the average APL of each small screen, that is, the AP of the large screen.
Corresponds to L.

The common brightness control circuit 14 adjusts this averaged signal vavc to an appropriate level using a variable resistor VRI, and then supplies it to each video projector 1OL, 10C, and IOH to determine the pedestal level. 1, that is, the video signal S
By increasing the pedestal level of L and SR, the video signal S
Lower the C pedestal level. In this way, each small screen has the APL of the entire large screen, regardless of the APL of its video signal.
The black level is set to be determined by the PL, and good gradation can be expressed on the entire large screen.

In this way, in this embodiment, the APL detection circuit 12
1, 12C, and 12R detect the APL of each small screen video signal to obtain the large screen APL.
Each video projector - 1OL, 10C.

The pedestal level of 10R is determined, and the video signal of each small screen is set to the black level based on the APL of the large screen, resulting in good connection between the pictures. Further, the circuit configuration is extremely simple, and the brightness level of the entire large screen can be adjusted by adjusting only the variable resistor VR1. FIG. 7 is a circuit diagram showing another embodiment of the present invention. 7th
In the figure, the same parts as in FIG. 5 are given the same reference numerals, and their explanation will be omitted. In this embodiment, a means for correcting the error between sets of the APL detection voltage is added.

This embodiment differs from the embodiment shown in FIG. 1 in the configuration of the averaging circuit. That is, variable resistor VR2 is provided between resistor R6 and the emitter of transistor Q4, and variable resistor V
R3 is provided between resistor R8 and the emitter of transistor Q4.

Video signal processing circuits (not shown) of each video projector may have variations in gain.

Then, the APL detection circuits 121, 12C, 12R
The ratio of the video signal level input to each input terminal 15 (see Fig. 2) differs from the ratio of the video signal SL, SC, and SR levels input to each video projector, causing an error in the APL detection voltage. arise.

Therefore, in this embodiment, variable resistors VR2 and VR3 are inserted in series with the resistors R6 and R8 to weight them when averaging, thereby correcting the detection error of the APL detection voltage.

That is, the APL detection voltage V input to the input terminal 21
APL detection voltage VL with reference to C.

VR detection error is removed by adjusting variable resistors VR2 and VR3. For example, if there is a large variation in the gain of the video signal processing circuit, the variation in the A PL detection voltage will also be large. In this case, the resistance values of the variable resistors VR2 and VR3 are increased to reduce the averaging addition ratio to correct the detection error.

Other functions and effects are similar to those of the embodiment shown in FIG.

Note that the present invention is not limited to the above embodiments,
For example, the number of video projectors is not limited to three.

[Effects of the Invention] As described above, according to the present invention, the black level of the small screen displayed by a plurality of image projection devices becomes uniform, and accurate gradation display is possible.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a DC transmission amount setting circuit of a multi-video display device according to the present invention, FIG. 2 is a circuit diagram showing a specific configuration of the APL detection circuit in FIG. 1, and FIG. 3
4 and 4 are timing charts for explaining the operation of the APL detection circuit, FIG. 5 is a circuit diagram showing the specific configuration of the averaging circuit and common brightness control circuit in FIG. 1, and FIG.
9 is a waveform diagram for explaining the operation of the embodiment, FIG. 7 is a circuit diagram showing an averaging circuit of another embodiment of the present invention, FIG. 8 is an explanatory diagram showing a multi-video display device, and FIG. 8 is an explanatory diagram showing the display on the screen of FIG. 8. FIG. 10L, 10C, IOR...Video projector-121, 12C, 12R...APL detection circuit, 13
... Averaging circuit, 14... Common brightness control circuit. Figure 1 Figure 2 Figure 3 Figure 4 Figure S. Figure 6 Figure 5 Figure 7

Claims (1)

[Scope of Claims] A plurality of image projection devices that emit image light for displaying a small screen that is part of a single large screen, and an image for the small screen that is input to each of the image projection devices. an average video level detection circuit that detects the average video level of the signal; an averaging circuit that calculates the average of the average video levels of the video signals for each of the small screens and outputs an averaged signal; A DC transmission amount setting circuit for a multi-video display device, comprising: a common brightness control circuit that commonly controls brightness levels of the plurality of video projection devices.