JPH0328575Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a crystal oscillator module.

[Conventional technology]

Currently, crystal oscillator modules in which a crystal oscillator, a frequency divider, and an output buffer are enclosed in a sealed container are used in various fields. When the oscillation frequency is high, a leakage electric field is generated from this module. Especially when multiple modules are placed close to each other on one board, mutual interference occurs due to the leakage electric fields of each module, causing a change in the oscillation frequency. There was something I ended up doing. To avoid this problem, it may be possible to stop the oscillation of unnecessary modules, but this would take time to restart, and the phase of the output signal would become unstable. Ta. Therefore, conventionally,
Some devices reset the frequency division stage while maintaining oscillation when not needed.

[Problem that the invention attempts to solve]

Although the above-mentioned conventional device can solve the problems of leakage electric field and restart time, it has a drawback that the phase of each frequency-divided output becomes unstable at the time of restart. This is extremely inconvenient in devices that use a plurality of modules and require phase matching of each frequency-divided output of each module.

The present invention is designed to solve all the problems of leakage electric field, restart time, and phase of the frequency-divided output.

[Means for solving problems]

In the present invention, the crystal oscillator and the frequency division stage are operated at a low voltage, and the operation of the output buffer is prohibited.

〔Example〕

In the drawing, OS is a crystal oscillator consisting of a crystal oscillator Q, an inverter V ₁ , a feedback resistor R ₁ and load capacitances C ₁ and C ₂ . F ₁ to F ₄ are flip-flop circuits that constitute the frequency division stage, B ₁ to _{B 5} are output buffers,
V ₂ and V ₃ are inverters. S is a switching circuit, _R2 is a current limiting resistor, and these constitute a control circuit.

All of the above configurations are enclosed in a sealed container (not shown).

Next, the operation will be explained. Output buffer
If frequency output is required from B ₁ to _{B 5} , hold the input terminal at “1” and output the output buffer from B 1 to B ₅ .
Activate _B5 and turn on the switching circuit S. As a result, inverters V ₁ , V ₂
The power supply voltage is applied to flip-flop circuits F ₁ to F ₄ without being lowered, and oscillation output and frequency-divided output of sufficient voltage can be obtained. These are output to the outside via output buffers _B1 to _B5 .

And when oscillation and frequency division output are not required,
A prohibition signal “0” is supplied to the input terminal. This prohibits the operation of output buffers B ₁ to _{B 5} ,
Generation of oscillation output and frequency-divided output is prohibited. Therefore, the leakage electric field can be controlled and any adverse effects on the oscillator module can be eliminated.

On the other hand, the switching circuit S is turned off by the inhibit signal, and power is supplied to the inverters V ₁ and V ₂ and the flip-flop circuits F ₁ to F ₄ via the current limiting resistor R ₂ . Therefore, oscillation and frequency division operations are maintained at the lowest operating voltage, and current consumption can be reduced.

Since the oscillation and frequency division operations continue in this manner, when inhibition is canceled, no time is required to restart the oscillation operation, and the frequency division output also maintains the phase state before inhibition.

In the above example, all the components are enclosed in a sealed container, but the load capacitances C ₁ and C ₂ may be formed on the outer surface of the bottom of the sealed container. For example, as shown in FIG. 2, a ceramic plate CE is provided on the bottom of a metal sealed container M, and electrodes EL ₁ and EL ₂ are placed on top of the ceramic plate CE.
form. Then, the electrode EL ₃ is placed on both sides of the dielectric layer A.
is formed over almost the entire surface. With electrode EL ₁
EL ₃ forms a load capacitance C ₁ , and electrode EL ₂ and
EL ₃ forms a load capacitance C ₂ .
By grounding the electrode EL ₃ together with the sealed container M, the entire sealed container is shielded.

〔effect〕

According to the present invention, the operation of the output buffer that receives the frequency divided output from the frequency dividing stage is prohibited by the prohibition signal, and the oscillation and frequency division operations are maintained at a low voltage by this prohibition signal. Therefore, it is possible to inhibit the output signal while maintaining oscillation and frequency division operations at low voltage, suppress the leakage electric field, eliminate the oscillation rise time at restart, and further reduce the phase shift of the frequency division output. It can be eliminated. Therefore, the present invention is particularly effective in devices in which a plurality of crystal oscillator modules are arranged close to each other.

[Brief explanation of the drawing]

FIG. 1 is a logic circuit diagram showing an embodiment of the present invention, and FIG. 2 is a partially cutaway front view showing an example of a sealed container. OS...Crystal oscillator, _F1 , _F4 ...Flip-flop circuit, _B1 to _B5 ...Output buffer,...
Input terminal.

Claims (1)

[Claims for Utility Model Registration] A crystal oscillator, a frequency dividing stage that divides the output of the crystal oscillator, an output buffer that receives the frequency divided output from the frequency dividing stage, and a power supply voltage for the crystal oscillator and the frequency dividing stage. A control circuit for controlling the crystal is sealed in a sealed container, and an input terminal for a prohibition signal for prohibiting the operation of the output buffer is provided, and the prohibition signal from this input terminal is supplied to the control circuit to control the operation of the crystal. A crystal oscillator module characterized in that the power supply voltage of the oscillator and the frequency dividing stage is lowered to maintain its operation.