JPH0330026A - I/o blank interruption count control system - Google Patents

Abstract

PURPOSE:To continue the processing as it is at the time when abnormality is generated due to a noise, etc., in the course of using a communication adaptor by providing a counter area for the number of times of blank interruption and a blank interruption processing means for executing a return from the interruption. CONSTITUTION:When an interruption of a high level is generated in the course of running a program, a control is delivered to a processing part 13 from an interruption vector address 12. In the processing part 13, a register 15 is referred to and the cause of the interruption is checked. When the cause is normal, a protocol processing corresponding to the cause of the interruption is executed, and thereafter, returned to the program before the interruption. In the case of a blank interruption of a noise, etc., the register 15 is referred to, and it is decided that the blank interruption is abnormal. Subsequently, a counter in a counter area 16 is added by one at every interruption vector, and the processing returns to an interruption spot without executing the protocol processing. When the blank interruption is intermittent and not generated thereafter, the processing can be continued normally. If it is generated frequently, the cause can be known by checking the counter area 16. According to this constitution, even if a blank interruption occurs, a software comes to execute no abnormal operation. Also, from a result of counter-log, abnormality of a hardware related to the blank interruption can be detected.

Description

[Detailed Description of the Invention] [Summary] In a communication adapter that performs interrupt control using interrupt vectors. Regarding the I/O idle interrupt count control method that enables the detection of idle interrupts caused by abnormalities, noise may occur while the communication adapter is in use. In the event that an abnormality occurs due to a malfunction, etc., it will be possible to continue normal processing. The purpose is to enable the detection of hardware abnormalities, and there is a counter area where a count value of the number of empty interrupts is set corresponding to each interrupt hector, and a counter area for interrupts. After jumping to the interrupt vector address,
Check the interrupt cause register. For empty interrupts with no interrupt cause set. Equipped with idle interrupt processing means that updates the count value of the corresponding counter area and returns from the interrupt. The communication adapter is configured to control the count of idle interrupts.

[Industrial application field]

The present invention is. In communication adapters that perform interrupt control using interrupt vectors. This paper relates to an I/O idle interrupt count control method that enables the detection of idle interrupts caused by abnormalities. [Prior Art] In a communication adapter, the part that controls I/O (input/output) is a DMA circuit for data exchange with the main body of a workstation, personal computer, etc. and LAN, switched lines, packet +
This is the line support section that handles -m, etc.

When communicating using a communication adapter, these I/
The O part is controlled by software. Exchange data. For example, in the case of data transmission, the data is sent from the main unit to the communication adapter using DMA transfer, and after protocol processing within the communication adapter. Sends data to the line support section. Conversely, in the case of data reception, the data is received from the line support section, and after protocol processing by the communication adapter, the data is sent to the main unit using DMA transfer. At that time, an interrupt occurs in the DMA circuit and the line correspondence section. For communication adapters that have an interrupt control function using interrupt vectors. When an interrupt occurs. Interrupts the execution of the program currently being processed and enters exception handling. By that exception handling. Control is transferred to the address set in the interrupt vector, and protocol processing, etc. according to the type of interrupt is performed.

Normally, this kind of interrupt processing is performed. Due to power failure, noise on the cable, or other hardware failure. In some cases, the software may not be able to process the protocol correctly. for example. This is a case where no data was actually received even though a data reception interrupt was received. An interrupt that occurs even though there is no cause for the interrupt is called an empty interrupt. Conventionally, when an I/O idle interrupt occurs in a communication adapter. To proceed directly to protocol processing. The software sometimes malfunctioned. Also, even if it was determined that it was an empty interrupt, the empty interrupt was simply ignored. Check whether there was actually a problem with the hardware. I was unable to test it later. [Problem to be solved by the invention] According to the prior art, when an I/O idle interrupt occurs. Causes abnormal behavior. There was a problem with the equipment going down. Also. For empty interrupts. If you return to normal processing without doing anything. Even if performance deteriorated due to the frequent occurrence of empty interrupts, there was a problem in that it was not possible to investigate the cause. The present invention aims to solve the above-mentioned problems, and prevents noise, malfunction, etc. from occurring while using a communication adapter. If an abnormality occurs,
This will allow you to continue with normal treatment. The purpose is to also enable hardware abnormality detection. [Means for solving the problem] Figure 1 is a diagram showing the basic configuration of the present invention. In Figure 1. 10 is a communication adapter equipped with a CPU, memory, etc., and 11 is a hardware interrupt exception handling mechanism. 12 is an interrupt vector address where the destination address when an interrupt occurs is prepared for each interrupt vector, 13A
, 13B, . . . are interrupt processing units for each IJ hector, 14A. 14B, . . . are empty interrupt processing means. 15
is the interrupt cause register where the interrupt cause is set, 1
6A, 16B, . . . represent counter areas in which the number of empty interrupts is set for each interrupt vector. Communication adapter 10 that performs interrupt control using interrupt vectors
In this case, when an I/O interrupt etc. occurs, the interrupt exception handling mechanism 11 operates and transfers control to the interrupt processing address of the interrupt vector address 12 according to the vector number generated internally or the vector number notified from the outside. do. Regarding these processes. This is the same as the conventional technology. In the present invention, a counter area 16 is provided in which a count value of the number of empty interrupts is set corresponding to each interrupt vector.
A, 16B, ... are prepared. These counter areas 16A, 16B. At initial setting, it is initialized to "0°".

Interrupt processing units L3A, 13B, according to each interrupt vector,
...is for interrupts. Check the corresponding interrupt cause register I5 and check for empty interrupts for which no interrupt cause is set. The count values of the counter areas 16A, 16B, . . . corresponding to the interrupt hector are updated. Idle interrupt processing means 14A, 14B, . . .
It is equipped with... Due to this. I am trying to control the count of idle interrupts in the communication adapter IO. [
Operation] While using the communication adapter 10. When an empty interrupt occurs due to noise, malfunction, etc., the empty interrupt is counted and
This avoids the protocol processing caused by normal interrupts and returns to the processing before the interrupt. You can continue normal processing. In addition, if the performance suddenly deteriorates, if there is any abnormality, or if there is a periodic inspection, etc., dump the contents of count areas 16A, 16B, etc. and check whether they are "0" or not. By,
It is possible to check whether there is an abnormality in idle interrupts.

[Embodiment] FIG. 2 is a diagram of an application system fjl of the present invention, FIG. 3 is an explanatory diagram of an interrupt hector related to the present invention, and FIG. 4 is an explanatory diagram of processing in an embodiment of the present invention.

The present invention is applicable to a communication adapter 10 in a system as shown in FIG. 2, for example.

The main processing device 20 such as a workstation and the communication adapter 10 transmit and receive data via DMA circuits 21 and 22. The protocol processing unit 23 is software that performs processing corresponding to various communication control procedures. The line support section 24 is. This is an interface that sends and receives data through the modem 25 and line 26. I/O in the communication adapter 10 is performed to the DMA circuit 22 and the line correspondence section 24, and interrupts are also generated by these. When an interrupt occurs, control is transferred to each interrupt process using the interrupt vector address 12 as shown in Figure 3. As shown in FIG. 3, an interrupt vector address 12 is prepared at a specific address in the adapter memory 30. Interruption of the DMA circuit 22 due to requests from the main unit, and line handling section 24
For each interrupt from , the position is according to the vector number. The interrupt processing address to which control should be transferred is set. This interrupt processing address is set during TPL.
This is performed by a control program stored in the ROM of the communication adapter 10. The software of each protocol processing section obtains control from this interrupt processing address.

In particular, in the present invention, a counter area 16 is provided in a specific area in the adapter memory 30, in which the number of empty interrupts for each interrupt hectare is counted. Next, processing operations of an embodiment of the present invention will be explained according to ■ to ■ shown in FIG. (2) When a certain program is running and an interrupt with a higher interrupt level occurs, control is passed to the interrupt processing unit 13 from the interrupt vector address l2 shown in FIG.

■ The interrupt processing unit l3 refers to the interrupt cause register 15. Check the cause of the interrupt. Interrupt causes related to I/O interrupts, etc. include transmission or reception interrupts from the line support section 24 shown in Figure 2, interrupts indicating completion of DMA transfer with the main body, and start bits being set from the main CPU. There are interrupts to indicate that something has happened.

■ If the bit indicating the cause of the interrupt is ON, it is considered a normal interrupt and the protocol processing corresponding to the cause of the interrupt is performed.

■ After that, return to the interrupt source program.

■ For example, assume that an empty interrupt occurs due to noise, malfunction, etc.

■ Since control is transferred to the interrupt processing unit 13, refer to the interrupt cause register 15 and check the cause of the interrupt. ■ If the bit indicating the cause of the interrupt is OFF, this indicates an idle interrupt error. Therefore. Add 1 to the count value in count area l6 prepared for each interrupt vector. Thereafter, the process returns to the interrupt point without performing any protocol processing.

If the empty interrupt is intermittent and will not occur again, then proceed as follows. Processing will continue normally. On the other hand, if empty interrupts occur frequently, performance will suffer.
There may also be an effect externally, so in that case, check the counter area 16 using a memory dump etc.
This determines whether an empty interrupt is occurring or not. If it occurs, you can immediately tell which interrupt vector is abnormal. Also. Check this empty interrupt. This can also be done during debugging or operational testing, allowing hardware to be replaced or repaired early before a major failure occurs. [Effects of the Invention] As explained above, according to the present invention. Due to power supply abnormalities and various intermittent hardware abnormalities. The software will no longer operate abnormally even if an empty interrupt occurs. Also,
Based on the results of the empty interrupt counter log, hardware abnormalities related to empty interrupts can be detected.

[Brief explanation of drawings]

Figure 1 is a diagram showing the principle structure of the present invention, Figure 2 is a diagram showing the system configuration to which the present invention is applied, Figure 3 is an explanatory diagram of interrupt vectors related to the present invention, and Figure 4 is an example of an embodiment of the present invention. This is a process explanatory diagram. In the figure, 1
0 is a communication adapter, 1l is an interrupt exception handling mechanism. 12 is an interrupt vector address, 13A. 13B is an interrupt processing section. 14A and 14B represent empty interrupt processing means, 15 represents an interrupt cause register, and 16A and 16B represent a counter area. $-1 inc.

Claims (1)

[Claims] A communication adapter (
10), a counter area (16A, 16B, . . . ) in which a count value of the number of empty interrupts is set corresponding to each interrupt vector.
For interrupts, after jumping to the interrupt vector address, check the interrupt cause register, update the count value in the corresponding counter area for empty interrupts with no interrupt cause set, and return from the interrupt. An I/O idle interrupt count control method, comprising: idle interrupt processing means (14A, 14B, . . . ) for performing idle interrupt processing means (14A, 14B, . . . ) for controlling the count of idle interrupts in a communication adapter.