JPH0330992B2 - - Google Patents

Description

[Detailed description of the invention]

[Field of Application of the Invention] The present invention relates to an insulating film structure and a semiconductor device, and more particularly to an insulating film structure suitable for highly integrated semiconductor devices and a semiconductor device using the same. [Background of the Invention] Multilayer wiring technology in semiconductor devices is becoming increasingly important as the degree of integration increases. The most important aspect of this technology is to flatten the irregularities of various sizes that appear on the surface as the device is formed, improve the processing accuracy of the wiring formed on top of the irregularities, and further improve reliability due to electromigration, corrosion, etc. The objective is to establish a technology for forming an interlayer insulating film that does not reduce the The currently widely used method is to deposit an interlayer insulating film between the nth metal wiring and the n+1th metal wiring.
This is a method of forming an inorganic film using a vapor phase deposition method (CVD method) or a composite film of such a film and an inorganic film that can be coated with a spinner. By the way, in the vapor phase growth method, the unevenness on the surface of the formed film either faithfully reflects the unevenness of the underlying layer or becomes even more accentuated, and the surface cannot be flattened. Furthermore, with an inorganic film that can be coated with a spinner, it is possible to reduce the level difference to some extent, but it is difficult to form it thickly, so that sufficient planarization cannot be achieved. Instead of the method using inorganic membranes as described above,
Recently, methods using organic films have become popular. JP-A-48-74185, JP-A-50-
Publication No. 3792 discloses a method of using a thermosetting resin film as an interlayer insulating film. The advantage of such a method using an organic film is that it can be applied with a spinner in a varnished state, so the surface can be relatively easily flattened. However, the drawback of organic films is that they have poor moisture resistance, making it difficult to obtain sufficient reliability. One method to overcome this difficulty is to cover the organic film with an inorganic film to improve moisture resistance and planarize the surface. For example, JP-A-59-68953
The publication discloses a method of stacking a polyimide layer and silicon nitrite (Si ₃ N ₄ ) obtained by plasma discharge. However, according to the experience of the inventor of the present application, it is not possible to form any polyimide and any inorganic film in a layered manner. That is, since the difference in thermal expansion between the two is too large, cracks occur in the inorganic membrane in most cases. [Object of the Invention] An object of the present invention is to provide an insulating film structure with a good shape and a semiconductor device using the same, while eliminating the above-mentioned drawbacks. [Summary of the Invention] The present invention will be described in detail below. As mentioned above, the reason why cracks occur is that the coefficients of thermal expansion of the materials constituting the laminated interlayer film differ greatly. In order to eliminate this difficulty, it is best to select the type of polyimide to be used and use a material with low thermal expansion. Suitable materials for this include the following: That is, the following formula [] [In the formula, Ar ₁ is (R is a lower alkyl group, a fluorine-containing lower alkyl group, and n is 0 to 4.)

[expression] and

[Embodiments of the invention]

An embodiment of the present invention will be described with reference to FIG. As shown in FIG. 1a, after various junctions such as source, drain, base, emitter, etc. are formed on the semiconductor substrate 1, a phosphor glass film 2 (PSG film) is formed on the surface of the semiconductor substrate 1. This film is provided for surface stabilization, as is well known. After this, mark the designated area where the wiring should be taken out.
A hole is formed in the PSG film 2 to reach the surface of the semiconductor substrate 1. In this figure, various joints and surface irregularities are omitted for simplicity. Next, as shown in FIG. 1b, a first conductor layer 3 is deposited on the entire surface to a predetermined thickness, and unnecessary portions are removed by etching. Next, by applying Al chelate to the surface and heating it in oxygen, a thin alumina film of about 100 Å is formed over the entire surface. This film is effective in increasing the adhesive strength between the PSG film 2 and the low expansion polyimide film to be formed later. Next, as shown in FIG. 1c, a low thermal expansion polyimide 4 is formed to a predetermined thickness. Here, the low thermal expansion polyimide 4 is one of the materials mentioned above, and its thermal expansion coefficient is about 1×10 ^-5 K ^-1 , and the thermal expansion coefficient of Al ((thermal expansion coefficient 2.3
×10 ^-5 K ^-1 ), Cu (thermal expansion coefficient 1.4 × 10 ^-5 K ^-4 ), Au
(Thermal expansion coefficient: 1.4×10 ^-5 K ^-1 ). This thickness should be selected so as to alleviate the level difference on the surface to the extent that the unevenness of the surface does not have a negative effect on the subsequent second layer wiring formation process, and it is better not to make it thicker than necessary. Generally, 0.5~
Approximately 2 μm is appropriate. Next, as shown in FIG. 1c, an inorganic insulating film 5 is laminated over the entire surface. If ordinary polyimide is used, cracks will appear in the inorganic insulating film 5 at this point due to thermal stress due to the difference in coefficient of thermal expansion. By using low-expansion polyimide and selecting the thickness of the inorganic insulating film so that it is located in a region other than the shaded area in FIG. 2, such cracks will not occur and a good laminated film can be formed. Examples of the inorganic insulating film 5 include SiO ₂ film (thermal expansion coefficient 4.0×10 ^-7 K ^-1 ), PSG film, Si ₃ N ₄ film (thermal expansion coefficient 1.8×10 ^-6 K ^-1 ), and Al ₂ O ₃ film. (Thermal expansion coefficient 6×
10 ⁻⁶ K ⁻¹ ) can be used, but it is necessary to form the film at a temperature below the decomposition temperature of the polyimide, and it is preferable that the film has a coefficient of thermal expansion smaller than that of the polyimide. This inorganic insulating film 5 covers the surface of the polyimide film 4 to prevent moisture from penetrating and compensate for the defects of the polyimide film 4, and also to ensure electrical withstand voltage between the first and second layer wiring. Also helpful. That is, in order to determine the thickness of each of the interlayer films in the laminated structure, it is necessary to also consider the dielectric strength voltage between the layers. As an example, if a 1 μm low expansion polyimide film 4 is formed and a 0.2 μm SiO ₂ film 5 is formed on this,
A breakdown voltage of about 400V can be obtained, and if the SiO ₂ film 5 is made 0.4 μm, a breakdown voltage of 500V can be obtained. Of course, both cases are located outside the diagonal line in FIG. 2, and no cracks occur. Next, as shown in FIG. 1e, through holes 6 are formed in the interlayer film consisting of the polyimide film 4 and the inorganic insulating film 5. Then, as shown in FIG. In this case, the surface is considerably flattened by the polyimide film 4, and the photoresist (not shown) coated on the inorganic insulating film 5 has a substantially uniform thickness. Therefore, patterning of the photoresist can be performed very finely and with high precision. The inorganic insulating film 5 is processed according to the photoresist pattern, and the polyimide film 4 is further processed using the inorganic insulating film 5 as a mask. Although the photoresist is also etched when processing the polyimide film 4, since the inorganic insulating film 5 acts as a mask, the processing accuracy is not so degraded. Thereafter, as shown in FIG. 1f, the second conductor layer 7 is laminated and patterned by a conventional method. At this time, since the surface irregularities are reduced as described above, highly accurate processing is possible, and at the same time, variations in film thickness are small, making it possible to form highly reliable wiring. Finally, as shown in FIG. 1g, an inorganic insulating film 8 serving as a protective film is formed to complete the process of processing the wafer. The above has been explained using the case of forming two-layer wiring as an example, but when further increasing the number of layers, it is necessary to
It is sufficient to repeat the steps .about.f, and no new problems arise. [Effects of the Invention] As described above, according to the present invention, it is possible to reliably form a structure in which an inorganic insulating film is laminated on a low-expansion polyimide film, and to obtain a semiconductor device in which the yield of the line process is greatly improved. be able to.

[Brief explanation of the drawing]

Figures 1a to 1g are schematic cross-sectional views of a semiconductor substrate at each step showing an embodiment of the present invention, and Figure 2 shows the respective film thicknesses when a low expansion polyimide and an inorganic insulating film are laminated. FIG. 3 is a diagram showing areas where cracks occur. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... PSG film, 3... First wiring layer, 4... Low expansion polyimide film, 5
... Inorganic insulating film, 6 ... Through hole, 7 ... Second wiring layer, 8 ... Protective film.

Claims (1)

[Claims] 1. An inorganic insulating film having a thickness of 10% or more of the thickness of the organic insulating film is formed on a predetermined organic insulating film,
The organic insulating film has the following formula [] [In the formula, Ar ₁ is (R is a lower alkyl group, a fluorine-containing lower alkyl group, and n is 0 to 4), [Formula] and [Formula]. ] Or the following formula [] Or the following formula [] [In the formula [], Ar ₂ is a divalent aromatic group, and Ar ₃ is a tetravalent aromatic group. ] An insulating film structure characterized by being made of polyimide containing a chemical structural unit represented by any of the following. 2. An n-th metal wiring, an organic insulating film formed to cover the upper part of the metal wiring, an inorganic insulating film formed on the organic insulating film, and an (n+1)th metal wiring formed on the inorganic insulating film. wiring and the n and n+
In a semiconductor device including at least one portion interconnecting first wirings, the thickness of the inorganic insulating film is 10% or more of the thickness of the organic insulating film, and The membrane has the following formula [] [In the formula, Ar ₁ is (R is a lower alkyl group, a fluorine-containing lower alkyl group, and n is 0 to 4), [Formula] and [Formula]. ] Or the following formula [] Or the following formula [] [In the formula [], Ar ₂ is a divalent aromatic group, and Ar ₃ is a tetravalent aromatic group. ] A semiconductor device characterized by being made of polyimide containing a chemical structural unit represented by any one of the following.