JPH0331232B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method for recording the results of simulating the operation of a logic circuit.

Prior Art and Problems When manufacturing various logic circuits, it is necessary to check in advance whether the designed logic circuit will operate as planned, and this requires building the logic circuit with software and making it run. A simulation test will be conducted to see the results. The conventional method for collecting simulation results is to observe the signal values of each part of the circuit at a predetermined sampling period and record them all. However, with this method, the amount of test result data is enormous, the storage area (file) to store it is vast, and analysis is time-consuming. By the way, since what is needed for analysis is information on signal change points, it is useless to record many points during periods in which there is no signal change, as in the conventional method, and only increases the file size unnecessarily. One way to reduce the amount of files is to increase the interval at which data is recorded in the file, but this method increases the amount of data that is lost, making it impossible to faithfully collect simulation results.

Purpose of the Invention The present invention aims to reduce the file size without reducing recording accuracy by focusing only on signals that have changed and recording the signal values with signal identifiers and change times. It is.

Composition of the Invention The present invention provides a method for recording the results of logic simulation in which the operation of a logic circuit is simulated and the results are recorded in a file. is characterized in that only the value of the signal that has changed, its time, and the identifier of the signal are included, and this will be explained in detail below with reference to the illustrated embodiment.

Embodiment of the Invention Figure 1 is a time chart explaining an embodiment of the present invention, where A, B, and C of a are signals (including input signals) of each part of the circuit obtained as a result of simulation.
It is. Since these signals are digital signals, their signal values are 1 or 0. t indicates time. b is a conventional recording method shown for comparison, in which all signal values 1 or 0 sampled at each time t are recorded for each signal A, B, and C. On the other hand, c indicates the method according to the present invention, and the points to be recorded are limited to those where the signal changes. At this time, signal identifiers A, B, and C indicating in which signal the change occurred are attached to the signal values after the change, and the change time is also recorded. For example, 4, A1 in A indicates that the signal A was inverted from 0 to 1 at time t=4. Similarly, 13, B1, and C0 in B indicate that the signal B was inverted from 0 to 1 and the signal C was inverted from 1 to 0 at time t=13. The value of signal A at this time is from the previous time (t=12) since there is no record of A.
This is the same as the previous record, and since the previous record was (A1), it can be seen that A remains changed from 0 to 1. In this way, if you record the initial values 0, A0, B0, and C1 of all the signals as shown in c, all you need to do is record the information about the signals that have changed, and the signals A to A shown in a All changes in C can be recorded, so there is no drop in recording accuracy and the amount of files can be reduced.

Even with the conventional method shown in FIG. 1B, the amount of files can be reduced by expanding the recording sampling period. FIG. 2 is an explanatory diagram of the same, and in this example, b is an enlarged period. In this example, the recorded contents are recorded at a period three or four times as long as the period at each time point in FIG. However, if the period is simply expanded in this way regardless of signal changes, the reproduced waveform will become like c, and accurate recording of input/output signal changes cannot be expected.

FIG. 3 shows an application example of the present invention, where a represents a logic circuit to be simulated. _G1 to _G3 are, for example, two-input NAND gates. Input to the circuit is given by an external input table TBL1 shown in FIG. In this external input table, the □1 column shows the time, the □2 column shows the signal identifier, and the □3 column shows the signal value. This defines the external input given to the circuit. In this example, signal A changes to 0 at t = 0, signal B changes to 0 at t = 0, and signal C changes to 1 at t = 100. ,
It shows that the signal D changes to 0 at t=200.
Figure c shows the event table TBL2. The 0, 1,...t... on the left side indicate the time, and the blocks on the center and right side are events (contents of the event table).
E on the left end is a signal identifier, and 0 on the right end is a signal value. This table stores the signal that changes at each time and the signal value after the change. In this example, t=t
This indicates that the signal E changes to 0 and the signal F changes to 0. Figure d shows the net table TBL3.
The left column □1 indicates a signal identifier, and the right column □2 indicates a signal value. This net table stores the latest values of all signals in each part of the circuit. Figure e shows the net table TBL3 after processing to be described later, and figure f shows the event table TBL2 after processing to be described later. To explain how it works,
The simulation registers the external input at t=t in the event table.

Rewrite the net table according to the event table.

The output of each element is evaluated, and if the output signal changes, it is registered in the event table.

This process is repeated while increasing t by 1. To explain using the illustrated example, there is no external input at t=t, so proceed to step.

In accordance with the event t=t, the value of signal E in the net table is rewritten to 0, and the value of signal F is rewritten to 0 (Fig. e).

When gate _G3 is evaluated (inputs are E and F and values are 0 and 0), output H becomes 1. Since the current value of signal H (value written in the net table) is 0, signal H changes from 0 to 1 at time t+Δt (Δt is the delay time of gate _G3 ). Therefore, the event is registered at t=t+Δt in the event table (Fig. f).

In the conventional method, all signal values of the net table were recorded in a file after the processing was completed. This state is shown in FIG. 4a. The shaded area in the figure on the right is the record. In this method, after the process is completed, the time and event in the event table are recorded. FIG. 4b shows this, and the shaded area is the recording part. Note that this figure b is the same as figure 3c. Note that here, the signal values are 2 of 0 and 1.
Although described as values, the present method can be similarly applied to simulations that include an undefined state X, a high impedance state Z, or a transient state on the way from one state to another.

Effects of the Invention As described above, according to the present invention, there is an advantage that the results of logical simulation can be recorded in a small amount of files without reducing the recording accuracy.

[Brief explanation of the drawing]

FIG. 1 is a time chart showing an embodiment of the present invention, FIG. 2 is a time chart showing a conventional recording method, FIG. 3 is an explanatory diagram showing a specific example of the present invention, and FIG.
The figure is a diagram illustrating a comparison between the present invention and a conventional method. In the figure, _G1 to _G2 are logic circuits, TBL1 is an external input table, TBL2 is an event table, and TBL3
is a net table.

Claims (1)

[Claims] 1. In a logic simulation result recording method in which the operation of a logic circuit is simulated and the results are recorded in a file, the contents to be recorded in the file from a table that stores the latest values of signals of each part of the logic circuit are A logical simulation result recording method characterized in that only the value of a signal, its time, and an identifier of the signal are recorded.