JPH0332065A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make occupancy area small so as to contribute to the high integra tion of an integrated circuit by forming a transistor vertically at the side face of a thin silicon layer formed in projecting form on an insulator such as a silicon oxide, etc. CONSTITUTION:A silicon oxide film is formed on a silicon substrate 1, and a mask is put on a part to become a projection, and the film 2 is etched. Next, polysilicon is accumulated, and a silicon film 3 is formed, and impurities for control of threshold voltage are implanted into the side face of the projection by oblique ion implantation, and heat treatment is applied so as to recover the crystal defects at the surface of the film 3. Next, a gate oxide film 5 is formed, and by ion implantation source and drain diffusion layers 31, 32, and 33 are formed. Next, the polysilicon is etched back with the surface of the film 5 as a terminal. Thereupon, the polysilicon accumulated at the side face of the projection remains without being etched. These are made gate electrodes 61 and 62. Next, a mask is put, and the film 5 is removed, and those are made source electrodes 41 and 42 and a drain electrode 7. Hereby, it can be highly integrated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which elements are formed in a silicon layer formed on an insulator.

[Conventional technology]

FIG. 2 is a cross-sectional view showing a conventional semiconductor device. In the figure, (1) is a silicon substrate, L, 3υ, ■ is a source region diffusion layer, (2) 1 is a drain region diffusion layer, (T), (6
) is the source electrode, (5) is the gate oxide film, lυ, #A is the gate electrode, (c), 0 is the drain electrode, (8) is the local oxide film for element isolation, (9) is the element isolation film. This is a diffusion area.

Next, the operation will be explained. Transistors are arranged on the left and right, and the left and right transistors are separated from each other by a local oxide film (8) for element isolation and a diffusion region (9) for element isolation so as not to interfere with each other.

Further, the individual transistors are arranged on a plane.

[Problem to be solved by the invention]

Conventional transistors were constructed as described above, so in order to improve the degree of integration in integrated circuits, it is necessary to miniaturize the transistors themselves. Measures must be taken to prevent short channel effects such as degradation and punch-through phenomena, and it is also necessary to form regions that separate elements to prevent interference between adjacent transistors. There was a problem.

This invention was made to solve the above-mentioned problems, and aims to reduce the area occupied by the transistor, and to obtain a transistor with higher current driving ability than a normal transistor by using a thin film transistor. do.

[Means to solve the problem]

A semiconductor device according to the present invention is such that a convex insulating wall is formed on a silicon oxide film or the like, a silicon thin film layer is formed on the insulating wall, and one transistor is formed on the side wall of the convex portion. .

[Effect]

Since the vertical thin film transistor of the present invention is arranged vertically on the side wall of the convex portion, its occupied area is smaller than that of a conventional transistor arranged horizontally on a plane.
In addition, thin film SOI (Silicon On In5u
(later)) Since transistors are used, high current drive capability and prevention of bunch-through phenomenon can be achieved.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) is a silicon substrate, (2) is an insulator such as a silicon oxide film, (3) is a silicon thin film layer, 0υ, and is the source region diffusion layer in the silicon thin film layer (3).
is the drain region diffusion layer, @υ, (6) is the source electrode electrically connected to the diffusion layer 0υ and (to), respectively, (5) is the gate oxide film, - is the gate electrode, (7) is the diffusion layer (2
) is the drain electrode that is electrically connected to the drain electrode.

A silicon oxide film (2) is formed on a silicon substrate (1) by thermal oxidation or oxide film deposition. Next, in order to form a convex portion in the silicon oxide film (2), a mask is applied to the convex portion and the silicon oxide film (2) is etched. The height of this convex portion is approximately the gate length of the transistor. Next, polysilicon is deposited and made into a single crystal by laser annealing or the like to form a silicon N film layer (3). Next, impurities for threshold voltage control are implanted into the sidewalls of the convex portions by oblique ion implantation.

Heat treatment is applied to recover crystal defects generated by ion implantation on the surface of the silicon thin yA layer (3). Next, a gate oxide film (5) is formed by thermal oxidation. Next, 6υ, ■, - source and drain diffusion layers are formed by ion implantation. Next, polysilicon is deposited over the entire surface and the polysilicon is etched and packed with the surface of the gate oxide film (5) as the termination. Then, the polysilicon deposited on the side walls of the convex portion remains without being etched. This is used as a gate electrode of -1IJ.

Next, in order to form contacts for source and drain electrodes, a mask is applied and the gate oxide film (5) is removed.

A metal material such as aluminum is deposited on the portions and wired to form the source electrode (6) and the drain electrode (7).

In FIG. 1, a pair of left and right transistors are formed symmetrically about the center. Furthermore, the drain electrode (7) serves as a shared electrode for the two transistors.

Note that although the above embodiment shows the case where silicon oxide (2) is used, other materials may be used as long as they are insulators. Moreover, the manufacturing process may be changed in the manufacturing method, and even if a process such as heat treatment is added, as long as the structure remains the same, the same effects as in the above embodiments can be achieved.

〔Effect of the invention〕

As described above, according to the present invention, since the transistors are arranged vertically, the area occupied can be made smaller than that of conventional transistors arranged in a planar manner, and this can contribute to higher integration of integrated circuits. In addition, since transistors on SOI are used, there is no effect between adjacent transistors, eliminating the need for isolation regions between transistors.
It can also contribute to miniaturization. Furthermore, since thin film transistors are used, advantages such as high current drive capability and punch-through prevention can be utilized.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional side view showing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a conventional semiconductor device. In the figure, (1) is a silicon substrate, (2) is a silicon oxide, (3) is a silicon thin film layer, (2) is a source region diffusion layer, and (6) is a drain region diffusion layer. A source electrode, (5) a gate oxide film, 1υ, - a gate electrode, and (7) a drain electrode. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] A semiconductor device characterized in that a transistor is formed vertically on the side surface of a thin silicon layer formed in a convex shape on an insulator such as a silicon oxide film.