JPH0332094Y2 - - Google Patents

Description

[Detailed Description of the Invention] This invention relates to an amplifier circuit, and in particular improves the bias circuit section.

Generally, in transistor amplifier circuits, negative DC feedback is applied from the output to the input in order to stabilize the DC operating point of the amplifier element. FIG. 1 shows a conventional amplifier circuit, in which an input signal is input from input terminal 1 to the base of transistor _Q1 . The collector output of this transistor _Q1 is
Supplied to the base of transistor _Q2 . Transistors Q ₂ , Q ₃ , Q ₄ , and Q ₅ constitute a differential amplifier. R ₁ is a bias resistance, R ₂ , R ₃ , and R ₄ are load resistances, I ₀ is a current source, 2 is a power supply terminal, and V _r is a reference voltage. Further, the output terminal 3 is led out from the emitter of the transistor _Q2 . Furthermore, a capacitor C ₁ is connected in parallel to the load resistor R ₃ connected to the collector of the transistor Q ₄ .
It constitutes a low pass filter.

The DC voltage at the terminal of the resistor _R3 is negatively fed back to the base of the transistor _Q1 via the resistor _R5 , and is controlled so that the collector voltage of the transistor _Q1 is equal to the reference voltage _Vr . This stabilizes the DC operating point of transistor _Q1 .

Here, if the residual error of the DC negative feedback loop in the above circuit is ΔV (= V _r − _{V 1} ) (V ₁ is the collector voltage of transistor Q ₁ ), then the collector current I _C4 of transistor Q ₄ is equal to that of the PNP transistor. Assuming that the common base current amplification factor is α _p , I _C4 = α _p I ₀ /1 + exp (ΔV/KT/q) (1). Also, the base current of transistor Q ₁ is I _B1 ,
When the base-emitter junction potential is V _BE1 , R ₃ · I _C4 = V _J1 + R ₅ I _B1 (2). Calculating ΔV from equations (1) and (2), ΔV=kT/qln(α _p I ₀ R ₃ /V _BE1 +R ₅ I _B1 −1) …(3) In equation (3), ΔV=0 In order to do this, each constant may be determined so that (α _p I ₀ R ₃ /V _BE1 +R ₅ I _B1 −1) becomes 1.

However, if the common emitter current amplification factor β ₁ of transistor Q ₁ varies, I _B1 changes, and the values of V _BE1 and α _p vary depending on the element, and furthermore, these β ₁ , V _BE1 , α _p The value of changes with temperature. As a result, ΔV (V _r −V ₁ ) in equation (3) changes. This means that if V _r is constant, V ₁ will change, and the collector current I _C1 and collector-emitter voltage V _CE of transistor Q ₁ will also change.

As mentioned above, in conventional amplifier circuits, each parameter (α,
The disadvantage is that the DC operating point fluctuates due to fluctuations in β, V _BE ).

This idea was made in view of the above-mentioned points, and uses a current source as a current load of a differential amplifier that has both the signal amplification transistor output and a reference voltage as inputs, and uses the terminal voltage of the current load to generate the signal. It is an object of the present invention to provide an amplifier circuit configured to apply negative DC feedback to the base of an amplification transistor, so that the DC operating point of the signal amplification transistor is almost unaffected by the characteristics of each element, and which achieves extremely stable operation. purpose.

An embodiment of this invention will be described below with reference to the drawings.

In FIG. 2, 1 is a signal input terminal, which is connected to the base of a transistor _Q1 for signal amplification. The emitter of this transistor Q ₁ is connected to the reference potential terminal, and the collector is connected to the power supply terminal 2 via the resistor R ₁ and the transistor
Connected to the base of _Q2 . This transistor Q ₂
, and transistors Q ₃ , Q ₄ , and Q ₅ constitute a differential amplifier. The collector of the transistor Q ₂ is connected to the power supply terminal 2, and the emitter is connected to the reference potential terminal via a resistor R ₂ and to the base of the transistor Q ₃ via a resistor R ₃ .
Also, the emitter of transistor Q ₂ is connected to output terminal 3.
It is connected to the. The emitters of transistors Q ₃ and Q ₄ are connected in common and then connected to power supply terminal 2 via current source I ₀ . The collector of transistor Q ₃ is connected to the reference potential terminal via diode D ₁ and to the base of transistor Q ₆ . This transistor _Q6 constitutes a constant current source, and its collector is connected to the transistor
It is connected to the collector of _Q4 , and the emitter is connected to the reference potential terminal. Furthermore, said transistor Q ₄
A negative feedback loop 4 is connected between the collector of Q1 and the base of transistor _Q1 . Also, the base of transistor Q ₄ is connected to transistor Q ₅ through resistor ₄ .
It is connected to the Emitsuta. this transistor
The emitter of Q ₅ is connected to the reference potential terminal via a resistor R ₅ , and the base is given a reference voltage V _r .
The collector is connected to power terminal 2. A capacitor _C1 is connected between the power supply terminal 2 and the base of the transistor _Q3 .

One embodiment of this invention is constructed as described above, and a signal input to the input terminal 1 is amplified by the transistor Q ₁ and is led out to the output terminal 3 via the transistor Q ₂ . Here, resistor R ₃ and capacitor
_C1 constitutes a low pass filter. This low-pass filter allows transistor Q ₃
AC signal components are prevented from entering the base. Further, in order to maintain DC balance of the differential amplifier, a resistor R4 having a value equal to that of the resistor _R3 is connected between the emitter of the transistor _Q5 and the base of _the transistor _Q4 . A current I0 is supplied to the emitters of transistors _Q3 and _Q4 of the differential amplifier by a current source or a resistor, and the transistors Q3 and Q4 are supplied with a current _I0 by a current source or a resistor.
A diode _D1 is connected between the collector of _Q3 and ground potential. Diode D ₁ and transistor Q ₆ then form a current mirror configuration.

Here, the DC collector potential of transistor Q ₁ is V ₁ , and the residual error ΔV of this DC feedback loop is
(=V _r −V ₁ ), the collector current I _C4 of transistor Q ₄ is I _C4 = α _p I ₀ /1 + exp (ΔV/KT/q), where α _p is the common base current amplification factor of the PNP transistor. …(4) becomes. Also, the base current of transistor _Q1 is
Assuming I _B1 , the diode D ₁ and the transistor Q ₆ have a current mirror configuration, so I _C4 = α _p I ₀ + I _B1 /2 (5). Determining ΔV from equations (4) and (5), ΔV=kT/qln(2α _p I ₀ /α _p I ₀ +II _B1 −1) …(6). Here, I _B1 changes due to variations in the common emitter current amplification factor β ₁ of transistor Q ₁ and temperature changes, but for the maximum possible value of I _B1 (minimum value of β ₁ ), α _p If I ₀ ≫ I _B1 …(7), I _B1 can be ignored for α _p I ₀ , and in that case, the α _p term also disappears in equation (6), and ΔV0 can be obtained. . In other words, V ₁ =
V _r , the collector current of transistor Q ₁ I _C1 ,
And the collector-emitter voltage V _CE is I _C1 = V _CC −V ₁ /R ₁ = V _CC −V _r /R ₁ , V _CE = V ₁ = V _r (8), which is an unstable element. A stable DC operating point can be obtained that is not affected by the transistor parameters (α, β, V _BE ).

The signal output can then be taken out from the emitter of transistor _Q2 or the collector of transistor _Q1 . Furthermore, the same effect as above can be obtained by connecting the load of transistor _Q1 in cascode connection as shown in FIG. In other words, the transistor _Q7 , whose base is given bias _VB, is connected in cascode. The other circuit sections are the same as those in the previous embodiment, so their explanation will be omitted. Further, in this circuit, a filter may be connected to the feedback circuit that applies negative DC feedback from the collector of the transistor Q ₄ to the base of the transistor Q ₁ in order to suppress AC fluctuations.

Semiconductor integration (IC) of the circuit shown in Figure 1
If the PNP transistor is
Formed as a PNP transistor. This lateral PNP transistor has a DC grounded emitter current amplification factor β010 and a transition frequency T
It is 5MHz and has extremely poor performance. Therefore, when this circuit is used as a video band amplifier circuit, the following problems arise.

That is, the common emitter current amplification factor β of the transistor Q ₃ at the frequency is β = (T/) ... (1A), so the base input impedance Zi of the transistor Q ₃ seen from the emitter of the transistor Q ₂ at the frequency is , Zi=2re・β=2re・(T/) …(2A) Here, re is the internal emitter impedance of transistors Q ₃ and Q ₄ , and re=(kT/q)・(2/I ₀ ) is given by (However, k: Boltzmann constant,
T: absolute temperature, q: electron charge.

However, the emitter output impedance of transistor _Q5 must be sufficiently small.

Here, the actual constants in equation (2A) are: = 4MHz, T = 5MHz, I ₀ = 200μA, k = 1.38
Substituting ×10 ^-23 j/k, q = 1.06 × 10 ^-19 C, and T = 300°K yields Zi2 × 259 × (5/4) 648Ω, making Zi an extremely small impedance.

This Zi is the emitter output load of transistor _Q2 , and since its value is small as described above, it distorts the emitter output signal of transistor _Q2 . Furthermore, since Zi changes depending on the ambient temperature, the strain also changes accordingly.

However, according to the circuit of the present invention, the transistor
A resistor R ₃ forming a low-pass filter is connected between the emitter of Q ₂ and the base of transistor Q ₃ . The value of this resistor R ₃ is the same as that of transistors Q ₃ , Q ₄
It is sufficient that the differential pair operates in the DC region, so the number +
It can take a large value of KΩ (actually 10KΩ to 30KΩ).

Therefore, distortion of the emitter output signal of transistor _Q2 can be made extremely small.

Also, in the circuit of this invention, transistors Q ₄ ,
Feedback is applied from the connection point of the collector of Q ₆ to the base of transistor Q ₁ , so transistor Q ₆
It is equal to the collector-emitter voltage of . Therefore, if diode D ₁ is constructed from a transistor (generally, most diodes in ICs are constructed by shorting the collector and base of the transistor), its V _CE and the V _CE of transistor Q ₆ are approximately equal ( 0.7V), so the Early effect is also equal and the matching of the current mirror is improved.

Thereby, the DC collector voltage V ₁ of the transistor Q ₁ can be made equal to the reference voltage with high accuracy.

As mentioned above, this idea uses a current mirror configuration for the collector load of a differential amplifier whose inputs are the output of a signal amplifying transistor passed through a low-pass filter and the reference voltage, and its current source By applying negative DC feedback to the base of the signal amplification transistor from the load side, the DC operating point of the signal amplification transistor can be extremely stabilized without being affected by each parameter (α, β, V _BE ) of each constituent transistor. , it is possible to provide an amplifier circuit suitable for integration into an integrated circuit.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a conventional amplifier circuit, Fig. 2 is a circuit diagram showing an embodiment of this invention, and Fig. 3 is a circuit diagram showing another embodiment of this invention. It is. 1...Input terminal, 3...Output terminal, Q ₁ to Q ₇ ...
...Transistor, _R1 to _R5 ...Resistor, _D1 ...Diode.

Claims (1)

[Claims for Utility Model Registration] A signal amplifying transistor whose emitter is grounded and an input signal is applied to its base; a transistor differential amplifier whose collector load has a current mirror configuration; and one of the transistor differential amplifiers. a reference voltage source connected to an input terminal of the transistor differential amplifier; a low-pass filter including a resistor connected between the output terminal of the signal amplifying transistor and the other input terminal of the transistor differential amplifier; An amplifier circuit comprising: a DC feedback circuit directly connecting the collector of the current mirror, the connection point of the current mirror load, and the base of the signal amplifying transistor.