JPH033393A - Manufacture of copper-plated laminated board - Google Patents
Manufacture of copper-plated laminated boardInfo
- Publication number
- JPH033393A JPH033393A JP13841189A JP13841189A JPH033393A JP H033393 A JPH033393 A JP H033393A JP 13841189 A JP13841189 A JP 13841189A JP 13841189 A JP13841189 A JP 13841189A JP H033393 A JPH033393 A JP H033393A
- Authority
- JP
- Japan
- Prior art keywords
- inner layer
- layer circuit
- groove
- board
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、多層プリント板用銅張り積層板の内層回路の
寸法精度C位首梢度ン全良くする製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a manufacturing method for improving the dimensional accuracy of the inner layer circuit of a copper-clad laminate for a multilayer printed board by C degree.
多層プリント板用鋼帳り稍N板は、内層用回路全形成し
た銅張り積層板を1枚以上使用し、外層用鋼箔と内層回
路板とのmlにプリプレグを配し、さらに最外側にステ
ンレス板装置いて加熱加圧成形して製造する。その際、
内層回路と内層回路の間で銅箔がエツチングによって除
〃為nた部分にボイドすなわち樹脂が光埴さtない空隙
が生ずることがある。通常は、このボイドの発生を防ぐ
ために、プリント板となる領域より外側に回かって工T
−抜き溝を設ける。The steel foil N board for multilayer printed boards uses one or more copper-clad laminates with all circuits formed for the inner layer, prepreg is arranged between the steel foil for the outer layer and the inner layer circuit board, and Manufactured by heating and press forming using stainless steel plate equipment. that time,
A void, that is, a gap in which the resin is not exposed to light, may be formed between the inner layer circuit and the inner layer circuit where the copper foil is removed by etching. Normally, in order to prevent this void from occurring, the T
- Provide an extraction groove.
最近、多層プリント板は一配線ラインか細姻化し小径ド
リル穴明けによって小挟スルーホールを設けて高密度化
しつつある。そのため、内層回路の位lf精度は益々厳
しくなっている。例えは、2゜54市の格子に10口市
φのドリルでスルーホールを形成し、格子間ライン配線
が1〜2本の場合の内層(9)路の位置精度は±200
へ±250μm根度で光分である。しかし、小径ドリル
(Q、2〜CL4IXlfflφ)KよるI%電変度プ
リント板&工、±150μm以下が必要である。Recently, multi-layer printed circuit boards are becoming more densely packed with single wiring lines and small through-holes formed by drilling small diameter holes. Therefore, the accuracy of the inner layer circuit is becoming increasingly strict. For example, if a through hole is formed in a grid of 2°54 mm with a drill of 10 mm diameter, and there are 1 or 2 line wirings between the grids, the positional accuracy of the inner layer (9) is ±200.
±250 μm root depth and light minutes. However, it is necessary to use a small diameter drill (Q, 2 to CL4IXlfflφ) to drill a printed board with an I% electrical variation of ±150 μm or less.
以上の事情のなかで、内層回路の位■の狂いは、多層プ
リント板用銅張り積層板を積層成形する際の加熱加圧に
よって引き起こされる司龍注が大きい。内Nl1g1路
板をプリプレグの間に入れ加熱加圧すると、プリプレグ
の樹脂(工溶融し流動するために内層回路板にX、 Y
方向の力が働く。また、加熱によって温度が内層回路板
の基材樹脂の熱変形温度以上となるため、上記流動によ
る力で変形を起こす。また、加熱、冷却による膨張、収
縮のために内層回路の位讃袖度が低下する。Under the above circumstances, the misalignment of the inner layer circuit is largely caused by heating and pressure during lamination and molding of copper-clad laminates for multilayer printed boards. When the inner circuit board is placed between the prepregs and heated and pressurized, the resin of the prepreg (X, Y) is applied to the inner layer circuit board in order to melt and flow.
A directional force acts. Furthermore, since the temperature becomes higher than the thermal deformation temperature of the base resin of the inner layer circuit board due to heating, the force caused by the flow causes deformation. Furthermore, the stability of the inner layer circuit decreases due to expansion and contraction due to heating and cooling.
本発明G丁、こnらの間踊点を解決し高位11精度の多
1iプリント板用鋼侵り積層板の製造方法を提供するこ
と′j&:目的とする。It is an object of the present invention to solve these problems and provide a method for manufacturing a steel eroded laminate for printed boards with high 11 precision.
本発明考等は、内ノー回路の位fIIt精度の良い方法
を検討した結果、従来積膚成形注同土のために設けてい
たエア抜き溝の投首方法と内ノー回路の位置精度に関連
があることを見出し本発明の方法含得たO
本発明は、必要な回路パターン胸囲の、#@’(r5m
m以下とした内層回路板の表面にプリプレグを介して銅
箔を重ね甘わせて成る積層偽成体tステンレス板で挟み
、加熱加圧する製造方法である。As a result of studying a method with high precision for the position of the inner no circuit, the present invention has been developed to improve the position accuracy of the inner no circuit and the method of opening the air vent groove, which was conventionally provided for plaster molding, and the position accuracy of the inner no circuit. The method of the present invention has been found to be
This is a manufacturing method in which the inner layer circuit board is sandwiched between laminated fake stainless steel plates made by layering copper foil via prepreg on the surface of an inner layer circuit board having a thickness of less than m, and then heating and pressurizing the board.
次に本発明を図によって貌明する。第2図は、従来のエ
ア抜き溝を設けた内J−回路板である。最終プリント板
となる内!W1回路形成部7、内l留回路形成部周囲溝
2、エア抜き溝3、加工用カイトホール4がある。第1
図は本発明の内)−回路板を示すが、内層IP!回路形
成部周囲42を設けるか、エア抜き溝を設けない。Next, the present invention will be explained with reference to the drawings. FIG. 2 shows an inner J-circuit board provided with a conventional air vent groove. The final printed board! There are a W1 circuit forming part 7, an inner retaining circuit forming part circumferential groove 2, an air vent groove 3, and a kite hole 4 for processing. 1st
Although the figure shows the circuit board of the present invention, the inner layer IP! Either the circuit forming part periphery 42 is provided or no air vent groove is provided.
本発明の方法によると、エア扱き溝を除き、内j・(ロ
)路形成部胸囲溝の幅を狭くしたため、プリプレグ樹脂
の流動抵抗が従来より大きく、そのためにN4N成形前
後の内Jll11回路位置の変化が少ないと考えらnる
。又、不発明によるとpfQ記従来のボイド発生もない
。According to the method of the present invention, since the width of the inner J/(B) tract forming part chest girth groove is narrowed except for the air handling groove, the flow resistance of the prepreg resin is greater than before, and therefore the inner Jll11 circuit position before and after N4N molding is It is thought that there is little change in . Further, according to the invention, voids do not occur as in the conventional pfQ method.
第1図に示すエアvj、き衝がない内層LgI鮎板にプ
リプレグと銅箔を電ね、澗常の方法で加熱加圧して多層
プリント板用銅張りIjI層板を得た。この時、内層回
路板の内層回路形成部周囲溝の−t5雛、lQmo、2
0市の3sとした。The prepreg and copper foil were applied to the inner layer LgI board without air pressure and pressure shown in FIG. 1, and heated and pressed in a conventional manner to obtain a copper-clad IjI laminate for a multilayer printed board. At this time, -t5 chick, lQmo, 2 of the groove around the inner layer circuit forming part of the inner layer circuit board.
It was set as 3s for 0 city.
第2図に示す従来のエア扱きmを有し内層回路形成部周
囲溝の幅を5市とした内層I!ll!j路板ヶ用い、実
施例と同じ方法で多層プリント板用銅張り積層板を得た
。The inner layer I has a conventional air handling m shown in FIG. 2 and has a groove around the inner layer circuit forming part with a width of 5 cm! ll! A copper-clad laminate for a multilayer printed board was obtained using the same method as in the example using a road board.
以上実施例及び比較9」によつて得た禎J−板における
積層成形萌後の内層回路位負の変化量を表1に示す。Table 1 shows the amount of change in the inner layer circuit potential after lamination molding in the J-plates obtained in the above Example and Comparison 9.
表1
〔発明の効果〕
本発明によつて、多層プリント板用@張り積層板の稍1
ml成形@後の内層回路位置変化の最大値が100μm
以下となる製造が可能となった。Table 1 [Effects of the invention] According to the present invention, details 1 of the @stretched laminate for multilayer printed boards
Maximum change in inner layer circuit position after ml molding is 100μm
It is now possible to manufacture the following:
第1図は不発明の内層回路板、弟2図は従来の内層回路
板金示す。
1・・・・・・内層(ロ)路形成部、
2・・・・・・内層回路形H.都周囲溝、3・・・・・
・エア抜き膚、4・・・・・・加工用ガイドホール、5
・・・・・・渦の都, 6・・・・・・内層回路板
。Fig. 1 shows an uninvented inner layer circuit board, and Fig. 2 shows a conventional inner layer circuit board. 1... Inner layer (b) path forming part, 2... Inner layer circuit type H. Miyako area ditch, 3...
・Air release skin, 4...Guide hole for processing, 5
...Whirlpool City, 6...Inner layer circuit board.
Claims (1)
その外周を同一平面状とした内層回路板の表面にプリプ
レグを介して銅箔またを工片面銅張り積層板を銅箔が外
側に配置されるように重ね合わせて成る積層構成体をス
テンレス板で挟み、加熱加圧して成形することを特徴と
する多層プリント板用銅張り積層板の製造方法。1. A groove with a width of 5 mm or less is provided around the circuit pattern, and the outer periphery of the inner layer circuit board is made flush with the surface of the inner layer circuit board. A method for manufacturing a copper-clad laminate for a multilayer printed board, which comprises sandwiching a laminate structure made by stacking the laminates between stainless steel plates and molding them by heating and pressing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13841189A JPH033393A (en) | 1989-05-31 | 1989-05-31 | Manufacture of copper-plated laminated board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13841189A JPH033393A (en) | 1989-05-31 | 1989-05-31 | Manufacture of copper-plated laminated board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH033393A true JPH033393A (en) | 1991-01-09 |
Family
ID=15221335
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13841189A Pending JPH033393A (en) | 1989-05-31 | 1989-05-31 | Manufacture of copper-plated laminated board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH033393A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980055123A (en) * | 1996-12-28 | 1998-09-25 | 이대원 | Fault Diagnosis Method of Electrical Equipment and Its Apparatus According to the Change of Load Current Status |
| KR20020025559A (en) * | 2000-09-29 | 2002-04-04 | 전세호 | PCB manufacturing process |
-
1989
- 1989-05-31 JP JP13841189A patent/JPH033393A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19980055123A (en) * | 1996-12-28 | 1998-09-25 | 이대원 | Fault Diagnosis Method of Electrical Equipment and Its Apparatus According to the Change of Load Current Status |
| KR20020025559A (en) * | 2000-09-29 | 2002-04-04 | 전세호 | PCB manufacturing process |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2874329B2 (en) | Method for manufacturing multilayer printed wiring board | |
| JPH0575269A (en) | Manufacture of multilayer printed-wiring board | |
| US5595858A (en) | Manufacturing method for double-sided wiring board | |
| JPH033393A (en) | Manufacture of copper-plated laminated board | |
| US9521754B1 (en) | Embedded components in a substrate | |
| KR20010005137A (en) | Method of manufacturing multi-layer printed circuit board | |
| JP2621710B2 (en) | Method for manufacturing curved multilayer wiring board | |
| JPH01282892A (en) | Manufacture of multilayer printed wiring board | |
| KR20130079118A (en) | Method for manufacturing multi-layer circuit board and multi-layer circuit board manufactured by the same method | |
| JP3583241B2 (en) | Manufacturing method of metal foil clad laminate and manufacturing method of printed wiring board | |
| JPH06224553A (en) | Method for manufacturing multilayer printed wiring board | |
| JPH0493093A (en) | Forming method for electronic component containing recess of circuit board | |
| JPH06244555A (en) | Manufacture of multilayered laminate board | |
| KR100222754B1 (en) | Fabrication method of rigid-flexible laminate elevation of surface confidence | |
| JPH0545079B2 (en) | ||
| JPS6247199A (en) | Manufacture of inner layer circuit board for multilayer circuit board | |
| KR19980041020A (en) | Manufacturing method of multilayer printed circuit board with precise blind via hole | |
| JPH04312995A (en) | Manufacture of copper-clad board | |
| JPH0350892A (en) | Manufacture of conductive metal-foil-clad multilayer circuit board | |
| JPH0329393A (en) | Metal-clad laminated plate | |
| JP2000244118A (en) | Manufacture of build-up multilayer wiring board | |
| JPS6122937A (en) | Printed wiring board and manufacture thereof | |
| JPH06169172A (en) | Method for manufacturing multilayer printed board | |
| JP2580667B2 (en) | Method for manufacturing multilayer printed wiring board | |
| JPH04329695A (en) | Manufacturing lamination plate with metal foil for multi-layer printed circuit board |