JPH033408A - Automatic digital gain control system - Google Patents

Automatic digital gain control system

Info

Publication number
JPH033408A
JPH033408A JP13595789A JP13595789A JPH033408A JP H033408 A JPH033408 A JP H033408A JP 13595789 A JP13595789 A JP 13595789A JP 13595789 A JP13595789 A JP 13595789A JP H033408 A JPH033408 A JP H033408A
Authority
JP
Japan
Prior art keywords
value
input signal
calculation means
gain control
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13595789A
Other languages
Japanese (ja)
Inventor
Hisayoshi Matsui
久義 松井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP13595789A priority Critical patent/JPH033408A/en
Publication of JPH033408A publication Critical patent/JPH033408A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は各種のディジタル信号処理装置に使用されるデ
ィジタル自動利得制御方式に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a digital automatic gain control system used in various digital signal processing devices.

〔従来の技術〕[Conventional technology]

従来のディジタル自動利得制御方式の回路構成例を第2
図に示し、その回路の動作を以下に説明する。まず、入
力信号は、乗算器101により、加算器107の出力値
を乗ぜられて出力信号となり、外部に出力される。同時
に、この出力信号は自乗器102と平均化器103とに
より、自乗平均値が計算される。次いで、この自乗平均
値を減算器105においてあらかじめ定めた設定値から
減じることにより、その設定値との誤差を求める。さら
に、この誤差に乗算器106においである任意の係数α
を乗じる。この乗算器106の出力値と、加算器107
の出力値を人力値とするレジスタ108の出力値とを加
算器107で加算し、その結果を乗算器101に供給す
ることにより次の入力信号に対する利得を誤差が;にな
るように修正し、結果的に出力信号を一定レベルに保っ
ていた。
The second example of the circuit configuration of the conventional digital automatic gain control method is
The operation of the circuit will be described below. First, the input signal is multiplied by the output value of the adder 107 by the multiplier 101 to become an output signal, which is output to the outside. At the same time, the square mean value of this output signal is calculated by the squarer 102 and the averager 103. Next, by subtracting this root mean square value from a predetermined set value in a subtracter 105, an error with respect to the set value is determined. Furthermore, an arbitrary coefficient α in the multiplier 106 is added to this error.
Multiply by The output value of this multiplier 106 and the adder 107
The adder 107 adds the output value of the input value to the output value of the register 108 as a manual value, and supplies the result to the multiplier 101 to correct the gain for the next input signal so that the error is; As a result, the output signal was kept at a constant level.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら上記のような従来例のディジタル自動利得
制御方式では、入力信号レベルと所望の出力信号レベル
との差が大きくなるにつれて、8力信号をその所望のレ
ベルに収束させるまでの時間が長くなる。
However, in the conventional digital automatic gain control method as described above, as the difference between the input signal level and the desired output signal level increases, the time required to converge the 8-power signal to the desired level increases.

この収束時間は、第2図に示す係数αの値を大きくすれ
ば、その値にほぼ反比例して短くなるが、ある程度以上
に係数αの値を大きくすると、入力信号レベルと所望の
出力信号レベルとの差が小さい時に、過剰制御となり、
そのため出力信号レベルの変動が大きくなってしまった
り、さらには出力信号の発振につながる場合もある。
If the value of the coefficient α shown in Fig. 2 is increased, this convergence time will be shortened in almost inverse proportion to the value, but if the value of the coefficient α is increased beyond a certain level, the input signal level and the desired output signal level will be reduced. When the difference between
This may result in large fluctuations in the output signal level or even lead to oscillation of the output signal.

すなわち、従来方式では出力信号の収束時間をすべての
入力信号レベルにおいて一定時間以内におさえようとす
ると、入力信号レベルのダイナミックレンジが制限され
てしまうという欠点があった。
That is, in the conventional method, if an attempt is made to suppress the convergence time of the output signal within a certain period of time at all input signal levels, the dynamic range of the input signal level is restricted.

そこで、本発明は、上述のような欠点を除去し、入力信
号が変動してから出力信号が所定のレベルに安定するま
での時間を大幅に短縮することが可能となり、入力信号
レベルの変動に対する出力信号レベルの変動も十分に小
さくすることができるディジタル自動利得制御方式を提
供することを目的とする。
Therefore, the present invention eliminates the above-mentioned drawbacks, makes it possible to significantly shorten the time from when the input signal fluctuates until the output signal stabilizes at a predetermined level. It is an object of the present invention to provide a digital automatic gain control method that can sufficiently reduce fluctuations in output signal level.

(課題を解決するための手段) かかる目的を達成するため、本発明は、レベル値が変動
する入力信号に対して指定の利得を乗じた出力信号のレ
ベルを常に一定の値に保つように前記利得を制御するデ
ィジタル自動利得制御方式であって、入力信号の振幅値
の自乗平均値を算出する第1の演算手段と、所定の設定
値を第1の演算手段から得られる自乗平均値で除する第
2の演算手段と、第2の演算手段の出力値を利得として
入力信号に乗じる第3の演算手段とを具備したことを特
徴とする。
(Means for Solving the Problems) In order to achieve this object, the present invention provides the above-mentioned method so that the level of an output signal obtained by multiplying an input signal whose level value fluctuates by a specified gain is always kept at a constant value. A digital automatic gain control method for controlling gain, comprising a first calculation means for calculating the root mean square value of the amplitude value of an input signal, and a predetermined set value divided by the root mean square value obtained from the first calculation means. The present invention is characterized in that it comprises a second calculation means for calculating the output value of the second calculation means, and a third calculation means for multiplying the input signal by using the output value of the second calculation means as a gain.

〔作 用) 本発明では、上記構成のように、入力信号のレベル値の
自乗平均値を求め、この自乗平均値で所定の設定値を除
算し、その除算結果の商を利得として入力信号の振幅値
に直接乗じて出力信号のレベルを所定の値に一定に保つ
ようにしたので、入力信号が変動してから出力信号が所
定のレベルに安定するまでの時間を大幅に短縮すること
が可能となり、またその結果入力信号レベルの変動に対
する出力信号の変動も十分に小さくすることがで舘る。
[Function] In the present invention, as in the above configuration, the root mean square value of the level value of the input signal is obtained, a predetermined set value is divided by this root mean square value, and the quotient of the division result is used as the gain to calculate the input signal. Since the level of the output signal is kept constant at a predetermined value by directly multiplying the amplitude value, it is possible to significantly shorten the time from when the input signal fluctuates until the output signal stabilizes to the predetermined level. As a result, fluctuations in the output signal with respect to fluctuations in the input signal level can be made sufficiently small.

〔実施例〕〔Example〕

以下、図面を参照して本発明の実施例を詳細に説明する
Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図は本発明の特徴を最もよく表わすディジタル自動
利得制御方式を実施する回路の構成例を示す。同図にお
いて乗算器201の一方の入力端子には外部からレベル
値が変動する入力信号51が入力され、他の入力端子に
は除算器204の出力値が入力される。この乗算器20
1の演算値は出力信号S2となってそのまま外部へ出力
される。
FIG. 1 shows an example of the configuration of a circuit implementing a digital automatic gain control method that best represents the features of the present invention. In the figure, an input signal 51 whose level value fluctuates is input from the outside to one input terminal of a multiplier 201, and an output value of a divider 204 is input to the other input terminal. This multiplier 20
The calculated value of 1 becomes the output signal S2 and is directly output to the outside.

同時に、上述の入力信号Stは自乗器202の入力端子
にも入力され、自乗器202の出力値は平均化器203
の入力端子に人力される。従って、平均化器203の出
力端子には入力信号Slを自乗平均化した自乗平均値が
出力され、その自乗平均値は、除算器204の一方の入
力端子に人力される。除算器204の他の入力端子には
外部から所定の設定値が入力される。
At the same time, the above-mentioned input signal St is also input to the input terminal of the squarer 202, and the output value of the squarer 202 is outputted to the averager 203.
is input manually to the input terminal. Therefore, a root mean square value of the input signal Sl is outputted to the output terminal of the averager 203, and the root mean square value is inputted to one input terminal of the divider 204. A predetermined setting value is inputted to the other input terminal of the divider 204 from the outside.

除算器204の出力端子には、上記の所定の設定値を入
力信号Slの自乗平均値で除した結果(商の値)が出力
される。
The output terminal of the divider 204 is outputted as a result (quotient value) of dividing the above predetermined setting value by the root mean square value of the input signal Sl.

この除算器204の出力を入力信号S1に乗ずべき利得
として乗算器201の一方の入力端子に入力しているの
で、入力信号Slの自乗平均値が求められた時点で、即
時に適正な利得を算出することが可能となる。
Since the output of the divider 204 is inputted to one input terminal of the multiplier 201 as the gain to be multiplied by the input signal S1, an appropriate gain can be obtained immediately when the root mean square value of the input signal S1 is obtained. It becomes possible to calculate.

そのため、最初の入力信号S1が入力きれてから出力信
号の52のレベルが、所定の値に安定するまでの時間は
上述した従来方式に比べて大幅に短縮することができ、
入力信号レベルの変動に対する出力信号レベルの変動も
十分に小さくすることができる。
Therefore, the time from when the first input signal S1 is input until the output signal level 52 stabilizes at a predetermined value can be significantly shortened compared to the conventional method described above.
Fluctuations in the output signal level with respect to fluctuations in the input signal level can also be made sufficiently small.

(発明の効果) 以上説明したように、本発明によれば、入力信号の自乗
平均値で所定の設定値を除し、その除算結果を入力信号
に直接乗ずべき利得とするようにのたので、入力信号が
変動してから出力信号が所定のレベルに安定するまでの
時間を大幅に短縮することができるという優れた効果が
得られる。
(Effects of the Invention) As explained above, according to the present invention, a predetermined set value is divided by the root mean square value of the input signal, and the division result is used as the gain to be directly multiplied by the input signal. , an excellent effect can be obtained in that the time from when the input signal fluctuates until the output signal stabilizes at a predetermined level can be significantly shortened.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のディジタル自動利得制御方式を実施す
る回路の構成例を示すブロック構成図、 第2図は従来のディジタル自動利得制御方式の回路の構
成を示すブロック構成図である。 第1図 乗算器、 自乗器、 平均化器、 除算器。 第2図
FIG. 1 is a block configuration diagram showing an example of the configuration of a circuit implementing the digital automatic gain control method of the present invention, and FIG. 2 is a block configuration diagram showing the circuit configuration of a conventional digital automatic gain control method. Figure 1: Multiplier, squarer, averager, divider. Figure 2

Claims (1)

【特許請求の範囲】 1)レベル値が変動する入力信号に対して指定の利得を
乗じた出力信号のレベルを常に一定の値に保つように前
記利得を制御するディジタル自動利得制御方式であって
、 前記入力信号の振幅値の自乗平均値を算出する第1の演
算手段と、 所定の設定値を前記第1の演算手段から得られる前記自
乗平均値で除する第2の演算手段と、該第2の演算手段
の出力値を前記利得として前記入力信号に乗じる第3の
演算手段と、 を具備したことを特徴とするディジタル自動利得制御方
式。
[Claims] 1) A digital automatic gain control method that controls the gain so that the level of an output signal obtained by multiplying an input signal whose level value fluctuates by a specified gain is always maintained at a constant value. , a first calculation means for calculating the root mean square value of the amplitude value of the input signal; a second calculation means for dividing a predetermined set value by the root mean square value obtained from the first calculation means; A digital automatic gain control system, comprising: third calculation means for multiplying the input signal by the output value of the second calculation means as the gain.
JP13595789A 1989-05-31 1989-05-31 Automatic digital gain control system Pending JPH033408A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13595789A JPH033408A (en) 1989-05-31 1989-05-31 Automatic digital gain control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13595789A JPH033408A (en) 1989-05-31 1989-05-31 Automatic digital gain control system

Publications (1)

Publication Number Publication Date
JPH033408A true JPH033408A (en) 1991-01-09

Family

ID=15163796

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13595789A Pending JPH033408A (en) 1989-05-31 1989-05-31 Automatic digital gain control system

Country Status (1)

Country Link
JP (1) JPH033408A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1049609A (en) * 1996-07-31 1998-02-20 Matsushita Electric Ind Co Ltd N-mean-square apparatus and amplitude compression / expansion apparatus using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1049609A (en) * 1996-07-31 1998-02-20 Matsushita Electric Ind Co Ltd N-mean-square apparatus and amplitude compression / expansion apparatus using the same

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